From 4d2ac6d7ea17864bd16d8093dab393356b09fed5 Mon Sep 17 00:00:00 2001 From: Andrey Konovalov Date: Thu, 16 Aug 2012 23:50:58 +0400 Subject: Move the remaining files from include/mach Signed-off-by: Andrey Konovalov --- arch/arm/mach-exynos/include/mach-exynos/asv.h | 43 +++++ .../mach-exynos/include/mach-exynos/mali/config.h | 173 +++++++++++++++++++++ .../arm/mach-exynos/include/mach-exynos/regs-iem.h | 27 ++++ .../mach-exynos/include/mach-exynos/ump/config.h | 18 +++ arch/arm/mach-exynos/include/mach/asv.h | 43 ----- arch/arm/mach-exynos/include/mach/mali/config.h | 173 --------------------- arch/arm/mach-exynos/include/mach/regs-iem.h | 27 ---- arch/arm/mach-exynos/include/mach/ump/config.h | 18 --- drivers/gpu/arm/mali/Makefile | 2 +- drivers/gpu/arm/mali/linux/mali_osk_mali.c | 4 +- drivers/gpu/arm/ump/linux/ump_kernel_linux.c | 2 +- drivers/gpu/arm/ump/linux/ump_memory_backend.c | 2 +- 12 files changed, 266 insertions(+), 266 deletions(-) create mode 100644 arch/arm/mach-exynos/include/mach-exynos/asv.h create mode 100644 arch/arm/mach-exynos/include/mach-exynos/mali/config.h create mode 100644 arch/arm/mach-exynos/include/mach-exynos/regs-iem.h create mode 100644 arch/arm/mach-exynos/include/mach-exynos/ump/config.h delete mode 100644 arch/arm/mach-exynos/include/mach/asv.h delete mode 100644 arch/arm/mach-exynos/include/mach/mali/config.h delete mode 100644 arch/arm/mach-exynos/include/mach/regs-iem.h delete mode 100644 arch/arm/mach-exynos/include/mach/ump/config.h diff --git a/arch/arm/mach-exynos/include/mach-exynos/asv.h b/arch/arm/mach-exynos/include/mach-exynos/asv.h new file mode 100644 index 000000000000..5b48b74811e2 --- /dev/null +++ b/arch/arm/mach-exynos/include/mach-exynos/asv.h @@ -0,0 +1,43 @@ +/* linux/arch/arm/mach-exynos/include/mach/asv.h + * + * Copyright (c) 2011 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * EXYNOS4 - Adaptive Support Voltage Header file + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_ASV_H +#define __ASM_ARCH_ASV_H __FILE__ + +#define JUDGE_TABLE_END NULL +#define EXYNOS4_LOOP_CNT 10 + +struct asv_judge_table { + unsigned int hpm_limit; /* HPM value to decide group of target */ + unsigned int ids_limit; /* IDS value to decide group of target */ +}; + +struct samsung_asv { + unsigned int pkg_id; /* fused value for chip */ + unsigned int ids_offset; /* ids_offset of chip */ + unsigned int ids_mask; /* ids_mask of chip */ + unsigned int hpm_result; /* hpm value of chip */ + unsigned int ids_result; /* ids value of chip */ + int (*check_vdd_arm)(void); /* check vdd_arm value, this function is selectable */ + int (*pre_clock_init)(void); /* clock init function to get hpm */ + int (*pre_clock_setup)(void); /* clock setup function to get hpm */ + /* specific get ids function */ + int (*get_ids)(struct samsung_asv *asv_info); + /* specific get hpm function */ + int (*get_hpm)(struct samsung_asv *asv_info); + /* store into some repository to send result of asv */ + int (*store_result)(struct samsung_asv *asv_info); +}; + +extern void exynos4210_asv_init(struct samsung_asv *asv_info); + +#endif /* __ASM_ARCH_ASV_H */ diff --git a/arch/arm/mach-exynos/include/mach-exynos/mali/config.h b/arch/arm/mach-exynos/include/mach-exynos/mali/config.h new file mode 100644 index 000000000000..ccd3cf7d2450 --- /dev/null +++ b/arch/arm/mach-exynos/include/mach-exynos/mali/config.h @@ -0,0 +1,173 @@ +/* + * Copyright (C) 2010 ARM Limited. All rights reserved. + * + * This program is free software and is provided to you under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation, and any use by you of this program is subject to the terms of such GNU licence. + * + * A copy of the licence is included with the program, and can also be obtained from Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + */ + +#ifndef __ARCH_CONFIG_H__ +#define __ARCH_CONFIG_H__ + +/* Configuration for the EB platform with ZBT memory enabled */ +/*zepplin added 2010.08.17 for orion configuration*/ +#define MALI_BASE_ADDR 0x13000000 +#define GP_ADDR MALI_BASE_ADDR +#define L2_ADDR MALI_BASE_ADDR+0x1000 +#define PMU_ADDR MALI_BASE_ADDR+0x2000 +#define GP_MMU_ADDR MALI_BASE_ADDR+0x3000 +#define PP0_MMU_ADDR MALI_BASE_ADDR+0x4000 +#define PP1_MMU_ADDR MALI_BASE_ADDR+0x5000 +#define PP2_MMU_ADDR MALI_BASE_ADDR+0x6000 +#define PP3_MMU_ADDR MALI_BASE_ADDR+0x7000 +#define PP0_ADDR MALI_BASE_ADDR+0x8000 +#define PP1_ADDR MALI_BASE_ADDR+0xA000 +#define PP2_ADDR MALI_BASE_ADDR+0xC000 +#define PP3_ADDR MALI_BASE_ADDR+0xE000 + +/*for mmu and os memory*/ +#define MEM_BASE_ADDR 0x40000000 +#define MEM_TOTAL_SIZE 0x40000000 +#define MEM_MALI_OS_SIZE 0x18000000 + +/*for dedicated memory*/ +//#define MEM_MALI_BASE 0x58000000 +//#define MEM_MALI_SIZE 0x08000000 +#define MEM_MALI_SIZE CONFIG_MALI_MEM_SIZE*1024*1024 +#define MEM_MALI_BASE 0x60000000 - MEM_MALI_SIZE + +//#define S5P_IRQ(x) (x+32) +//#define IRQ_SPI(x) S5P_IRQ(x+32) +#define MAX_IRQ_IN_COMBINER 8 +//#define COMBINER_GROUP(x) ((x) * MAX_IRQ_IN_COMBINER + IRQ_SPI(64)) +#define COMBINER_IRQ(x, y) (COMBINER_GROUP(x) + y) + +#define IRQ_PPMMU0_3D COMBINER_IRQ(13, 0) +#define IRQ_PPMMU1_3D COMBINER_IRQ(13, 1) +#define IRQ_PPMMU2_3D COMBINER_IRQ(13, 2) +#define IRQ_PPMMU3_3D COMBINER_IRQ(13, 3) +#define IRQ_GPMMU_3D COMBINER_IRQ(13, 4) + +#define IRQ_PP0_3D COMBINER_IRQ(14, 0) +#define IRQ_PP1_3D COMBINER_IRQ(14, 1) +#define IRQ_PP2_3D COMBINER_IRQ(14, 2) +#define IRQ_PP3_3D COMBINER_IRQ(14, 3) +#define IRQ_GP_3D COMBINER_IRQ(14, 4) +#define IRQ_PMU_3D COMBINER_IRQ(14, 5) + +static _mali_osk_resource_t arch_configuration [] = +{ + { + .type = MALI400GP, + .description = "Mali-400 GP", + .base = GP_ADDR, + .irq = IRQ_GP_3D, + .mmu_id = 1 + }, + { + .type = MALI400PP, + .base = PP0_ADDR, + .irq = IRQ_PP0_3D, + .description = "Mali-400 PP 0", + .mmu_id = 2 + }, + { + .type = MALI400PP, + .base = PP1_ADDR, + .irq = IRQ_PP1_3D, + .description = "Mali-400 PP 1", + .mmu_id = 3 + }, + { + .type = MALI400PP, + .base = PP2_ADDR, + .irq = IRQ_PP2_3D, + .description = "Mali-400 PP 2", + .mmu_id = 4 + }, + { + .type = MALI400PP, + .base = PP3_ADDR, + .irq = IRQ_PP3_3D, + .description = "Mali-400 PP 3", + .mmu_id = 5 + }, +#if USING_MMU + { + .type = MMU, + .base = GP_MMU_ADDR, + .irq = IRQ_GPMMU_3D, + .description = "Mali-400 MMU for GP", + .mmu_id = 1 + }, + { + .type = MMU, + .base = PP0_MMU_ADDR, + .irq = IRQ_PPMMU0_3D, + .description = "Mali-400 MMU for PP 0", + .mmu_id = 2 + }, + { + .type = MMU, + .base = PP1_MMU_ADDR, + .irq = IRQ_PPMMU1_3D, + .description = "Mali-400 MMU for PP 1", + .mmu_id = 3 + }, + { + .type = MMU, + .base = PP2_MMU_ADDR, + .irq = IRQ_PPMMU2_3D, + .description = "Mali-400 MMU for PP 2", + .mmu_id = 4 + }, + { + .type = MMU, + .base = PP3_MMU_ADDR, + .irq = IRQ_PPMMU3_3D, + .description = "Mali-400 MMU for PP 3", + .mmu_id = 5 + }, +#if USING_OS_MEMORY + { + .type = OS_MEMORY, + .description = "System Memory", + .size = MEM_MALI_OS_SIZE, + .flags = _MALI_CPU_WRITEABLE | _MALI_CPU_READABLE | _MALI_PP_READABLE | _MALI_PP_WRITEABLE | _MALI_GP_READABLE | _MALI_GP_WRITEABLE + }, +#endif +#if USING_DED /* Dedicated Memory */ + { + .type = MEMORY, + .description = "Dedicated Memory", + .base = MEM_MALI_BASE, + .size = MEM_MALI_SIZE, + .flags = _MALI_CPU_WRITEABLE | _MALI_CPU_READABLE | _MALI_PP_READABLE | _MALI_PP_WRITEABLE | _MALI_GP_READABLE | _MALI_GP_WRITEABLE | _MALI_MMU_READABLE | _MALI_MMU_WRITEABLE + }, +#endif/* if USING_OS_MEMORY*/ + { + .type = MEM_VALIDATION, + .description = "memory validation", + .base = MEM_BASE_ADDR, + .size = MEM_TOTAL_SIZE, + .flags = _MALI_CPU_WRITEABLE | _MALI_CPU_READABLE | _MALI_PP_READABLE | _MALI_PP_WRITEABLE | _MALI_GP_READABLE | _MALI_GP_WRITEABLE | _MALI_MMU_READABLE | _MALI_MMU_WRITEABLE + }, +#else /* Not using MMU */ + { + .type = MEMORY, + .description = "Dedicated Memory", + .base = MEM_MALI_BASE, + .size = MEM_MALI_SIZE, + .flags = _MALI_CPU_WRITEABLE | _MALI_CPU_READABLE | _MALI_PP_READABLE | _MALI_PP_WRITEABLE | _MALI_GP_READABLE | _MALI_GP_WRITEABLE | _MALI_MMU_READABLE | _MALI_MMU_WRITEABLE + }, +#endif + { + .type = MALI400L2, + .base = L2_ADDR, + .description = "Mali-400 L2 cache" + }, +}; + +#endif /* __ARCH_CONFIG_H__ */ diff --git a/arch/arm/mach-exynos/include/mach-exynos/regs-iem.h b/arch/arm/mach-exynos/include/mach-exynos/regs-iem.h new file mode 100644 index 000000000000..d9bf17778584 --- /dev/null +++ b/arch/arm/mach-exynos/include/mach-exynos/regs-iem.h @@ -0,0 +1,27 @@ +/* linux/arch/arm/mach-exynos/include/mach/regs-iem.h + * + * Copyright (c) 2011 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * EXYNOS4 - IEM(INTELLIGENT ENERGY MANAGEMENT) register discription + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_REGS_IEM_H +#define __ASM_ARCH_REGS_IEM_H __FILE__ + +/* Register for IEC */ +#define EXYNOS4_IECDPCCR (0x00000) + +/* Register for APC */ +#define EXYNOS4_APC_CONTROL (0x10010) +#define EXYNOS4_APC_PREDLYSEL (0x10024) +#define EXYNOS4_APC_DBG_DLYCODE (0x100E0) + +#define APC_HPM_EN (1 << 4) +#define IEC_EN (1 << 0) + +#endif /* __ASM_ARCH_REGS_IEM_H */ diff --git a/arch/arm/mach-exynos/include/mach-exynos/ump/config.h b/arch/arm/mach-exynos/include/mach-exynos/ump/config.h new file mode 100644 index 000000000000..a82934f27990 --- /dev/null +++ b/arch/arm/mach-exynos/include/mach-exynos/ump/config.h @@ -0,0 +1,18 @@ +/* + * Copyright (C) 2010 ARM Limited. All rights reserved. + * + * This program is free software and is provided to you under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation, and any use by you of this program is subject to the terms of such GNU licence. + * + * A copy of the licence is included with the program, and can also be obtained from Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + */ + +#ifndef __ARCH_CONFIG_H__ +#define __ARCH_CONFIG_H__ + +#define ARCH_UMP_BACKEND_DEFAULT UMP_MEMORY_TYPE +#define ARCH_UMP_MEMORY_ADDRESS_DEFAULT 0 +#define ARCH_UMP_MEMORY_SIZE_DEFAULT CONFIG_UMP_MEM_SIZE * 1024UL * 1024UL + +#endif /* __ARCH_CONFIG_H__ */ diff --git a/arch/arm/mach-exynos/include/mach/asv.h b/arch/arm/mach-exynos/include/mach/asv.h deleted file mode 100644 index 5b48b74811e2..000000000000 --- a/arch/arm/mach-exynos/include/mach/asv.h +++ /dev/null @@ -1,43 +0,0 @@ -/* linux/arch/arm/mach-exynos/include/mach/asv.h - * - * Copyright (c) 2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * EXYNOS4 - Adaptive Support Voltage Header file - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_ASV_H -#define __ASM_ARCH_ASV_H __FILE__ - -#define JUDGE_TABLE_END NULL -#define EXYNOS4_LOOP_CNT 10 - -struct asv_judge_table { - unsigned int hpm_limit; /* HPM value to decide group of target */ - unsigned int ids_limit; /* IDS value to decide group of target */ -}; - -struct samsung_asv { - unsigned int pkg_id; /* fused value for chip */ - unsigned int ids_offset; /* ids_offset of chip */ - unsigned int ids_mask; /* ids_mask of chip */ - unsigned int hpm_result; /* hpm value of chip */ - unsigned int ids_result; /* ids value of chip */ - int (*check_vdd_arm)(void); /* check vdd_arm value, this function is selectable */ - int (*pre_clock_init)(void); /* clock init function to get hpm */ - int (*pre_clock_setup)(void); /* clock setup function to get hpm */ - /* specific get ids function */ - int (*get_ids)(struct samsung_asv *asv_info); - /* specific get hpm function */ - int (*get_hpm)(struct samsung_asv *asv_info); - /* store into some repository to send result of asv */ - int (*store_result)(struct samsung_asv *asv_info); -}; - -extern void exynos4210_asv_init(struct samsung_asv *asv_info); - -#endif /* __ASM_ARCH_ASV_H */ diff --git a/arch/arm/mach-exynos/include/mach/mali/config.h b/arch/arm/mach-exynos/include/mach/mali/config.h deleted file mode 100644 index ccd3cf7d2450..000000000000 --- a/arch/arm/mach-exynos/include/mach/mali/config.h +++ /dev/null @@ -1,173 +0,0 @@ -/* - * Copyright (C) 2010 ARM Limited. All rights reserved. - * - * This program is free software and is provided to you under the terms of the GNU General Public License version 2 - * as published by the Free Software Foundation, and any use by you of this program is subject to the terms of such GNU licence. - * - * A copy of the licence is included with the program, and can also be obtained from Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. - */ - -#ifndef __ARCH_CONFIG_H__ -#define __ARCH_CONFIG_H__ - -/* Configuration for the EB platform with ZBT memory enabled */ -/*zepplin added 2010.08.17 for orion configuration*/ -#define MALI_BASE_ADDR 0x13000000 -#define GP_ADDR MALI_BASE_ADDR -#define L2_ADDR MALI_BASE_ADDR+0x1000 -#define PMU_ADDR MALI_BASE_ADDR+0x2000 -#define GP_MMU_ADDR MALI_BASE_ADDR+0x3000 -#define PP0_MMU_ADDR MALI_BASE_ADDR+0x4000 -#define PP1_MMU_ADDR MALI_BASE_ADDR+0x5000 -#define PP2_MMU_ADDR MALI_BASE_ADDR+0x6000 -#define PP3_MMU_ADDR MALI_BASE_ADDR+0x7000 -#define PP0_ADDR MALI_BASE_ADDR+0x8000 -#define PP1_ADDR MALI_BASE_ADDR+0xA000 -#define PP2_ADDR MALI_BASE_ADDR+0xC000 -#define PP3_ADDR MALI_BASE_ADDR+0xE000 - -/*for mmu and os memory*/ -#define MEM_BASE_ADDR 0x40000000 -#define MEM_TOTAL_SIZE 0x40000000 -#define MEM_MALI_OS_SIZE 0x18000000 - -/*for dedicated memory*/ -//#define MEM_MALI_BASE 0x58000000 -//#define MEM_MALI_SIZE 0x08000000 -#define MEM_MALI_SIZE CONFIG_MALI_MEM_SIZE*1024*1024 -#define MEM_MALI_BASE 0x60000000 - MEM_MALI_SIZE - -//#define S5P_IRQ(x) (x+32) -//#define IRQ_SPI(x) S5P_IRQ(x+32) -#define MAX_IRQ_IN_COMBINER 8 -//#define COMBINER_GROUP(x) ((x) * MAX_IRQ_IN_COMBINER + IRQ_SPI(64)) -#define COMBINER_IRQ(x, y) (COMBINER_GROUP(x) + y) - -#define IRQ_PPMMU0_3D COMBINER_IRQ(13, 0) -#define IRQ_PPMMU1_3D COMBINER_IRQ(13, 1) -#define IRQ_PPMMU2_3D COMBINER_IRQ(13, 2) -#define IRQ_PPMMU3_3D COMBINER_IRQ(13, 3) -#define IRQ_GPMMU_3D COMBINER_IRQ(13, 4) - -#define IRQ_PP0_3D COMBINER_IRQ(14, 0) -#define IRQ_PP1_3D COMBINER_IRQ(14, 1) -#define IRQ_PP2_3D COMBINER_IRQ(14, 2) -#define IRQ_PP3_3D COMBINER_IRQ(14, 3) -#define IRQ_GP_3D COMBINER_IRQ(14, 4) -#define IRQ_PMU_3D COMBINER_IRQ(14, 5) - -static _mali_osk_resource_t arch_configuration [] = -{ - { - .type = MALI400GP, - .description = "Mali-400 GP", - .base = GP_ADDR, - .irq = IRQ_GP_3D, - .mmu_id = 1 - }, - { - .type = MALI400PP, - .base = PP0_ADDR, - .irq = IRQ_PP0_3D, - .description = "Mali-400 PP 0", - .mmu_id = 2 - }, - { - .type = MALI400PP, - .base = PP1_ADDR, - .irq = IRQ_PP1_3D, - .description = "Mali-400 PP 1", - .mmu_id = 3 - }, - { - .type = MALI400PP, - .base = PP2_ADDR, - .irq = IRQ_PP2_3D, - .description = "Mali-400 PP 2", - .mmu_id = 4 - }, - { - .type = MALI400PP, - .base = PP3_ADDR, - .irq = IRQ_PP3_3D, - .description = "Mali-400 PP 3", - .mmu_id = 5 - }, -#if USING_MMU - { - .type = MMU, - .base = GP_MMU_ADDR, - .irq = IRQ_GPMMU_3D, - .description = "Mali-400 MMU for GP", - .mmu_id = 1 - }, - { - .type = MMU, - .base = PP0_MMU_ADDR, - .irq = IRQ_PPMMU0_3D, - .description = "Mali-400 MMU for PP 0", - .mmu_id = 2 - }, - { - .type = MMU, - .base = PP1_MMU_ADDR, - .irq = IRQ_PPMMU1_3D, - .description = "Mali-400 MMU for PP 1", - .mmu_id = 3 - }, - { - .type = MMU, - .base = PP2_MMU_ADDR, - .irq = IRQ_PPMMU2_3D, - .description = "Mali-400 MMU for PP 2", - .mmu_id = 4 - }, - { - .type = MMU, - .base = PP3_MMU_ADDR, - .irq = IRQ_PPMMU3_3D, - .description = "Mali-400 MMU for PP 3", - .mmu_id = 5 - }, -#if USING_OS_MEMORY - { - .type = OS_MEMORY, - .description = "System Memory", - .size = MEM_MALI_OS_SIZE, - .flags = _MALI_CPU_WRITEABLE | _MALI_CPU_READABLE | _MALI_PP_READABLE | _MALI_PP_WRITEABLE | _MALI_GP_READABLE | _MALI_GP_WRITEABLE - }, -#endif -#if USING_DED /* Dedicated Memory */ - { - .type = MEMORY, - .description = "Dedicated Memory", - .base = MEM_MALI_BASE, - .size = MEM_MALI_SIZE, - .flags = _MALI_CPU_WRITEABLE | _MALI_CPU_READABLE | _MALI_PP_READABLE | _MALI_PP_WRITEABLE | _MALI_GP_READABLE | _MALI_GP_WRITEABLE | _MALI_MMU_READABLE | _MALI_MMU_WRITEABLE - }, -#endif/* if USING_OS_MEMORY*/ - { - .type = MEM_VALIDATION, - .description = "memory validation", - .base = MEM_BASE_ADDR, - .size = MEM_TOTAL_SIZE, - .flags = _MALI_CPU_WRITEABLE | _MALI_CPU_READABLE | _MALI_PP_READABLE | _MALI_PP_WRITEABLE | _MALI_GP_READABLE | _MALI_GP_WRITEABLE | _MALI_MMU_READABLE | _MALI_MMU_WRITEABLE - }, -#else /* Not using MMU */ - { - .type = MEMORY, - .description = "Dedicated Memory", - .base = MEM_MALI_BASE, - .size = MEM_MALI_SIZE, - .flags = _MALI_CPU_WRITEABLE | _MALI_CPU_READABLE | _MALI_PP_READABLE | _MALI_PP_WRITEABLE | _MALI_GP_READABLE | _MALI_GP_WRITEABLE | _MALI_MMU_READABLE | _MALI_MMU_WRITEABLE - }, -#endif - { - .type = MALI400L2, - .base = L2_ADDR, - .description = "Mali-400 L2 cache" - }, -}; - -#endif /* __ARCH_CONFIG_H__ */ diff --git a/arch/arm/mach-exynos/include/mach/regs-iem.h b/arch/arm/mach-exynos/include/mach/regs-iem.h deleted file mode 100644 index d9bf17778584..000000000000 --- a/arch/arm/mach-exynos/include/mach/regs-iem.h +++ /dev/null @@ -1,27 +0,0 @@ -/* linux/arch/arm/mach-exynos/include/mach/regs-iem.h - * - * Copyright (c) 2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * EXYNOS4 - IEM(INTELLIGENT ENERGY MANAGEMENT) register discription - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_REGS_IEM_H -#define __ASM_ARCH_REGS_IEM_H __FILE__ - -/* Register for IEC */ -#define EXYNOS4_IECDPCCR (0x00000) - -/* Register for APC */ -#define EXYNOS4_APC_CONTROL (0x10010) -#define EXYNOS4_APC_PREDLYSEL (0x10024) -#define EXYNOS4_APC_DBG_DLYCODE (0x100E0) - -#define APC_HPM_EN (1 << 4) -#define IEC_EN (1 << 0) - -#endif /* __ASM_ARCH_REGS_IEM_H */ diff --git a/arch/arm/mach-exynos/include/mach/ump/config.h b/arch/arm/mach-exynos/include/mach/ump/config.h deleted file mode 100644 index a82934f27990..000000000000 --- a/arch/arm/mach-exynos/include/mach/ump/config.h +++ /dev/null @@ -1,18 +0,0 @@ -/* - * Copyright (C) 2010 ARM Limited. All rights reserved. - * - * This program is free software and is provided to you under the terms of the GNU General Public License version 2 - * as published by the Free Software Foundation, and any use by you of this program is subject to the terms of such GNU licence. - * - * A copy of the licence is included with the program, and can also be obtained from Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. - */ - -#ifndef __ARCH_CONFIG_H__ -#define __ARCH_CONFIG_H__ - -#define ARCH_UMP_BACKEND_DEFAULT UMP_MEMORY_TYPE -#define ARCH_UMP_MEMORY_ADDRESS_DEFAULT 0 -#define ARCH_UMP_MEMORY_SIZE_DEFAULT CONFIG_UMP_MEM_SIZE * 1024UL * 1024UL - -#endif /* __ARCH_CONFIG_H__ */ diff --git a/drivers/gpu/arm/mali/Makefile b/drivers/gpu/arm/mali/Makefile index 263e076a4a9a..b4a9e259fd62 100755 --- a/drivers/gpu/arm/mali/Makefile +++ b/drivers/gpu/arm/mali/Makefile @@ -18,7 +18,7 @@ KBUILDROOT = # Add platform configuration file for Mali #ifeq ($(CONFIG_ARCH_EXYNOS4),y) MACHDIR := $(srctree)/arch/arm/mach-exynos -MALICONFIGDIR :=$(MACHDIR)/include/mach/mali +MALICONFIGDIR :=$(MACHDIR)/include/mach-exynos/mali #endif USING_DED=0 diff --git a/drivers/gpu/arm/mali/linux/mali_osk_mali.c b/drivers/gpu/arm/mali/linux/mali_osk_mali.c index 06a27bc4f917..591430c123c0 100644 --- a/drivers/gpu/arm/mali/linux/mali_osk_mali.c +++ b/drivers/gpu/arm/mali/linux/mali_osk_mali.c @@ -19,8 +19,8 @@ #include "mali_osk.h" /* kernel side OS functions */ #include "mali_uk_types.h" #include "mali_kernel_linux.h" /* exports initialize/terminate_kernel_device() definition of mali_osk_low_level_mem_init() and term */ -#include -#include /* contains the configuration of the arch we are compiling for */ +#include +#include /* contains the configuration of the arch we are compiling for */ /* is called from mali_kernel_constructor in common code */ _mali_osk_errcode_t _mali_osk_init( void ) diff --git a/drivers/gpu/arm/ump/linux/ump_kernel_linux.c b/drivers/gpu/arm/ump/linux/ump_kernel_linux.c index 04a55ab6185c..5bc06513b4b0 100644 --- a/drivers/gpu/arm/ump/linux/ump_kernel_linux.c +++ b/drivers/gpu/arm/ump/linux/ump_kernel_linux.c @@ -18,7 +18,7 @@ #include #include -#include /* Configuration for current platform. The symlinc for arch is set by Makefile */ +#include /* Configuration for current platform. The symlinc for arch is set by Makefile */ #include "ump_ioctl.h" #include "ump_kernel_common.h" #include "ump_kernel_interface.h" diff --git a/drivers/gpu/arm/ump/linux/ump_memory_backend.c b/drivers/gpu/arm/ump/linux/ump_memory_backend.c index d4444cad7e14..1e5e3cc9373d 100644 --- a/drivers/gpu/arm/ump/linux/ump_memory_backend.c +++ b/drivers/gpu/arm/ump/linux/ump_memory_backend.c @@ -11,7 +11,7 @@ #include /* kernel module definitions */ #include /* request_mem_region */ -#include /* Configuration for current platform. The symlink for arch is set by Makefile */ +#include /* Configuration for current platform. The symlink for arch is set by Makefile */ #include "ump_osk.h" #include "ump_kernel_common.h" -- cgit v1.2.3 From e77374c936044b99dcf5648e5a5332b59853e465 Mon Sep 17 00:00:00 2001 From: Andrey Konovalov Date: Tue, 11 Sep 2012 23:10:27 +0400 Subject: Add ubuntu_vexpress_defconfig arch/arm/configs/vexpress_defconfig is not updated for more than a year, and should not be used for vexpress builds. The correct ubuntu kernel config is now produced by the following command: ARCH=arm scripts/kconfig/merge_config.sh linaro/configs/linaro-base.conf \ linaro/configs/ubuntu-minimal.conf linaro/configs/vexpress.conf The big-LITTLE-MP.conf is not included to make the kernel to boot on A9 cpus. Also use 'make savedefconfig' to make the defconfig more compact. This commit puts the config created by the commands above into arch/arm/configs/ubuntu_vexpress_defconfig. Signed-off-by: Andrey Konovalov --- arch/arm/configs/ubuntu_vexpress_defconfig | 149 +++++++++++++++++++++++++++++ 1 file changed, 149 insertions(+) create mode 100644 arch/arm/configs/ubuntu_vexpress_defconfig diff --git a/arch/arm/configs/ubuntu_vexpress_defconfig b/arch/arm/configs/ubuntu_vexpress_defconfig new file mode 100644 index 000000000000..e6d7e02beba7 --- /dev/null +++ b/arch/arm/configs/ubuntu_vexpress_defconfig @@ -0,0 +1,149 @@ +CONFIG_EXPERIMENTAL=y +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_SYSVIPC=y +CONFIG_POSIX_MQUEUE=y +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=16 +CONFIG_CGROUPS=y +CONFIG_CGROUP_SCHED=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_EMBEDDED=y +# CONFIG_COMPAT_BRK is not set +CONFIG_SLAB=y +CONFIG_PROFILING=y +CONFIG_OPROFILE=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_ARCH_VEXPRESS_CHOICE=y +CONFIG_ARCH_VEXPRESS_TC2_PM=y +CONFIG_ARCH_VEXPRESS_CA9X4=y +CONFIG_ARCH_VEXPRESS_DT=y +CONFIG_SMP=y +CONFIG_SCHED_MC=y +CONFIG_SCHED_SMT=y +CONFIG_DISABLE_CPU_SCHED_DOMAIN_BALANCE=y +CONFIG_SCHED_HMP=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_NR_CPUS=8 +CONFIG_THUMB2_KERNEL=y +CONFIG_HIGHMEM=y +CONFIG_HIGHPTE=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=32768 +CONFIG_SECCOMP=y +CONFIG_CC_STACKPROTECTOR=y +CONFIG_CMDLINE="console=ttyAMA0,38400n8 root=/dev/mmcblk0p2 rootwait mmci.fmax=4000000" +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_ARM_VEXPRESS_BL_CPUFREQ=y +CONFIG_CPU_IDLE=y +CONFIG_VFP=y +CONFIG_NEON=y +CONFIG_BINFMT_MISC=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_XFRM_USER=y +CONFIG_NET_KEY=y +CONFIG_NET_KEY_MIGRATE=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +CONFIG_SYN_COOKIES=y +# CONFIG_INET_LRO is not set +CONFIG_IPV6=y +CONFIG_NETLABEL=y +CONFIG_NETFILTER=y +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_CONNECTOR=y +CONFIG_MTD=y +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLOCK=y +CONFIG_MTD_OOPS=y +CONFIG_MTD_CFI=y +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_NAND=y +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_SIZE=65536 +CONFIG_SCSI=y +CONFIG_BLK_DEV_SD=y +CONFIG_MD=y +CONFIG_BLK_DEV_DM=y +CONFIG_NETDEVICES=y +CONFIG_SMC91X=y +CONFIG_SMSC911X=y +CONFIG_INPUT_EVDEV=y +CONFIG_INPUT_MISC=y +CONFIG_INPUT_UINPUT=y +CONFIG_SERIO_AMBAKMI=y +# CONFIG_DEVKMEM is not set +CONFIG_SERIAL_AMBA_PL011=y +CONFIG_SERIAL_AMBA_PL011_CONSOLE=y +CONFIG_FB=y +CONFIG_FB_ARMCLCD=y +CONFIG_FB_ARMHDLCD=y +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set +CONFIG_SOUND=y +CONFIG_SND=y +CONFIG_SND_ARMAACI=y +CONFIG_USB=y +CONFIG_USB_ISP1760_HCD=y +CONFIG_USB_STORAGE=y +CONFIG_MMC=y +CONFIG_MMC_ARMMMCI=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_PL031=y +CONFIG_EXT2_FS=y +CONFIG_EXT3_FS=y +CONFIG_EXT4_FS=y +CONFIG_BTRFS_FS=y +CONFIG_QUOTA=y +CONFIG_QFMT_V2=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_ECRYPT_FS=y +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_SUMMARY=y +CONFIG_JFFS2_FS_XATTR=y +CONFIG_JFFS2_COMPRESSION_OPTIONS=y +CONFIG_JFFS2_LZO=y +CONFIG_JFFS2_RUBIN=y +CONFIG_CRAMFS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +CONFIG_ROOT_NFS=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ISO8859_1=y +CONFIG_PRINTK_TIME=y +CONFIG_MAGIC_SYSRQ=y +CONFIG_SCHEDSTATS=y +CONFIG_TIMER_STATS=y +CONFIG_PROVE_LOCKING=y +CONFIG_ENABLE_DEFAULT_TRACERS=y +CONFIG_STRICT_DEVMEM=y +CONFIG_SECURITY=y +CONFIG_LSM_MMAP_MIN_ADDR=0 +CONFIG_SECURITY_SELINUX=y +CONFIG_SECURITY_SMACK=y +CONFIG_SECURITY_APPARMOR=y +CONFIG_DEFAULT_SECURITY_APPARMOR=y +CONFIG_CRYPTO_MICHAEL_MIC=y +CONFIG_CRC_CCITT=y +CONFIG_CRC_T10DIF=y +CONFIG_CRC_ITU_T=y +CONFIG_CRC7=y -- cgit v1.2.3