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author | Jon Medhurst <tixy@linaro.org> | 2012-08-29 09:16:44 +0100 |
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committer | Jon Medhurst <tixy@linaro.org> | 2012-09-05 14:54:56 +0100 |
commit | e0350430440afe408e4cfa437dd369a0948889de (patch) | |
tree | 11a6f366ba38940be82c23f78d2daa7f0f790fc3 | |
parent | bae8bfd0a0629a06d77c77cfc7de4250a14b63cc (diff) |
ARM: kernel: Fix compilation of sleep.S on ARMv6tracking-tracking-armlt-tc2-pm-ll-20120915.0tracking-tracking-armlt-tc2-pm-ll-20120911.0
The patch "ARM: kernel: fix MPIDR cpu_{suspend}/{resume} usage"
uses the BFC assembler instruction but this isn't available
on ARMv6 CPUs, which breaks compilation when building kernels which
support both SMP and ARMv6, e.g. omap2plus_defconifg.
Fix this by using a BIC instruction instead.
Signed-off-by: Jon Medhurst <tixy@linaro.org>
-rw-r--r-- | arch/arm/kernel/sleep.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/kernel/sleep.S b/arch/arm/kernel/sleep.S index c8952daf4104..b5c1e636ed85 100644 --- a/arch/arm/kernel/sleep.S +++ b/arch/arm/kernel/sleep.S @@ -85,7 +85,7 @@ ENTRY(cpu_resume) mov r1, #0 @ fall-back logical index for UP ALT_SMP(mrc p15, 0, r0, c0, c0, 5) ALT_UP_B(1f) - bfc r0, #24, #8 + bic r0, #0xff000000 bl cpu_logical_index @ return logical index in r1 1: adr r0, sleep_save_sp |