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authorDavid Sin <davidsin@ti.com>2011-12-16 14:09:58 +0800
committerAndy Green <andy.green@linaro.org>2011-12-26 22:32:46 +0800
commit271993a4961a855804e52e914b5edda9babf0fdc (patch)
treef11bdc1da42d51df9d3dd9a8363ee7272da25aa2 /arch
parent25eb605141aea233736e89a9b9f11e6abfa65a69 (diff)
TILER: Add DMM/TILER headers to OMAP include dir
Signed-off-by: David Sin <davidsin@ti.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-omap2/include/mach/dmm.h116
-rw-r--r--arch/arm/mach-omap2/include/mach/tiler.h111
2 files changed, 227 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/include/mach/dmm.h b/arch/arm/mach-omap2/include/mach/dmm.h
new file mode 100644
index 00000000000..2ad6c325ee5
--- /dev/null
+++ b/arch/arm/mach-omap2/include/mach/dmm.h
@@ -0,0 +1,116 @@
+/*
+ * dmm.h
+ *
+ * DMM driver support functions for TI OMAP processors.
+ *
+ * Copyright (C) 2009-2010 Texas Instruments, Inc.
+ *
+ * This package is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
+ * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+ */
+
+#ifndef DMM_H
+#define DMM_H
+
+#define DMM_BASE 0x4E000000
+#define DMM_SIZE 0x800
+
+#define DMM_REVISION 0x000
+#define DMM_HWINFO 0x004
+#define DMM_LISA_HWINFO 0x008
+#define DMM_DMM_SYSCONFIG 0x010
+#define DMM_LISA_LOCK 0x01C
+#define DMM_LISA_MAP__0 0x040
+#define DMM_LISA_MAP__1 0x044
+#define DMM_TILER_HWINFO 0x208
+#define DMM_TILER_OR__0 0x220
+#define DMM_TILER_OR__1 0x224
+#define DMM_PAT_HWINFO 0x408
+#define DMM_PAT_GEOMETRY 0x40C
+#define DMM_PAT_CONFIG 0x410
+#define DMM_PAT_VIEW__0 0x420
+#define DMM_PAT_VIEW__1 0x424
+#define DMM_PAT_VIEW_MAP__0 0x440
+#define DMM_PAT_VIEW_MAP_BASE 0x460
+#define DMM_PAT_IRQ_EOI 0x478
+#define DMM_PAT_IRQSTATUS_RAW 0x480
+#define DMM_PAT_IRQSTATUS 0x490
+#define DMM_PAT_IRQENABLE_SET 0x4A0
+#define DMM_PAT_IRQENABLE_CLR 0x4B0
+#define DMM_PAT_STATUS__0 0x4C0
+#define DMM_PAT_STATUS__1 0x4C4
+#define DMM_PAT_STATUS__2 0x4C8
+#define DMM_PAT_STATUS__3 0x4CC
+#define DMM_PAT_DESCR__0 0x500
+#define DMM_PAT_AREA__0 0x504
+#define DMM_PAT_CTRL__0 0x508
+#define DMM_PAT_DATA__0 0x50C
+#define DMM_PEG_HWINFO 0x608
+#define DMM_PEG_PRIO 0x620
+#define DMM_PEG_PRIO_PAT 0x640
+
+/**
+ * PAT refill programming mode.
+ */
+enum pat_mode {
+ MANUAL,
+ AUTO
+};
+
+/**
+ * Area definition for DMM physical address translator.
+ */
+struct pat_area {
+ s32 x0:8;
+ s32 y0:8;
+ s32 x1:8;
+ s32 y1:8;
+};
+
+/**
+ * DMM physical address translator control.
+ */
+struct pat_ctrl {
+ s32 start:4;
+ s32 dir:4;
+ s32 lut_id:8;
+ s32 sync:12;
+ s32 ini:4;
+};
+
+/**
+ * PAT descriptor.
+ */
+struct pat {
+ struct pat *next;
+ struct pat_area area;
+ struct pat_ctrl ctrl;
+ u32 data;
+};
+
+/**
+ * Program the physical address translator.
+ * @param desc
+ * @param mode
+ * @return an error status.
+ */
+s32 dmm_pat_refill(struct pat *desc, enum pat_mode mode);
+
+/**
+ * Request a page from the DMM free page stack.
+ * @return a physical page address.
+ */
+u32 dmm_get_page(void);
+
+/**
+ * Return a used page to the DMM free page stack.
+ * @param page_addr a physical page address.
+ */
+void dmm_free_page(u32 page_addr);
+
+#endif
diff --git a/arch/arm/mach-omap2/include/mach/tiler.h b/arch/arm/mach-omap2/include/mach/tiler.h
new file mode 100644
index 00000000000..e3ae1c14a10
--- /dev/null
+++ b/arch/arm/mach-omap2/include/mach/tiler.h
@@ -0,0 +1,111 @@
+/*
+ * tiler.h
+ *
+ * TILER driver support functions for TI OMAP processors.
+ *
+ * Copyright (C) 2009-2010 Texas Instruments, Inc.
+ *
+ * This package is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
+ * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+ */
+
+#ifndef TILER_H
+#define TILER_H
+
+#define TILER_PAGE 0x1000
+#define TILER_WIDTH 256
+#define TILER_HEIGHT 128
+#define TILER_BLOCK_WIDTH 64
+#define TILER_BLOCK_HEIGHT 64
+#define TILER_LENGTH (TILER_WIDTH * TILER_HEIGHT * TILER_PAGE)
+
+#define TILER_MAX_NUM_BLOCKS 16
+
+#define TILIOC_GBUF _IOWR('z', 100, u32)
+#define TILIOC_FBUF _IOWR('z', 101, u32)
+#define TILIOC_GSSP _IOWR('z', 102, u32)
+#define TILIOC_MBUF _IOWR('z', 103, u32)
+#define TILIOC_UMBUF _IOWR('z', 104, u32)
+#define TILIOC_QBUF _IOWR('z', 105, u32)
+#define TILIOC_RBUF _IOWR('z', 106, u32)
+#define TILIOC_URBUF _IOWR('z', 107, u32)
+#define TILIOC_QUERY_BLK _IOWR('z', 108, u32)
+
+enum tiler_fmt {
+ TILFMT_MIN = -1,
+ TILFMT_INVALID = -1,
+ TILFMT_NONE = 0,
+ TILFMT_8BIT = 1,
+ TILFMT_16BIT = 2,
+ TILFMT_32BIT = 3,
+ TILFMT_PAGE = 4,
+ TILFMT_MAX = 4
+};
+
+struct area {
+ u16 width;
+ u16 height;
+};
+
+struct tiler_block_info {
+ enum tiler_fmt fmt;
+ union {
+ struct area area;
+ u32 len;
+ } dim;
+ u32 stride;
+ void *ptr;
+ u32 ssptr;
+};
+
+struct tiler_buf_info {
+ s32 num_blocks;
+ struct tiler_block_info blocks[TILER_MAX_NUM_BLOCKS];
+ s32 offset;
+};
+
+struct tiler_view_orient {
+ u8 rotate_90;
+ u8 x_invert;
+ u8 y_invert;
+};
+
+/**
+ * Request a 1-D or 2-D TILER buffer.
+ *
+ * @param fmt TILER bit mode.
+ * @param width buffer width.
+ * @param height buffer height.
+ * @param sys_addr system space (L3) address.
+ *
+ * @return an error status.
+ */
+s32 tiler_alloc(enum tiler_fmt fmt, u32 width, u32 height, u32 *sys_addr);
+
+/**
+ * Free TILER memory.
+ * @param sys_addr system space (L3) address.
+ * @return an error status.
+ */
+s32 tiler_free(u32 sys_addr);
+
+u32 tiler_get_natural_addr(void *sys_ptr);
+
+void tiler_rotate_view(struct tiler_view_orient *orient, u32 rotation);
+
+u32 tiler_stride(u32 tsptr);
+
+void tiler_alloc_packed_nv12(s32 *count, u32 width, u32 height, void **y_sysptr,
+ void **uv_sysptr, void **y_allocptr,
+ void **uv_allocptr, s32 aligned);
+
+void tiler_alloc_packed(s32 *count, enum tiler_fmt fmt, u32 width, u32 height,
+ void **sysptr, void **allocptr, s32 aligned);
+
+#endif
+