diff options
author | Etienne Carriere <etienne.carriere@linaro.org> | 2017-04-12 10:46:56 +0200 |
---|---|---|
committer | Etienne Carriere <etienne.carriere@linaro.org> | 2017-04-12 11:30:24 +0200 |
commit | 59fffc7171519913f746d8d84b2512cb78475b57 (patch) | |
tree | 4fd73eff6c5cca774c577307adc68e90d6be0367 /core/arch | |
parent | 73595e4cc3e5b637d55ae1781d118a2120008ba8 (diff) |
core: deprecate DEVICEx_TYPE/_PA_BASE/_SIZE
Macros DEVICEx_TYPE, DEVICEx_PA_BASE and DEVICEx__SIZE used to
help platform to register their address range mapping requirements.
These are now deprecated since platform should use the more flexible
register_phys_mem() macro.
This change removes all occurrences of DEVICEx_TYPE/_PA_BASE/_SIZE
and use the register_phys_mem() instead.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Diffstat (limited to 'core/arch')
-rw-r--r-- | core/arch/arm/mm/core_mmu.c | 21 | ||||
-rw-r--r-- | core/arch/arm/plat-mediatek/main.c | 8 | ||||
-rw-r--r-- | core/arch/arm/plat-mediatek/platform_config.h | 11 | ||||
-rw-r--r-- | core/arch/arm/plat-rpi3/main.c | 4 | ||||
-rw-r--r-- | core/arch/arm/plat-rpi3/platform_config.h | 6 | ||||
-rw-r--r-- | core/arch/arm/plat-sprd/main.c | 12 | ||||
-rw-r--r-- | core/arch/arm/plat-sprd/platform_config.h | 17 | ||||
-rw-r--r-- | core/arch/arm/plat-sunxi/platform.c | 16 | ||||
-rw-r--r-- | core/arch/arm/plat-sunxi/platform_config.h | 34 | ||||
-rw-r--r-- | core/arch/arm/plat-ti/main.c | 4 | ||||
-rw-r--r-- | core/arch/arm/plat-ti/platform_config.h | 5 | ||||
-rw-r--r-- | core/arch/arm/plat-zynqmp/main.c | 12 | ||||
-rw-r--r-- | core/arch/arm/plat-zynqmp/platform_config.h | 18 |
13 files changed, 67 insertions, 101 deletions
diff --git a/core/arch/arm/mm/core_mmu.c b/core/arch/arm/mm/core_mmu.c index f85e496f..6cb256d5 100644 --- a/core/arch/arm/mm/core_mmu.c +++ b/core/arch/arm/mm/core_mmu.c @@ -108,27 +108,6 @@ register_sdp_mem(CFG_TEE_SDP_MEM_BASE, CFG_TEE_SDP_MEM_SIZE); register_phys_mem(MEM_AREA_TEE_RAM, CFG_TEE_RAM_START, CFG_TEE_RAM_PH_SIZE); register_phys_mem(MEM_AREA_TA_RAM, CFG_TA_RAM_START, CFG_TA_RAM_SIZE); register_phys_mem(MEM_AREA_NSEC_SHM, CFG_SHMEM_START, CFG_SHMEM_SIZE); -#ifdef DEVICE0_PA_BASE -register_phys_mem(DEVICE0_TYPE, DEVICE0_PA_BASE, DEVICE0_SIZE); -#endif -#ifdef DEVICE1_PA_BASE -register_phys_mem(DEVICE1_TYPE, DEVICE1_PA_BASE, DEVICE1_SIZE); -#endif -#ifdef DEVICE2_PA_BASE -register_phys_mem(DEVICE2_TYPE, DEVICE2_PA_BASE, DEVICE2_SIZE); -#endif -#ifdef DEVICE3_PA_BASE -register_phys_mem(DEVICE3_TYPE, DEVICE3_PA_BASE, DEVICE3_SIZE); -#endif -#ifdef DEVICE4_PA_BASE -register_phys_mem(DEVICE4_TYPE, DEVICE4_PA_BASE, DEVICE4_SIZE); -#endif -#ifdef DEVICE5_PA_BASE -register_phys_mem(DEVICE5_TYPE, DEVICE5_PA_BASE, DEVICE5_SIZE); -#endif -#ifdef DEVICE6_PA_BASE -register_phys_mem(DEVICE6_TYPE, DEVICE6_PA_BASE, DEVICE6_SIZE); -#endif static bool _pbuf_intersects(struct memaccess_area *a, size_t alen, paddr_t pa, size_t size) diff --git a/core/arch/arm/plat-mediatek/main.c b/core/arch/arm/plat-mediatek/main.c index 62180fcb..390e9ce0 100644 --- a/core/arch/arm/plat-mediatek/main.c +++ b/core/arch/arm/plat-mediatek/main.c @@ -38,6 +38,14 @@ static void main_fiq(void); +register_phys_mem(MEM_AREA_IO_NSEC, + ROUNDDOWN(CONSOLE_UART_BASE, CORE_MMU_DEVICE_SIZE), + CORE_MMU_DEVICE_SIZE); + +register_phys_mem(MEM_AREA_IO_SEC, + ROUNDDOWN(GIC_BASE, CORE_MMU_DEVICE_SIZE), + CORE_MMU_DEVICE_SIZE); + static const struct thread_handlers handlers = { .std_smc = tee_entry_std, .fast_smc = tee_entry_fast, diff --git a/core/arch/arm/plat-mediatek/platform_config.h b/core/arch/arm/plat-mediatek/platform_config.h index 7fe2f935..fda55979 100644 --- a/core/arch/arm/plat-mediatek/platform_config.h +++ b/core/arch/arm/plat-mediatek/platform_config.h @@ -90,17 +90,6 @@ #define CFG_TA_RAM_SIZE ROUNDDOWN((TZDRAM_SIZE - CFG_TEE_RAM_VA_SIZE), \ CORE_MMU_DEVICE_SIZE) -#define DEVICE0_PA_BASE ROUNDDOWN(CONSOLE_UART_BASE, \ - CORE_MMU_DEVICE_SIZE) -#define DEVICE0_VA_BASE DEVICE0_PA_BASE -#define DEVICE0_SIZE CORE_MMU_DEVICE_SIZE -#define DEVICE0_TYPE MEM_AREA_IO_NSEC - -#define DEVICE1_PA_BASE ROUNDDOWN(GIC_BASE, CORE_MMU_DEVICE_SIZE) -#define DEVICE1_VA_BASE DEVICE1_PA_BASE -#define DEVICE1_SIZE CORE_MMU_DEVICE_SIZE -#define DEVICE1_TYPE MEM_AREA_IO_SEC - #ifdef CFG_WITH_LPAE #define MAX_XLAT_TABLES 5 #endif diff --git a/core/arch/arm/plat-rpi3/main.c b/core/arch/arm/plat-rpi3/main.c index 8a714cb7..cd39e243 100644 --- a/core/arch/arm/plat-rpi3/main.c +++ b/core/arch/arm/plat-rpi3/main.c @@ -37,6 +37,10 @@ #include <tee/entry_fast.h> #include <tee/entry_std.h> +register_phys_mem(MEM_AREA_IO_NSEC, + ROUNDDOWN(CONSOLE_UART_BASE, CORE_MMU_DEVICE_SIZE), + CORE_MMU_DEVICE_SIZE); + static void main_fiq(void) { panic(); diff --git a/core/arch/arm/plat-rpi3/platform_config.h b/core/arch/arm/plat-rpi3/platform_config.h index ac53e262..a8c077fa 100644 --- a/core/arch/arm/plat-rpi3/platform_config.h +++ b/core/arch/arm/plat-rpi3/platform_config.h @@ -86,10 +86,4 @@ # define CFG_TA_RAM_SIZE (16 * 1024 * 1024) -#define DEVICE0_BASE ROUNDDOWN(CONSOLE_UART_BASE, \ - CORE_MMU_DEVICE_SIZE) -#define DEVICE0_PA_BASE DEVICE0_BASE -#define DEVICE0_SIZE CORE_MMU_DEVICE_SIZE -#define DEVICE0_TYPE MEM_AREA_IO_NSEC - #endif /* PLATFORM_CONFIG_H */ diff --git a/core/arch/arm/plat-sprd/main.c b/core/arch/arm/plat-sprd/main.c index ea2c984a..223e3814 100644 --- a/core/arch/arm/plat-sprd/main.c +++ b/core/arch/arm/plat-sprd/main.c @@ -35,6 +35,18 @@ #include <tee/entry_fast.h> #include <tee/entry_std.h> +register_phys_mem(MEM_AREA_IO_NSEC, + ROUNDDOWN(CONSOLE_UART_BASE, CORE_MMU_DEVICE_SIZE), + CORE_MMU_DEVICE_SIZE); + +register_phys_mem(MEM_AREA_IO_SEC, + ROUNDDOWN(GIC_BASE, CORE_MMU_DEVICE_SIZE), + CORE_MMU_DEVICE_SIZE); + +register_phys_mem(MEM_AREA_IO_SEC, + ROUNDDOWN(GIC_BASE + GICD_OFFSET, CORE_MMU_DEVICE_SIZE), + CORE_MMU_DEVICE_SIZE); + static void main_fiq(void); static const struct thread_handlers handlers = { diff --git a/core/arch/arm/plat-sprd/platform_config.h b/core/arch/arm/plat-sprd/platform_config.h index b30583e2..684b1297 100644 --- a/core/arch/arm/plat-sprd/platform_config.h +++ b/core/arch/arm/plat-sprd/platform_config.h @@ -85,21 +85,4 @@ #define CFG_TA_RAM_SIZE ROUNDDOWN((TZDRAM_SIZE - CFG_TEE_RAM_VA_SIZE), \ CORE_MMU_DEVICE_SIZE) -#define DEVICE0_PA_BASE ROUNDDOWN(CONSOLE_UART_BASE, \ - CORE_MMU_DEVICE_SIZE) -#define DEVICE0_VA_BASE DEVICE0_PA_BASE -#define DEVICE0_SIZE CORE_MMU_DEVICE_SIZE -#define DEVICE0_TYPE MEM_AREA_IO_NSEC - -#define DEVICE1_PA_BASE ROUNDDOWN(GIC_BASE, CORE_MMU_DEVICE_SIZE) -#define DEVICE1_VA_BASE DEVICE1_PA_BASE -#define DEVICE1_SIZE CORE_MMU_DEVICE_SIZE -#define DEVICE1_TYPE MEM_AREA_IO_SEC - -#define DEVICE2_PA_BASE ROUNDDOWN(GIC_BASE + GICD_OFFSET, \ - CORE_MMU_DEVICE_SIZE) -#define DEVICE2_VA_BASE DEVICE2_PA_BASE -#define DEVICE2_SIZE CORE_MMU_DEVICE_SIZE -#define DEVICE2_TYPE MEM_AREA_IO_SEC - #endif /*PLATFORM_CONFIG_H*/ diff --git a/core/arch/arm/plat-sunxi/platform.c b/core/arch/arm/plat-sunxi/platform.c index 34331bee..8ae645ca 100644 --- a/core/arch/arm/plat-sunxi/platform.c +++ b/core/arch/arm/plat-sunxi/platform.c @@ -56,6 +56,22 @@ uint32_t sunxi_secondary_ns_entry; struct gic_data gic_data; +register_phys_mem(MEM_AREA_IO_SEC, + ROUNDDOWN(AHB0_BASE, CORE_MMU_DEVICE_SIZE), + ROUNDUP(AHB0_SIZE, CORE_MMU_DEVICE_SIZE)); + +register_phys_mem(MEM_AREA_IO_SEC, + ROUNDDOWN(AHB1_BASE, CORE_MMU_DEVICE_SIZE), + ROUNDUP(AHB1_SIZE, CORE_MMU_DEVICE_SIZE)); + +register_phys_mem(MEM_AREA_IO_SEC, + ROUNDDOWN(AHB2_BASE, CORE_MMU_DEVICE_SIZE), + ROUNDUP(AHB2_SIZE, CORE_MMU_DEVICE_SIZE)); + +register_phys_mem(MEM_AREA_IO_SEC, + ROUNDDOWN(AHBS_BASE, CORE_MMU_DEVICE_SIZE), + ROUNDUP(AHBS_SIZE, CORE_MMU_DEVICE_SIZE)); + static int platform_smp_init(void) { vaddr_t base = (vaddr_t)phys_to_virt(PRCM_BASE, MEM_AREA_IO_SEC); diff --git a/core/arch/arm/plat-sunxi/platform_config.h b/core/arch/arm/plat-sunxi/platform_config.h index 8060d9b0..63feba54 100644 --- a/core/arch/arm/plat-sunxi/platform_config.h +++ b/core/arch/arm/plat-sunxi/platform_config.h @@ -125,28 +125,16 @@ #define CFG_TEE_LOAD_ADDR TEE_RAM_START -/* AHB0 devices */ -#define DEVICE0_PA_BASE ROUNDDOWN(0x01400000, CORE_MMU_DEVICE_SIZE) -#define DEVICE0_VA_BASE DEVICE0_PA_BASE -#define DEVICE0_SIZE ROUNDUP(0x00900000, CORE_MMU_DEVICE_SIZE) -#define DEVICE0_TYPE MEM_AREA_IO_SEC - -/* AHB1 devices */ -#define DEVICE1_PA_BASE ROUNDDOWN(0x00800000, CORE_MMU_DEVICE_SIZE) -#define DEVICE1_VA_BASE DEVICE1_PA_BASE -#define DEVICE1_SIZE ROUNDUP(0x00300000, CORE_MMU_DEVICE_SIZE) -#define DEVICE1_TYPE MEM_AREA_IO_SEC - -/* AHB2 devices */ -#define DEVICE2_PA_BASE ROUNDDOWN(0x03000000, CORE_MMU_DEVICE_SIZE) -#define DEVICE2_VA_BASE DEVICE2_PA_BASE -#define DEVICE2_SIZE ROUNDUP(0x01000000, CORE_MMU_DEVICE_SIZE) -#define DEVICE2_TYPE MEM_AREA_IO_SEC - -/* AHBS devices */ -#define DEVICE3_PA_BASE ROUNDDOWN(0x06000000, CORE_MMU_DEVICE_SIZE) -#define DEVICE3_VA_BASE DEVICE3_PA_BASE -#define DEVICE3_SIZE ROUNDUP(0x02200000, CORE_MMU_DEVICE_SIZE) -#define DEVICE3_TYPE MEM_AREA_IO_SEC +#define AHB0_BASE 0x01400000 +#define AHB0_SIZE 0x00900000 + +#define AHB1_BASE 0x00800000 +#define AHB1_SIZE 0x00300000 + +#define AHB2_BASE 0x03000000 +#define AHB2_SIZE 0x01000000 + +#define AHBS_BASE 0x06000000 +#define AHBS_SIZE 0x02200000 #endif /*PLATFORM_CONFIG_H*/ diff --git a/core/arch/arm/plat-ti/main.c b/core/arch/arm/plat-ti/main.c index be3bf3a3..d73a4b88 100644 --- a/core/arch/arm/plat-ti/main.c +++ b/core/arch/arm/plat-ti/main.c @@ -55,6 +55,10 @@ register_phys_mem(MEM_AREA_IO_SEC, GICD_BASE, GICD_SIZE); register_phys_mem(MEM_AREA_IO_NSEC, CONSOLE_UART_BASE, SERIAL8250_UART_REG_SIZE); +register_phys_mem(MEM_AREA_IO_SEC, + ROUNDDOWN(SECRAM_BASE, CORE_MMU_DEVICE_SIZE), + CORE_MMU_DEVICE_SIZE); + void main_init_gic(void) { vaddr_t gicc_base; diff --git a/core/arch/arm/plat-ti/platform_config.h b/core/arch/arm/plat-ti/platform_config.h index 48505a65..9e746e9e 100644 --- a/core/arch/arm/plat-ti/platform_config.h +++ b/core/arch/arm/plat-ti/platform_config.h @@ -106,9 +106,4 @@ #define CFG_TA_RAM_SIZE ROUNDDOWN((TZDRAM_SIZE - CFG_TEE_RAM_VA_SIZE), \ CORE_MMU_DEVICE_SIZE) -#define DEVICE2_PA_BASE ROUNDDOWN(SECRAM_BASE, CORE_MMU_DEVICE_SIZE) -#define DEVICE2_VA_BASE DEVICE2_PA_BASE -#define DEVICE2_SIZE CORE_MMU_DEVICE_SIZE -#define DEVICE2_TYPE MEM_AREA_IO_SEC - #endif /*PLATFORM_CONFIG_H*/ diff --git a/core/arch/arm/plat-zynqmp/main.c b/core/arch/arm/plat-zynqmp/main.c index a00d1ae8..cccb0092 100644 --- a/core/arch/arm/plat-zynqmp/main.c +++ b/core/arch/arm/plat-zynqmp/main.c @@ -48,6 +48,18 @@ static void main_fiq(void); static struct gic_data gic_data; static struct cdns_uart_data console_data __early_bss; +register_phys_mem(MEM_AREA_IO_SEC, + ROUNDDOWN(CONSOLE_UART_BASE, CORE_MMU_DEVICE_SIZE), + CORE_MMU_DEVICE_SIZE); + +register_phys_mem(MEM_AREA_IO_SEC, + ROUNDDOWN(GIC_BASE, CORE_MMU_DEVICE_SIZE), + CORE_MMU_DEVICE_SIZE); + +register_phys_mem(MEM_AREA_IO_SEC, + ROUNDDOWN(GIC_BASE + GICD_OFFSET, CORE_MMU_DEVICE_SIZE), + CORE_MMU_DEVICE_SIZE); + static const struct thread_handlers handlers = { .std_smc = tee_entry_std, .fast_smc = tee_entry_fast, diff --git a/core/arch/arm/plat-zynqmp/platform_config.h b/core/arch/arm/plat-zynqmp/platform_config.h index 91c0f82f..a02d10f2 100644 --- a/core/arch/arm/plat-zynqmp/platform_config.h +++ b/core/arch/arm/plat-zynqmp/platform_config.h @@ -93,24 +93,6 @@ #define CFG_TA_RAM_SIZE ROUNDDOWN((TZDRAM_SIZE - CFG_TEE_RAM_VA_SIZE), \ CORE_MMU_DEVICE_SIZE) - -#define DEVICE0_PA_BASE ROUNDDOWN(CONSOLE_UART_BASE, \ - CORE_MMU_DEVICE_SIZE) -#define DEVICE0_VA_BASE DEVICE0_PA_BASE -#define DEVICE0_SIZE CORE_MMU_DEVICE_SIZE -#define DEVICE0_TYPE MEM_AREA_IO_SEC - -#define DEVICE1_PA_BASE ROUNDDOWN(GIC_BASE, CORE_MMU_DEVICE_SIZE) -#define DEVICE1_VA_BASE DEVICE1_PA_BASE -#define DEVICE1_SIZE CORE_MMU_DEVICE_SIZE -#define DEVICE1_TYPE MEM_AREA_IO_SEC - -#define DEVICE2_PA_BASE ROUNDDOWN(GIC_BASE + GICD_OFFSET, \ - CORE_MMU_DEVICE_SIZE) -#define DEVICE2_VA_BASE DEVICE2_PA_BASE -#define DEVICE2_SIZE CORE_MMU_DEVICE_SIZE -#define DEVICE2_TYPE MEM_AREA_IO_SEC - #ifndef UART_BAUDRATE #define UART_BAUDRATE 115200 #endif |