aboutsummaryrefslogtreecommitdiff
path: root/src/mesa/drivers/dri/radeon/radeon_texstate.c
diff options
context:
space:
mode:
authorRoland Scheidegger <rscheidegger@gmx.ch>2006-09-13 23:20:10 +0000
committerRoland Scheidegger <rscheidegger@gmx.ch>2006-09-13 23:20:10 +0000
commit99e0236046436fba25afb60632a76ad9cdfbbc9a (patch)
tree6e75454a5eb612c612ac7a17bd76d020615eb485 /src/mesa/drivers/dri/radeon/radeon_texstate.c
parent43aa03408497d653b7716b2b0fac116dc03e7e6e (diff)
Always mark tex state atom as dirty when the texture image is dirty, this ensures texture cache gets flushed in case the new texture has the same offset as the old one (fixes glean pixelFormat test at least on r200).
Diffstat (limited to 'src/mesa/drivers/dri/radeon/radeon_texstate.c')
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_texstate.c10
1 files changed, 6 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/radeon/radeon_texstate.c b/src/mesa/drivers/dri/radeon/radeon_texstate.c
index b6a472ffa73..1e3a3951e2d 100644
--- a/src/mesa/drivers/dri/radeon/radeon_texstate.c
+++ b/src/mesa/drivers/dri/radeon/radeon_texstate.c
@@ -847,9 +847,12 @@ static void import_tex_obj_state( radeonContextPtr rmesa,
int unit,
radeonTexObjPtr texobj )
{
- GLuint *cmd = RADEON_DB_STATE( tex[unit] );
+/* do not use RADEON_DB_STATE to avoid stale texture caches */
+ GLuint *cmd = &rmesa->hw.tex[unit].cmd[TEX_CMD_0];
GLuint se_coord_fmt = rmesa->hw.set.cmd[SET_SE_COORDFMT];
+ RADEON_STATECHANGE( rmesa, tex[unit] );
+
cmd[TEX_PP_TXFILTER] &= ~TEXOBJ_TXFILTER_MASK;
cmd[TEX_PP_TXFILTER] |= texobj->pp_txfilter & TEXOBJ_TXFILTER_MASK;
cmd[TEX_PP_TXFORMAT] &= ~TEXOBJ_TXFORMAT_MASK;
@@ -868,10 +871,11 @@ static void import_tex_obj_state( radeonContextPtr rmesa,
se_coord_fmt &= ~(RADEON_VTX_ST0_NONPARAMETRIC << unit);
if (texobj->base.tObj->Target == GL_TEXTURE_CUBE_MAP) {
- GLuint *cube_cmd = RADEON_DB_STATE( cube[unit] );
+ GLuint *cube_cmd = &rmesa->hw.cube[unit].cmd[CUBE_CMD_0];
GLuint bytesPerFace = texobj->base.totalSize / 6;
ASSERT(texobj->base.totalSize % 6 == 0);
+ RADEON_STATECHANGE( rmesa, cube[unit] );
cube_cmd[CUBE_PP_CUBIC_FACES] = texobj->pp_cubic_faces;
/* dont know if this setup conforms to OpenGL..
* at least it matches the behavior of mesa software renderer
@@ -881,12 +885,10 @@ static void import_tex_obj_state( radeonContextPtr rmesa,
cube_cmd[CUBE_PP_CUBIC_OFFSET_2] = texobj->pp_txoffset + 2 * bytesPerFace; /* top */
cube_cmd[CUBE_PP_CUBIC_OFFSET_3] = texobj->pp_txoffset + 3 * bytesPerFace; /* bottom */
cube_cmd[CUBE_PP_CUBIC_OFFSET_4] = texobj->pp_txoffset + 4 * bytesPerFace; /* front */
- RADEON_DB_STATECHANGE( rmesa, &rmesa->hw.cube[unit] );
cmd[TEX_PP_TXOFFSET] = texobj->pp_txoffset + 5 * bytesPerFace; /* back */
}
}
- RADEON_DB_STATECHANGE( rmesa, &rmesa->hw.tex[unit] );
if (se_coord_fmt != rmesa->hw.set.cmd[SET_SE_COORDFMT]) {
RADEON_STATECHANGE( rmesa, set );
rmesa->hw.set.cmd[SET_SE_COORDFMT] = se_coord_fmt;