From f7e66d526a05f4a37b9eb6cbfd0a9b9ad98e8c29 Mon Sep 17 00:00:00 2001 From: Bhupesh Sharma Date: Fri, 19 Aug 2022 11:09:45 +0530 Subject: arm64: dts: qcom: sm8150: Fix fastrpc iommu values Fix the 'memory access' related crash seen while running Hexagon SDK example applications on the cdsp dsp available on sm8150 SoC based boards: qcom_q6v5_pas 8300000.remoteproc: fatal error received: EX:kernel:0x0:frpck_0_0:0xf5:PC=0xc020ceb0 This crash is caused by incorrect IOMMU SID values being used in the fastrpc node. Cc: Bjorn Andersson Cc: Rob Herring Suggested-by: Srinivas Kandagatla Signed-off-by: Bhupesh Sharma Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220819053945.4114430-1-bhupesh.sharma@linaro.org (cherry picked from commit 1d330a6783c66ac6c569f14ecf8dd196d50c15e5) --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 24 ++++++++---------------- 1 file changed, 8 insertions(+), 16 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index 7d509ecd44da..916f12b799b7 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -3394,57 +3394,49 @@ compute-cb@1 { compatible = "qcom,fastrpc-compute-cb"; reg = <1>; - iommus = <&apps_smmu 0x1401 0x2040>, - <&apps_smmu 0x1421 0x0>, - <&apps_smmu 0x2001 0x420>, - <&apps_smmu 0x2041 0x0>; + iommus = <&apps_smmu 0x1001 0x0460>; }; compute-cb@2 { compatible = "qcom,fastrpc-compute-cb"; reg = <2>; - iommus = <&apps_smmu 0x2 0x3440>, - <&apps_smmu 0x22 0x3400>; + iommus = <&apps_smmu 0x1002 0x0460>; }; compute-cb@3 { compatible = "qcom,fastrpc-compute-cb"; reg = <3>; - iommus = <&apps_smmu 0x3 0x3440>, - <&apps_smmu 0x1423 0x0>, - <&apps_smmu 0x2023 0x0>; + iommus = <&apps_smmu 0x1003 0x0460>; }; compute-cb@4 { compatible = "qcom,fastrpc-compute-cb"; reg = <4>; - iommus = <&apps_smmu 0x4 0x3440>, - <&apps_smmu 0x24 0x3400>; + iommus = <&apps_smmu 0x1004 0x0460>; }; compute-cb@5 { compatible = "qcom,fastrpc-compute-cb"; reg = <5>; - iommus = <&apps_smmu 0x5 0x3440>, - <&apps_smmu 0x25 0x3400>; + iommus = <&apps_smmu 0x1005 0x0460>; }; compute-cb@6 { compatible = "qcom,fastrpc-compute-cb"; reg = <6>; - iommus = <&apps_smmu 0x6 0x3460>; + iommus = <&apps_smmu 0x1006 0x0460>; }; compute-cb@7 { compatible = "qcom,fastrpc-compute-cb"; reg = <7>; - iommus = <&apps_smmu 0x7 0x3460>; + iommus = <&apps_smmu 0x1007 0x0460>; }; compute-cb@8 { compatible = "qcom,fastrpc-compute-cb"; reg = <8>; - iommus = <&apps_smmu 0x8 0x3460>; + iommus = <&apps_smmu 0x1008 0x0460>; }; /* note: secure cb9 in downstream */ -- cgit v1.2.3 From e94a359e4032e13bc224a80f52144c93e09d194a Mon Sep 17 00:00:00 2001 From: Bhupesh Sharma Date: Thu, 4 Aug 2022 00:22:33 +0530 Subject: coresight: etm4x: Fix crash observed on Qcom ETM parts with 'Low power override' Some Qualcomm ETM implementations require skipping powering up the trace unit, as the ETMs are in the same power domain as their CPU cores. Via commit 5214b563588e ("coresight: etm4x: Add support for sysreg only devices"), the setting of 'skip_power_up' flag was moved after the 'etm4_init_arch_data' function is called, whereas the flag value is itself used inside the function. This causes a crash when ETM mode 'Low-power state behavior override' is set on some Qualcomm parts. Fix the same. Fixes: 5214b563588e ("coresight: etm4x: Add support for sysreg only devices") Cc: Mike Leach Cc: Suzuki K Poulose Cc: Mathieu Poirier Cc: Greg Kroah-Hartman Signed-off-by: Bhupesh Sharma --- drivers/hwtracing/coresight/coresight-etm4x-core.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c index d39660a3e50c..14c1c7869795 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c @@ -977,6 +977,16 @@ static bool etm4_init_sysreg_access(struct etmv4_drvdata *drvdata, if (!cpu_supports_sysreg_trace()) return false; + /* + * Some Qualcomm implementations require skipping powering up the trace unit, + * as the ETMs are in the same power domain as their CPU cores. + * + * Since the 'skip_power_up' flag is used inside 'etm4_init_arch_data' function, + * initialize it before the function is called. + */ + if (fwnode_property_present(dev_fwnode(dev), "qcom,skip-power-up")) + drvdata->skip_power_up = true; + /* * ETMs implementing sysreg access must implement TRCDEVARCH. */ @@ -1951,8 +1961,7 @@ static int etm4_probe(struct device *dev, void __iomem *base, u32 etm_pid) return -EINVAL; /* TRCPDCR is not accessible with system instructions. */ - if (!desc.access.io_mem || - fwnode_property_present(dev_fwnode(dev), "qcom,skip-power-up")) + if (!desc.access.io_mem) drvdata->skip_power_up = true; major = ETM_ARCH_MAJOR_VERSION(drvdata->arch); -- cgit v1.2.3 From 7d48ab6bcef101978c60f1e4ab557959f477d93c Mon Sep 17 00:00:00 2001 From: Bhupesh Sharma Date: Tue, 24 May 2022 12:15:37 +0530 Subject: firmware: qcom: scm: Add support for tsens reinit workaround Some versions of Qualcomm tsens controller might enter a 'bad state' while running stability tests causing sensor temperatures/interrupts status to be in an 'invalid' state. It is recommended to re-initialize the tsens controller via trustzone (secure registers) using scm call(s) when that happens. Add support for the same in the qcom_scm driver. Cc: Bjorn Andersson Cc: Amit Kucheria Cc: Thara Gopinath Cc: linux-pm@vger.kernel.org Cc: linux-arm-msm@vger.kernel.org Signed-off-by: Bhupesh Sharma --- drivers/firmware/qcom_scm.c | 15 +++++++++++++++ drivers/firmware/qcom_scm.h | 4 ++++ include/linux/qcom_scm.h | 2 ++ 3 files changed, 21 insertions(+) diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c index cdbfe54c8146..93adcc046a62 100644 --- a/drivers/firmware/qcom_scm.c +++ b/drivers/firmware/qcom_scm.c @@ -858,6 +858,21 @@ int qcom_scm_mem_protect_video_var(u32 cp_start, u32 cp_size, } EXPORT_SYMBOL(qcom_scm_mem_protect_video_var); +int qcom_scm_tsens_reinit(void) +{ + int ret; + const struct qcom_scm_desc desc = { + .svc = QCOM_SCM_SVC_TSENS, + .cmd = QCOM_SCM_TSENS_INIT_ID, + }; + struct qcom_scm_res res; + + ret = qcom_scm_call(__scm->dev, &desc, &res); + + return ret ? : res.result[0]; +} +EXPORT_SYMBOL(qcom_scm_tsens_reinit); + static int __qcom_scm_assign_mem(struct device *dev, phys_addr_t mem_region, size_t mem_sz, phys_addr_t src, size_t src_sz, phys_addr_t dest, size_t dest_sz) diff --git a/drivers/firmware/qcom_scm.h b/drivers/firmware/qcom_scm.h index 0d51eef2472f..495fa00230c7 100644 --- a/drivers/firmware/qcom_scm.h +++ b/drivers/firmware/qcom_scm.h @@ -94,6 +94,10 @@ extern int scm_legacy_call(struct device *dev, const struct qcom_scm_desc *desc, #define QCOM_SCM_PIL_PAS_IS_SUPPORTED 0x07 #define QCOM_SCM_PIL_PAS_MSS_RESET 0x0a +/* TSENS Services and Function IDs */ +#define QCOM_SCM_SVC_TSENS 0x1E +#define QCOM_SCM_TSENS_INIT_ID 0x5 + #define QCOM_SCM_SVC_IO 0x05 #define QCOM_SCM_IO_READ 0x01 #define QCOM_SCM_IO_WRITE 0x02 diff --git a/include/linux/qcom_scm.h b/include/linux/qcom_scm.h index f8335644a01a..5c37e1658cef 100644 --- a/include/linux/qcom_scm.h +++ b/include/linux/qcom_scm.h @@ -124,4 +124,6 @@ extern int qcom_scm_lmh_dcvsh(u32 payload_fn, u32 payload_reg, u32 payload_val, extern int qcom_scm_lmh_profile_change(u32 profile_id); extern bool qcom_scm_lmh_dcvsh_available(void); +extern int qcom_scm_tsens_reinit(void); + #endif -- cgit v1.2.3 From 862cc35a55bf171014ff0e2f6fa19b887499a332 Mon Sep 17 00:00:00 2001 From: Bhupesh Sharma Date: Fri, 22 Jul 2022 14:14:27 +0530 Subject: thermal: qcom: tsens: Add hooks for supplying platform specific reinit quirks Add hooks inside platform specific data which can be used by Qualcomm tsens controller(s) which might need reinitialization via trustzone. Cc: Bjorn Andersson Cc: Amit Kucheria Cc: Thara Gopinath Cc: linux-pm@vger.kernel.org Cc: linux-arm-msm@vger.kernel.org Signed-off-by: Bhupesh Sharma --- drivers/thermal/qcom/tsens.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h index ba05c8233356..92787017c6ab 100644 --- a/drivers/thermal/qcom/tsens.h +++ b/drivers/thermal/qcom/tsens.h @@ -513,6 +513,7 @@ struct tsens_features { * @num_sensors: Number of sensors supported by platform * @ops: operations the tsens instance supports * @hw_ids: Subset of sensors ids supported by platform, if not the first n + * @needs_reinit_wa: tsens controller might need reinit via trustzone * @feat: features of the IP * @fields: bitfield locations */ @@ -520,6 +521,7 @@ struct tsens_plat_data { const u32 num_sensors; const struct tsens_ops *ops; unsigned int *hw_ids; + bool needs_reinit_wa; struct tsens_features *feat; const struct reg_field *fields; }; @@ -542,6 +544,7 @@ struct tsens_context { * @srot_map: pointer to SROT register address space * @tm_offset: deal with old device trees that don't address TM and SROT * address space separately + * @needs_reinit_wa: tsens controller might need reinit via trustzone * @ul_lock: lock while processing upper/lower threshold interrupts * @crit_lock: lock while processing critical threshold interrupts * @rf: array of regmap_fields used to store value of the field @@ -559,6 +562,7 @@ struct tsens_priv { struct regmap *tm_map; struct regmap *srot_map; u32 tm_offset; + bool needs_reinit_wa; /* lock for upper/lower threshold interrupts */ spinlock_t ul_lock; -- cgit v1.2.3 From 1696cd01fc692a9efe1dac429b0fec746e68d1b4 Mon Sep 17 00:00:00 2001 From: Bhupesh Sharma Date: Wed, 1 Jun 2022 12:55:16 +0530 Subject: thermal: qcom: tsens: Add driver support for re-initialization quirk Since for some Qualcomm tsens controllers, its suggested to monitor the controller health periodically and in case an issue is detected, to re-initialize the tsens controller via trustzone, add the support for the same in the qcom tsens driver. Note that once the tsens controller is reset using scm call, all SROT and TM region registers will enter the reset mode. While all the SROT registers will be re-programmed and re-enabled in trustzone prior to the scm call exit, the TM region registers will not re-initialized in trustzone and thus need to be handled by the tsens driver. Cc: Bjorn Andersson Cc: Amit Kucheria Cc: Thara Gopinath Cc: linux-pm@vger.kernel.org Cc: linux-arm-msm@vger.kernel.org Signed-off-by: Bhupesh Sharma --- drivers/thermal/qcom/tsens-v2.c | 3 + drivers/thermal/qcom/tsens.c | 197 ++++++++++++++++++++++++++++++++++++++++ drivers/thermal/qcom/tsens.h | 12 +++ 3 files changed, 212 insertions(+) diff --git a/drivers/thermal/qcom/tsens-v2.c b/drivers/thermal/qcom/tsens-v2.c index b293ed32174b..f521e4479cc5 100644 --- a/drivers/thermal/qcom/tsens-v2.c +++ b/drivers/thermal/qcom/tsens-v2.c @@ -88,6 +88,9 @@ static const struct reg_field tsens_v2_regfields[MAX_REGFIELDS] = { /* TRDY: 1=ready, 0=in progress */ [TRDY] = REG_FIELD(TM_TRDY_OFF, 0, 0), + + /* FIRST_ROUND_COMPLETE: 1=complete, 0=not complete */ + [FIRST_ROUND_COMPLETE] = REG_FIELD(TM_TRDY_OFF, 3, 3), }; static const struct tsens_ops ops_generic_v2 = { diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c index e49f58e83513..c2d085fb5447 100644 --- a/drivers/thermal/qcom/tsens.c +++ b/drivers/thermal/qcom/tsens.c @@ -7,6 +7,7 @@ #include #include #include +#include #include #include #include @@ -594,6 +595,113 @@ static void tsens_disable_irq(struct tsens_priv *priv) regmap_field_write(priv->rf[INT_EN], 0); } +static int tsens_reenable_hw_after_scm(struct tsens_priv *priv) +{ + /* + * Re-enable watchdog, unmask the bark and + * disable cycle completion monitoring. + */ + regmap_field_write(priv->rf[WDOG_BARK_CLEAR], 1); + regmap_field_write(priv->rf[WDOG_BARK_CLEAR], 0); + regmap_field_write(priv->rf[WDOG_BARK_MASK], 0); + regmap_field_write(priv->rf[CC_MON_MASK], 1); + + /* Re-enable interrupts */ + tsens_enable_irq(priv); + + return 0; +} + +static int tsens_health_check_and_reinit(struct tsens_priv *priv, + int hw_id) +{ + int ret, trdy, first_round, sw_reg; + unsigned long timeout; + + /* First check if TRDY is SET */ + ret = regmap_field_read(priv->rf[TRDY], &trdy); + if (ret) + goto err; + + if (!trdy) { + ret = regmap_field_read(priv->rf[FIRST_ROUND_COMPLETE], &first_round); + if (ret) + goto err; + + if (!first_round) { + WARN_ON(!mutex_is_locked(&priv->reinit_mutex)); + + /* Wait for 2 ms for tsens controller to recover */ + timeout = jiffies + msecs_to_jiffies(RESET_TIMEOUT_MS); + do { + ret = regmap_field_read(priv->rf[FIRST_ROUND_COMPLETE], + &first_round); + if (ret) + goto err; + + if (first_round) { + dev_dbg(priv->dev, "tsens controller recovered\n"); + return 0; /* success */ + } + } while (time_before(jiffies, timeout)); + + spin_lock(&priv->reinit_lock); + + /* + * Invoke SCM call only if SW register write is + * reflecting in controller. Try it for 2 ms. + * In case that fails mark the tsens controller + * as unrecoverable. + */ + timeout = jiffies + msecs_to_jiffies(RESET_TIMEOUT_MS); + do { + ret = regmap_field_write(priv->rf[INT_EN], CRITICAL_INT_EN); + if (ret) + goto err; + + ret = regmap_field_read(priv->rf[INT_EN], &sw_reg); + if (ret) + goto err; + } while ((sw_reg & CRITICAL_INT_EN) && (time_before(jiffies, timeout))); + + if (!(sw_reg & CRITICAL_INT_EN)) { + ret = -ENOTRECOVERABLE; + goto err; + } + + /* + * tsens controller did not recover, + * proceed with SCM call to re-init it. + */ + ret = qcom_scm_tsens_reinit(); + if (ret) { + dev_err(priv->dev, "tsens reinit scm call failed (%d)\n", ret); + goto err; + } + + /* + * After the SCM call, we need to re-enable + * the interrupts and also set active threshold + * for each sensor. + */ + ret = tsens_reenable_hw_after_scm(priv); + if (ret) { + dev_err(priv->dev, + "tsens re-enable after scm call failed (%d)\n", ret); + goto err; + } + + /* Notify reinit wa worker */ + queue_work(system_highpri_wq, &priv->reinit_wa_notify); + + spin_unlock(&priv->reinit_lock); + } + } + +err: + return ret; +} + int get_temp_tsens_valid(const struct tsens_sensor *s, int *temp) { struct tsens_priv *priv = s->priv; @@ -607,6 +715,21 @@ int get_temp_tsens_valid(const struct tsens_sensor *s, int *temp) if (tsens_version(priv) == VER_0) goto get_temp; + /* + * For some tsens controllers, its suggested to + * monitor the controller health periodically + * and in case an issue is detected to reinit + * tsens controller via trustzone. + */ + if (priv->needs_reinit_wa) { + mutex_lock(&priv->reinit_mutex); + ret = tsens_health_check_and_reinit(priv, hw_id); + mutex_unlock(&priv->reinit_mutex); + + if (ret) + return ret; + } + /* Valid bit is 0 for 6 AHB clock cycles. * At 19.2MHz, 1 AHB clock is ~60ns. * We should enter this loop very, very rarely. @@ -739,6 +862,40 @@ static const struct regmap_config tsens_srot_config = { .reg_stride = 4, }; +static void __tsens_reinit_worker(struct tsens_priv *priv) +{ + int ret, temp; + unsigned int i; + struct tsens_irq_data d; + + for (i = 0; i < priv->num_sensors; i++) { + const struct tsens_sensor *s = &priv->sensor[i]; + u32 hw_id = s->hw_id; + + if (!s->tzd) + continue; + if (!tsens_threshold_violated(priv, hw_id, &d)) + continue; + + ret = get_temp_tsens_valid(s, &temp); + if (ret) { + dev_err(priv->dev, "[%u] error reading sensor during reinit\n", hw_id); + continue; + } + + tsens_read_irq_state(priv, hw_id, s, &d); + + if ((d.up_thresh < temp) || (d.low_thresh > temp)) { + dev_dbg(priv->dev, "[%u] TZ update trigger during reinit (%d mC)\n", + hw_id, temp); + thermal_zone_device_update(s->tzd, THERMAL_EVENT_UNSPECIFIED); + } else { + dev_dbg(priv->dev, "[%u] no violation during reinit (%d)\n", + hw_id, temp); + } + } +} + int __init init_common(struct tsens_priv *priv) { void __iomem *tm_base, *srot_base; @@ -860,6 +1017,14 @@ int __init init_common(struct tsens_priv *priv) goto err_put_device; } + priv->rf[FIRST_ROUND_COMPLETE] = devm_regmap_field_alloc(dev, + priv->tm_map, + priv->fields[FIRST_ROUND_COMPLETE]); + if (IS_ERR(priv->rf[FIRST_ROUND_COMPLETE])) { + ret = PTR_ERR(priv->rf[FIRST_ROUND_COMPLETE]); + goto err_put_device; + } + /* This loop might need changes if enum regfield_ids is reordered */ for (j = LAST_TEMP_0; j <= UP_THRESH_15; j += 16) { for (i = 0; i < priv->feat->max_sensors; i++) { @@ -1082,6 +1247,14 @@ static int tsens_register(struct tsens_priv *priv) return ret; } +static void tsens_reinit_worker_notify(struct work_struct *work) +{ + struct tsens_priv *priv = container_of(work, struct tsens_priv, + reinit_wa_notify); + + __tsens_reinit_worker(priv); +} + static int tsens_probe(struct platform_device *pdev) { int ret, i; @@ -1123,6 +1296,11 @@ static int tsens_probe(struct platform_device *pdev) priv->dev = dev; priv->num_sensors = num_sensors; + priv->needs_reinit_wa = data->needs_reinit_wa; + + if (priv->needs_reinit_wa && !qcom_scm_is_available()) + return -EPROBE_DEFER; + priv->ops = data->ops; for (i = 0; i < priv->num_sensors; i++) { if (data->hw_ids) @@ -1138,6 +1316,25 @@ static int tsens_probe(struct platform_device *pdev) if (!priv->ops || !priv->ops->init || !priv->ops->get_temp) return -EINVAL; + /* + * Reinitialization workaround is currently supported only for + * tsens controller versions v2. + * + * If incorrect platform data is passed to this effect, ignore + * the requested setting and move forward. + */ + if (priv->needs_reinit_wa && (tsens_version(priv) < VER_2_X)) { + dev_warn(dev, + "%s: Reinit quirk available only for tsens v2\n", __func__); + priv->needs_reinit_wa = false; + } + + mutex_init(&priv->reinit_mutex); + spin_lock_init(&priv->reinit_lock); + + if (priv->needs_reinit_wa) + INIT_WORK(&priv->reinit_wa_notify, tsens_reinit_worker_notify); + ret = priv->ops->init(priv); if (ret < 0) { dev_err(dev, "%s: init failed\n", __func__); diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h index 92787017c6ab..900d2a74d25e 100644 --- a/drivers/thermal/qcom/tsens.h +++ b/drivers/thermal/qcom/tsens.h @@ -14,9 +14,12 @@ #define SLOPE_FACTOR 1000 #define SLOPE_DEFAULT 3200 #define TIMEOUT_US 100 +#define RESET_TIMEOUT_MS 2 #define THRESHOLD_MAX_ADC_CODE 0x3ff #define THRESHOLD_MIN_ADC_CODE 0x0 +#define CRITICAL_INT_EN (BIT(2)) + #include #include #include @@ -165,6 +168,7 @@ enum regfield_ids { /* ----- TM ------ */ /* TRDY */ TRDY, + FIRST_ROUND_COMPLETE, /* INTERRUPT ENABLE */ INT_EN, /* v2+ has separate enables for crit, upper and lower irq */ /* STATUS */ @@ -564,6 +568,14 @@ struct tsens_priv { u32 tm_offset; bool needs_reinit_wa; + struct work_struct reinit_wa_notify; + + /* protects reinit related serialization */ + struct mutex reinit_mutex; + + /* lock for reinit workaround */ + spinlock_t reinit_lock; + /* lock for upper/lower threshold interrupts */ spinlock_t ul_lock; -- cgit v1.2.3 From ab32daaccd3a4cd8fa622b244d3cc151b2900cf1 Mon Sep 17 00:00:00 2001 From: Bhupesh Sharma Date: Wed, 25 May 2022 10:58:52 +0530 Subject: thermal: qcom: tsens: Add reinit quirk support for tsens v2 controllers Some Qualcomm tsens v2 controllers like those present on sm8150 SoC might require re-initialization via trustzone [via scm call(s)] when it enters a 'bad state' causing sensor temperatures/interrupts status to be in an 'invalid' state. Add hooks for the same in the qcom tsens driver. Devices requiring the same can pass the relevant compatible string in dt and the driver hook can be used accordingly. Cc: Bjorn Andersson Cc: Amit Kucheria Cc: Thara Gopinath Cc: linux-pm@vger.kernel.org Cc: linux-arm-msm@vger.kernel.org Signed-off-by: Bhupesh Sharma --- drivers/thermal/qcom/tsens-v2.c | 12 ++++++++++++ drivers/thermal/qcom/tsens.c | 3 +++ drivers/thermal/qcom/tsens.h | 2 +- 3 files changed, 16 insertions(+), 1 deletion(-) diff --git a/drivers/thermal/qcom/tsens-v2.c b/drivers/thermal/qcom/tsens-v2.c index f521e4479cc5..431f17f99d34 100644 --- a/drivers/thermal/qcom/tsens-v2.c +++ b/drivers/thermal/qcom/tsens-v2.c @@ -104,6 +104,18 @@ struct tsens_plat_data data_tsens_v2 = { .fields = tsens_v2_regfields, }; +/* + * For some tsens v2 controllers, its suggested to monitor the + * controller health periodically and in case an issue is detected + * to reinit tsens controller via trustzone. + */ +struct tsens_plat_data data_tsens_v2_reinit = { + .ops = &ops_generic_v2, + .feat = &tsens_v2_feat, + .needs_reinit_wa = true, + .fields = tsens_v2_regfields, +}; + /* Kept around for backward compatibility with old msm8996.dtsi */ struct tsens_plat_data data_8996 = { .num_sensors = 13, diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c index c2d085fb5447..928b6a44fda8 100644 --- a/drivers/thermal/qcom/tsens.c +++ b/drivers/thermal/qcom/tsens.c @@ -1145,6 +1145,9 @@ static const struct of_device_id tsens_table[] = { }, { .compatible = "qcom,msm8996-tsens", .data = &data_8996, + }, { + .compatible = "qcom,sm8150-tsens", + .data = &data_tsens_v2_reinit, }, { .compatible = "qcom,tsens-v1", .data = &data_tsens_v1, diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h index 900d2a74d25e..03cc3a790972 100644 --- a/drivers/thermal/qcom/tsens.h +++ b/drivers/thermal/qcom/tsens.h @@ -607,6 +607,6 @@ extern struct tsens_plat_data data_8916, data_8939, data_8974, data_9607; extern struct tsens_plat_data data_tsens_v1, data_8976; /* TSENS v2 targets */ -extern struct tsens_plat_data data_8996, data_tsens_v2; +extern struct tsens_plat_data data_8996, data_tsens_v2_reinit, data_tsens_v2; #endif /* __QCOM_TSENS_H__ */ -- cgit v1.2.3