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2021-01-28Merge remote-tracking branch 'sm8250-venus/tracking-qcomlt-sm8250-venus' ↵integration-linux-qcomlt-20210129-002908-v5.11-rc5-406-g82266e4157139Linaro CI
into integration-linux-qcomlt
2021-01-28Merge remote-tracking branch 'sm8250/tracking-qcomlt-sm8250' into ↵Linaro CI
integration-linux-qcomlt # Conflicts: # arch/arm64/configs/defconfig # drivers/net/wireless/ath/ath11k/dp_rx.c # drivers/net/wireless/ath/ath11k/pci.c
2021-01-28Merge remote-tracking branch ↵Linaro CI
'qcs404-defconfig/tracking-qcomlt-qcs404-defconfig' into integration-linux-qcomlt
2021-01-28Merge remote-tracking branch 'sdm845-dp/tracking-qcomlt-sdm845-dp' into ↵Linaro CI
integration-linux-qcomlt # Conflicts: # drivers/gpu/drm/msm/dp/dp_display.c
2021-01-28Merge remote-tracking branch 'sdm845-usb/tracking-qcomlt-usb-renesas' into ↵Linaro CI
integration-linux-qcomlt
2021-01-28Merge remote-tracking branch 'bus-scaling/icc-testing' into ↵Linaro CI
integration-linux-qcomlt
2021-01-28Merge remote-tracking branch ↵Linaro CI
'distro.config/tracking-qcomlt-config-fragments' into integration-linux-qcomlt
2021-01-28Merge remote-tracking branch ↵Linaro CI
'arm64-defconfig/tracking-qcomlt-arm64-defconfig' into integration-linux-qcomlt
2021-01-28Merge remote-tracking branch 'drm-msm/tracking-qcomlt-drm-msm' into ↵Linaro CI
integration-linux-qcomlt
2021-01-28Merge remote-tracking branch 'audio/tracking-qcomlt-audio' into ↵Linaro CI
integration-linux-qcomlt # Conflicts: # sound/soc/qcom/lpass-platform.c
2021-01-28Merge remote-tracking branch 'wcd9335/tracking-qcomlt-wcd9335' into ↵Linaro CI
integration-linux-qcomlt
2021-01-28Merge remote-tracking branch 'msm8996-dt/tracking-qcomlt-msm8996-dt' into ↵Linaro CI
integration-linux-qcomlt
2021-01-28media: venus: vdec: Fix decoder cmd STOP issueStanimir Varbanov
Fixes an issue when issuing a stop command to the controller, negating the following firmware error. "SFR message from FW: Exception: TID = Unknown IP = 0x3b7dc FA = 0x0 cause = 0x6" Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2021-01-28media: venus: helper: Decide work modeDikshita Agarwal
Decide work mode for encoder and decoder based on different use-cases. Signed-off-by: Dikshita Agarwal <dikshita@codeaurora.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2021-01-28media: venus: hfi: Increase plat_buf_v6 o/p buffer count.Dikshita Agarwal
Presently, minimum buffer count for output buffers for h264 & hevc codec is kept as 8 which might not be sufficient for few use cases so increasing the value to 18. Signed-off-by: Dikshita Agarwal <dikshita@codeaurora.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2021-01-28media: venus: helpers, hfi, vdec: Set actual plane constraints to FWDikshita Agarwal
Set actual plane alignments to FW with HFI_PROPERTY_PARAM_UNCOMPRESSED_PLANE_ACTUAL_CONSTRAINTS_INFO to calculate correct buffer size. bod: Fixed fall-through error in pkt_session_set_property_6xx() switch Signed-off-by: Dikshita Agarwal <dikshita@codeaurora.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2021-01-28media: venus: helpers: Add internal buffer list for v6Dikshita Agarwal
- Internal buffers required by v6 are different than v4, add new list of internal buffers for v6. - Differentiate encoder/decoder buffers for 6xx Signed-off-by: Dikshita Agarwal <dikshita@codeaurora.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2021-01-28media: venus: firmware: Do not toggle WRAPPER_A9SS_SW_RESET on 6xxDikshita Agarwal
Do not toggle the WRAPPER_A9SS_SW_RESET on 6xx. Signed-off-by: Dikshita Agarwal <dikshita@codeaurora.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2021-01-28media: venus: pm: Toggle 6xx wrapper power in vcodec_controlDikshita Agarwal
When in vcodec_control_v4() on the 4xx path we select between one of two vcodec cores to toggle power control bits. In 6xx there is only one core which offsets the relevant control registers to a slightly different address. This patch accounts for the address offset for 6xx silicon. Co-developed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Dikshita Agarwal <dikshita@codeaurora.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2021-01-28media: venus: hfi: Add 6xx AXI halt logicDikshita Agarwal
This patch takes the downstream AXI halt routine and applies it when IS_V6() is true. bod: Converted to readl_poll_timeout() Converted LPI update timeout to dev_dbg. In practice this register never appears to update with the value 0x07. Discussing with contacts in qcom video team, this toggle only pertains to low-power mode. Keeping the write for the sake of fidelity with downstream. Signed-off-by: Dikshita Agarwal <dikshita@codeaurora.org> Co-developed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2021-01-28media: venus: hfi, vdec: v6 Add IS_V6() to existing IS_V4() if locationsBryan O'Donoghue
In various places in the venus codebase we have if (IS_V4()) which takes the code down paths for 4xx silicon. This logic is broadly applicable to 6xx silicon also. In this patch we add IS_V6() to various IS_V4() decision locations. Co-developed-by: Dikshita Agarwal <dikshita@qti.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2021-01-28media: venus: pm: Define v6 PM operationsBryan O'Donoghue
This commit make a pm_ops structure for the V6 silicon. As an initial pass it copies the v4 pm_ops structure and callbacks. For the most part the logic for both IP blocks looks the same however there are a few differences we will need to capture for v6. Existing v4 operations should cover most of it. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2021-01-28media: venus: hfi: Read WRAPPER_TZ_CPU_STATUS_V6 on 6xxBryan O'Donoghue
On 6xx we should read wrapper cpu status from the wrapper TZ register set. Co-developed-by: Jonathan Marek <jonathan@marek.ca> Co-developed-by: Dikshita Agarwal <dikshita@codeaurora.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2021-01-28media: venus: hfi: Add 6xx interrupt supportDikshita Agarwal
This commit adds 6xx specific interrupt support, some register offsets and bitmasks differ from 4xx, which we account for in this commit. [bod: Added commit log. Moved register definition into commit] Signed-off-by: Dikshita Agarwal <dikshita@codeaurora.org> Co-developed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2021-01-28media: venus: hfi: Add a 6xx boot logicDikshita Agarwal
This patch adds a 6xx specific boot logic. The goal is to share as much code as possible between 3xx, 4xx and 6xx silicon. We need to do a different write to WRAPPER_INTR_MASK with an additional write to CPU_CS_H2XSOFTINTEN_V6 and CPU_CS_X2RPMh_V6. The other writes are the same for 6xx and non-6xx silicon albeit at different absolute relative locations to the base of the venus address space. Signed-off-by: Dikshita Agarwal <dikshita@codeaurora.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2021-01-28media: venus: core: Hook to V6 base registers when appropriateBryan O'Donoghue
This commit points the IO base registers 6xx offsets when probing for 6xx hardware. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2021-01-28media: venus: core: Add an io base for AON regsBryan O'Donoghue
6xx silicon needs to access registers from a AON base address range. This commit defines the necessary variable for later use. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2021-01-28media: venus: core: Add an io base for TZ wrapper regsBryan O'Donoghue
6xx silicon needs to access registers from a wrapper trust-zone base address range. This commit defines the necessary variable for later use. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2021-01-28media: venus: core: Add differentiator IS_V6(core)Bryan O'Donoghue
This commit adds the macro helper IS_V6() which will be used to differentiate iris2/v6 silicon from previous versions. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2021-01-28media: venus: hfi: Define additional 6xx registersDikshita Agarwal
- Add X2 RPMh registers and definitions from the downstream example. - Add 6xx core power definitions - Add 6xx AON defintions - Add 6xx wrapper tz defintions - Add 6xx wrapper interrupt definitions - Add 6xx soft interrupt definitions - Define wrapper LPI register offsets Co-developed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Dikshita Agarwal <dikshita@codeaurora.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2021-01-28media: venus: hfi: Define block offsets for V6 hardwareDikshita Agarwal
This commit defines a range of new base addresses for already defined blocks. - CPU_BASE_V6 - CPU_CS_BASE_V6 - CPU_IC_BASE_V6 - WRAPPER_BASE_V6 The base addresses of the blocks are slightly different for 6xx but, aside from that are layout and bit compatible. New 6xx specific block addresses will be added in separate commits. Co-developed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Dikshita Agarwal <dikshita@codeaurora.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2021-01-28media: venus: hfi,pm,firmware: Convert to block relative addressingBryan O'Donoghue
An upcoming silicon change places a number of existing blocks within the Venus at different relative offsets to the base address of IO region. In order to handle this difference this patch changes the address offsets of the registers to function as offsets relative to the relevant sub-block of registers within the IO region not the base address of the IO region. As a result of this change venus_readl() and venus_writel() are deleted. Co-developed-by: Dikshita Agarwal <dikshita@codeaurora.org> Signed-off-by: Dikshita Agarwal <dikshita@codeaurora.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2021-01-28media: venus: core: Add io base variables for each blockBryan O'Donoghue
New silicon means that the pre-determined offsets we have been using in this driver no longer hold. Existing blocks of registers can exist at different offsets relative to the IO base address. This commit adds a routine to assign the IO base hooks a subsequent commit will convert from absolute to relative addressing. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2021-01-28media: venus: core,pm: Vote for min clk freq during venus bootDikshita Agarwal
Vote for min clk frequency for core clks during prepare and enable clocks at boot sequence. Without this the controller clock runs at very low value (9.6MHz) which is not sufficient to boot venus. Signed-off-by: Dikshita Agarwal <dikshita@codeaurora.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2021-01-28media: venus: core: add sm8250 DT compatible and resource dataBryan O'Donoghue
Adds an sm8250 compatible binding to the venus core. Co-developed-by: Jonathan Marek <jonathan@marek.ca> Co-developed-by: Dikshita Agarwal <dikshita@codeaurora.org> Signed-off-by: Dikshita Agarwal <dikshita@codeaurora.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2021-01-28media: venus: core,pm: Add handling for resetsStanimir Varbanov
The Venus driver has to control two reset signals related to gcc video_axi0 and videocc mvs0c for v6. Add it. Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2021-01-28arm64: defconfig: Enable SM8250 video clock controllerBryan O'Donoghue
Enable the building of the sm8250 video clock controller by default. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2021-01-28arm64: dts: qcom: sm8250: Add venus DT nodeBryan O'Donoghue
Add DT entries for the sm8250 venus encoder/decoder. Co-developed-by: Jonathan Marek <jonathan@marek.ca> Co-developed-by: Dikshita Agarwal <dikshita@qti.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2021-01-28arm64: dts: qcom: sm8250: Add videocc DT nodeJonathan Marek
This commit adds the videocc DTS node for sm8250. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2021-01-28clk: qcom: videocc: Add gdsc mmcx-reg supply hookBryan O'Donoghue
This commit adds a regulator supply hook to mmcx-reg Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2021-01-28clk: qcom: videocc-sm8250: VIDEO_CC_MVS0_CLKBryan O'Donoghue
This patch adds the missing video_cc_mvs0_div_clk entry to videocc-sm8250. There has been some debate about whether or not this entry is required to be specified and interacted with specifically. Looking at downstream this clock is brought out in this way so, to err on the side of caution we should replicate in upstream. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2021-01-28clk: qcom: videocc-sm8250: Add VIDEO_CC_MVS0_DIV_CLK_SRCBryan O'Donoghue
This patch adds the missing video_cc_mvs0_div_clk_src entry to videocc-sm8250. There has been some debate about whether or not this entry is required to be specified and interacted with specifically. Looking at downstream this clock is brought out in this way so, to err on the side of caution we should replicate in upstream. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2021-01-28dt-bindings: clock: Add missing SM8250 videoc clock indicesBryan O'Donoghue
Two indexes need to be added to videocc-sm8250.h for venus to function properly. Rather than adding the missing indexes when used we add them separately here to keep checkpatch.pl happy. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2021-01-28media: dt-bindings: media: venus: Add sm8250 dt schemaBryan O'Donoghue
Add a schema description for the venus video encoder/decoder on the sm8250. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2021-01-28media: venus: Update v6 buffer descriptorsBryan O'Donoghue
Commit 3a75bf4e7925 ('media: venus: Add platform buffers for v6') adds a bunch of capability parameters. Reviewing downstream we can see a number of these need to be updated. techpack/video/msm/vidc/msm_vidc_platform.c :: kona_capabilities[] Fixes: 3a75bf4e7925 ('media: venus: Add platform buffers for v6') Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
2021-01-28venus: venc: set IDR period to FW only for H264 & HEVCDikshita Agarwal
HFI_PROPERTY_CONFIG_VENC_IDR_PERIOD is supported for only H264 & HEVC codec. There is no need to set it for VP8 since all key frames are treated as IDR frames for VP8. Signed-off-by: Dikshita Agarwal <dikshita@codeaurora.org> Reviewed-by: Stanimir Varbanov <stanimir.varbanov@linaro.org> Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
2021-01-28venus: venc: set inband mode property to FW.Dikshita Agarwal
Set HFI_PROPERTY_CONFIG_VENC_SYNC_FRAME_SEQUENCE_HEADER to FW to support inband sequence header mode. Reviewed-by: Fritz Koenig <frkoenig@chromium.org> Signed-off-by: Dikshita Agarwal <dikshita@codeaurora.org> Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
2021-01-28venus: venc: fix handlig of S_SELECTION and G_SELECTIONDikshita Agarwal
- return correct width and height for G_SELECTION - update capture port wxh with rectangle wxh. - add support for HFI_PROPERTY_PARAM_UNCOMPRESSED_PLANE_ACTUAL_INFO to set stride info and chroma offset to FW. Signed-off-by: Dikshita Agarwal <dikshita@codeaurora.org> Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
2021-01-28venus: pm_helpers: Control core power domain manuallyStanimir Varbanov
Presently we use device_link to control core power domain. But this leads to issues because the genpd doesn't guarantee synchronous on/off for supplier devices. Switch to manually control by pmruntime calls. Tested-by: Fritz Koenig <frkoenig@chromium.org> Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
2021-01-28media: platform: Remove depends on interconnectGeorgi Djakov
The dependency on interconnect in the Kconfig was introduced to avoid the case of interconnect=m and driver=y, but the interconnect framework has been converted from tristate to bool now. Remove the dependency as the framework can't be a module anymore. Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
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