diff options
| author | Michal Simek <michal.simek@xilinx.com> | 2021-06-14 17:25:22 +0200 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2021-09-13 08:55:53 +0200 |
| commit | f4df4f58685d081eb0631f95bec0910e8abdfe17 (patch) | |
| tree | 45203d2220b08d20059f405d9b65c9cbb886d5d9 /arch/arm64/boot/dts/xilinx | |
| parent | 7248f5784b8a67f61a622b63d9ad971434524058 (diff) | |
arm64: zynqmp: Enable nand driver for dc2 and dc3
Add description for nand devices on zc1751 dc2 and dc3 boards.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/e103821bdb717132559e780f1a4f4f6fefc95688.1623684253.git.michal.simek@xilinx.com
Diffstat (limited to 'arch/arm64/boot/dts/xilinx')
| -rw-r--r-- | arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts | 26 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dts | 9 |
2 files changed, 34 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts index 1ac105a82e1b..4b4c19034fe1 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts @@ -127,6 +127,32 @@ }; }; +&nand0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_nand0_default>; + arasan,has-mdma; + + nand@0 { + reg = <0x0>; + #address-cells = <0x2>; + #size-cells = <0x1>; + nand-ecc-mode = "soft"; + nand-ecc-algo = "bch"; + nand-rb = <0>; + label = "main-storage-0"; + }; + nand@1 { + reg = <0x1>; + #address-cells = <0x2>; + #size-cells = <0x1>; + nand-ecc-mode = "soft"; + nand-ecc-algo = "bch"; + nand-rb = <0>; + label = "main-storage-1"; + }; +}; + &pinctrl0 { status = "okay"; pinctrl_can0_default: can0-default { diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dts index 4ea6ef5a7f2b..ba7f1f21c579 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP zc1751-xm017-dc3 * - * (C) Copyright 2016 - 2019, Xilinx, Inc. + * (C) Copyright 2016 - 2021, Xilinx, Inc. * * Michal Simek <michal.simek@xilinx.com> */ @@ -107,6 +107,13 @@ clock-frequency = <400000>; }; +/* MT29F64G08AECDBJ4-6 */ +&nand0 { + status = "okay"; + arasan,has-mdma; + num-cs = <2>; +}; + &rtc { status = "okay"; }; |