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| author | Linaro CI <ci_notify@linaro.org> | 2018-12-04 19:26:59 +0000 |
|---|---|---|
| committer | Linaro CI <ci_notify@linaro.org> | 2018-12-04 19:26:59 +0000 |
| commit | f65f9fa35ea5319dc6f6a068eacdef2377f49b7b (patch) | |
| tree | 412439698e696c51ab1cc5c993e2d469393fab01 | |
| parent | 40b68234fb5b1571ff1dcf52a02ba02c21ff7b67 (diff) | |
| parent | e2f1a77c89c845d2520a82ad8e32e8bcf356675b (diff) | |
Merge remote-tracking branch 'qcs404-defconfig/tracking-qcomlt-qcs404-defconfig' into integration-linux-qcomlt
# Conflicts:
# arch/arm64/configs/defconfig
| -rw-r--r-- | arch/arm64/configs/defconfig | 19 |
1 files changed, 14 insertions, 5 deletions
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index a0ba6bb03582..661a40762c47 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -360,6 +360,7 @@ CONFIG_PINCTRL_IPQ8074=y CONFIG_PINCTRL_MSM8916=y CONFIG_PINCTRL_MSM8994=y CONFIG_PINCTRL_MSM8996=y +CONFIG_PINCTRL_QCS404=y CONFIG_PINCTRL_SDM845=y CONFIG_PINCTRL_QDF2XXX=y CONFIG_PINCTRL_QCOM_SPMI_PMIC=y @@ -628,6 +629,7 @@ CONFIG_MSM_GCC_8916=y CONFIG_MSM_GCC_8994=y CONFIG_MSM_MMCC_8996=y CONFIG_QCOM_CLK_APCC_MSM8996=y +CONFIG_QCS_GCC_404=y CONFIG_HWSPINLOCK=y CONFIG_SDM_GCC_845=y CONFIG_HWSPINLOCK_QCOM=y @@ -641,16 +643,21 @@ CONFIG_TEGRA_IOMMU_SMMU=y CONFIG_ARM_SMMU=y CONFIG_ARM_SMMU_V3=y CONFIG_QCOM_IOMMU=y -CONFIG_REMOTEPROC=y -CONFIG_QCOM_ADSP_PIL=y -CONFIG_QCOM_Q6V5_PIL=y -CONFIG_QCOM_SYSMON=y -CONFIG_QCOM_WCNSS_PIL=y CONFIG_RPMSG_QCOM_GLINK_RPM=y CONFIG_RPMSG_QCOM_GLINK_SMEM=y CONFIG_RPMSG_QCOM_SMD=y CONFIG_RASPBERRYPI_POWER=y CONFIG_QCOM_RPMH=y +CONFIG_REMOTEPROC=m +CONFIG_QCOM_Q6V5_MSS=m +CONFIG_QCOM_Q6V5_PAS=m +CONFIG_QCOM_WCNSS_PIL=y +CONFIG_QCOM_SYSMON=m +CONFIG_RPMSG_QCOM_GLINK_RPM=y +CONFIG_RPMSG_QCOM_GLINK_SMEM=m +CONFIG_RPMSG_QCOM_SMD=y +CONFIG_RASPBERRYPI_POWER=y +CONFIG_QCOM_GLINK_SSR=m CONFIG_QCOM_SMEM=y CONFIG_QCOM_SMD_RPM=y CONFIG_QCOM_SMP2P=y @@ -694,6 +701,8 @@ CONFIG_PHY_MVEBU_CP110_COMPHY=y CONFIG_PHY_QCOM_QMP=y CONFIG_PHY_QCOM_QUSB2=y CONFIG_PHY_QCOM_USB_HS=y +CONFIG_PHY_QCOM_USB_HS_SNPS_28NM=y +CONFIG_PHY_QCOM_USB_SS=y CONFIG_PHY_RCAR_GEN3_USB2=y CONFIG_PHY_RCAR_GEN3_USB3=m CONFIG_PHY_ROCKCHIP_EMMC=y |