From 2441803d735c33bdc2130b580a2828cb9dc119dc Mon Sep 17 00:00:00 2001
From: Bjorn Andersson <bjorn.andersson@linaro.org>
Date: Wed, 2 Oct 2019 09:16:01 -0700
Subject: New rr-cache entries from ci-merge

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
 .../thisimage                                      | 95 ++++++++++++++++++++++
 1 file changed, 95 insertions(+)
 create mode 100644 rr-cache/e842df162348f5bcc3dfc88af6ba04eb92cbb175/thisimage

(limited to 'rr-cache/e842df162348f5bcc3dfc88af6ba04eb92cbb175')

diff --git a/rr-cache/e842df162348f5bcc3dfc88af6ba04eb92cbb175/thisimage b/rr-cache/e842df162348f5bcc3dfc88af6ba04eb92cbb175/thisimage
new file mode 100644
index 0000000..1356edb
--- /dev/null
+++ b/rr-cache/e842df162348f5bcc3dfc88af6ba04eb92cbb175/thisimage
@@ -0,0 +1,95 @@
+Binding for the Qualcomm APCS global block
+==========================================
+
+This binding describes the APCS "global" block found in various Qualcomm
+platforms.
+
+- compatible:
+	Usage: required
+	Value type: <string>
+	Definition: must be one of:
+		    "qcom,msm8916-apcs-kpss-global",
+		    "qcom,msm8996-apcs-hmss-global"
+		    "qcom,msm8998-apcs-hmss-global"
+		    "qcom,qcs404-apcs-apps-global"
+		    "qcom,sc7180-apss-shared"
+		    "qcom,sdm845-apss-shared"
+		    "qcom,sm8150-apss-shared"
+<<<<<<<
+=======
+		    "qcom,ipq8074-apcs-apps-global"
+>>>>>>>
+
+- reg:
+	Usage: required
+	Value type: <prop-encoded-array>
+	Definition: must specify the base address and size of the global block
+
+- clocks:
+	Usage: required if #clock-names property is present
+	Value type: <phandle array>
+	Definition: phandles to the two parent clocks of the clock driver.
+
+       Usage: required if #clock-names property is present
+       Value type: <phandle array>
+	Definition: phandles to the two parent clocks of the clock driver.
+
+- #mbox-cells:
+	Usage: required
+	Value type: <u32>
+	Definition: as described in mailbox.txt, must be 1
+
+- #clock-cells:
+	Usage: optional
+	Value type: <u32>
+	Definition: as described in clock.txt, must be 0
+
+- clock-names:
+	Usage: required if the platform data based clock driver needs to
+	retrieve the parent clock names from device tree.
+	This will requires two mandatory clocks to be defined.
+	Value type: <string-array>
+	Definition: must be "aux" and "pll"
+
+= EXAMPLE
+The following example describes the APCS HMSS found in MSM8996 and part of the
+GLINK RPM referencing the "rpm_hlos" doorbell therein.
+
+	apcs_glb: mailbox@9820000 {
+		compatible = "qcom,msm8996-apcs-hmss-global";
+		reg = <0x9820000 0x1000>;
+
+		#mbox-cells = <1>;
+	};
+
+	rpm-glink {
+		compatible = "qcom,glink-rpm";
+
+		interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
+
+		qcom,rpm-msg-ram = <&rpm_msg_ram>;
+
+		mboxes = <&apcs_glb 0>;
+		mbox-names = "rpm_hlos";
+	};
+
+Below is another example of the APCS binding on MSM8916 platforms:
+
+	apcs: mailbox@b011000 {
+		compatible = "qcom,msm8916-apcs-kpss-global";
+		reg = <0xb011000 0x1000>;
+		#mbox-cells = <1>;
+		clocks = <&a53pll>;
+		#clock-cells = <0>;
+	};
+
+Below is another example of the APCS binding on QCS404 platforms:
+
+	apcs_glb: mailbox@b011000 {
+		compatible = "qcom,qcs404-apcs-apps-global", "syscon";
+		reg = <0x0b011000 0x1000>;
+		#mbox-cells = <1>;
+		clocks = <&gcc GCC_GPLL0_AO_OUT_MAIN>, <&apcs_hfpll>;
+		clock-names = "aux", "pll";
+		#clock-cells = <0>;
+	};
-- 
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