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authorHaoran.Wang <elven.wang@nxp.com>2018-03-28 02:38:45 +0800
committerJi Luo <ji.luo@nxp.com>2018-08-20 21:25:43 +0800
commitbbc436a105ec661d40c8418722ab477fd4ea1c35 (patch)
treee7d18af70443c7776c7fec8b74dfbf028a821c35 /arch/arm/include
parent37bc75510a77090231b598adf392fa154bc6ade4 (diff)
[iot] Make dcache inner shareable
As u-boot use no SMP so not care shareable cache. But the Trusty OS will check the memory attr for inner shareable. So add the flag to mark the memory to be inner shareable for ARMv7 only. Change-Id: I322101d01346834aa3fad30ac788fe394336aa1a Signed-off-by: Haoran.Wang <elven.wang@nxp.com>
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/system.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 4f043cad0b..c2d90188e0 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -470,7 +470,11 @@ enum dcache_option {
DCACHE_OFF = TTB_SECT_DOMAIN(0) | TTB_SECT_XN_MASK | TTB_SECT,
DCACHE_WRITETHROUGH = DCACHE_OFF | TTB_SECT_C_MASK,
DCACHE_WRITEBACK = DCACHE_WRITETHROUGH | TTB_SECT_B_MASK,
+#ifdef CONFIG_IMX_TRUSTY_OS
+ DCACHE_WRITEALLOC = DCACHE_WRITEBACK | TTB_SECT_TEX(1) | TTB_SECT_S_MASK,
+#else
DCACHE_WRITEALLOC = DCACHE_WRITEBACK | TTB_SECT_TEX(1),
+#endif
};
#else
#define TTB_SECT_AP (3 << 10)