diff options
| author | Fabio Estevam <fabio.estevam@nxp.com> | 2018-05-14 13:46:58 -0300 |
|---|---|---|
| committer | Ye Li <ye.li@nxp.com> | 2018-05-23 04:15:56 -0700 |
| commit | 8116f34387f8164dd72656fb8278e6df9fdf4c05 (patch) | |
| tree | 1e5b76e6578f25f5998895f8c345e0ab23ec7c5f /arch/arm/include | |
| parent | bddbcaf32a27528c9cf75de9c169e7069d55802f (diff) | |
MLK-18318: mx7ulp: Enable QSPI interrupt as a wakeup source on MX7ULP
MX7ULP needs to have the QSPI interrupt configured as a wakeup source
in the SIM_WKPU_WAKEUP_ENABLE register, otherwise the QSPI interrupts
do not wakeup the CPU from idle mode leading to poor performance in
Linux.
The SIM_WKPU_WAKEUP_ENABLE register only exists in B0 silicon, so
make sure to only write to this register in the B0 version (or greater).
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
(cherry picked from commit 1ab33446d6843f560fb6d14c781f6417225f8f3d)
Diffstat (limited to 'arch/arm/include')
| -rw-r--r-- | arch/arm/include/asm/arch-mx7ulp/imx-regs.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-mx7ulp/imx-regs.h b/arch/arm/include/asm/arch-mx7ulp/imx-regs.h index 7f317809f7..ecc2ebe58c 100644 --- a/arch/arm/include/asm/arch-mx7ulp/imx-regs.h +++ b/arch/arm/include/asm/arch-mx7ulp/imx-regs.h @@ -131,6 +131,9 @@ #define SIM_SOPT1_PMIC_STBY_REQ (1<<2) #define SIM_SOPT1_A7_SW_RESET (1<<0) +#define WKPU_WAKEUP_EN 0x88 +#define WKPU_QSPI_CHANNEL BIT(20) + #define IOMUXC_PCR_MUX_ALT_SHIFT (8) #define IOMUXC_PCR_MUX_ALT_MASK (0xF00) #define IOMUXC_PSMI_IMUX_ALT_SHIFT (0) |