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authorSandrine Bailleux <sandrine.bailleux@arm.com>2014-10-15 15:34:37 +0100
committerSandrine Bailleux <sandrine.bailleux@arm.com>2014-10-15 15:34:37 +0100
commitb622abf8c85e9c311c581b36ec32efc1df1cf73c (patch)
treebad037b1628a4e1038e506d458823cf31ffa87a4 /include/lib/power_management.h
parentc93bc4ad54d155bf1bd298a99df7384f2546701f (diff)
Keep track of the state of the CPUS internally
At the moment, the TFTF relies on the PSCI AFFINITY_INFO call to determine the state of the CPUs in the system. This is wrong because it tells us the EL3 firmware's view of the world, which we can't trust. This patch introduces a mechanism in the framework to keep track of the state of the CPUS, without any dependency on the trusted world. Two new APIs, tftf_cpu_on() and tftf_cpu_off(), are provided to respectively power up and down a core and reflect that in the framework's view of the world. tftf_cpu_on() and tftf_cpu_off() effectively replace the old tftf_enable_core() and tftf_disable_core() APIs so the latter are removed. This patch also introduces a way to keep track of the number of CPUs participating in a test. The framework keeps a reference count which is incremented when a CPU enters the test and decremented when it exits. This allows the framework to know which CPU is the last one to exit the test. This chap is responsible for doing the post-test cleanups and report the overall test result, while the other CPUs shut themselves down. Change-Id: I1f7f2bbe0225a8eae1d67b3ed052d9006ba11a3f
Diffstat (limited to 'include/lib/power_management.h')
-rw-r--r--include/lib/power_management.h110
1 files changed, 110 insertions, 0 deletions
diff --git a/include/lib/power_management.h b/include/lib/power_management.h
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+++ b/include/lib/power_management.h
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+/*
+ * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * Neither the name of ARM nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without specific
+ * prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __POWER_MANAGEMENT_H__
+#define __POWER_MANAGEMENT_H__
+
+#include <stdint.h>
+
+/*
+ * Power up a core.
+ * This uses the PSCI CPU_ON API, which means it relies on the EL3 firmware's
+ * runtime services capabilities.
+ * The core will be boostrapped by the framework before handing it over
+ * to the entry point specified as the 2nd argument.
+ *
+ * target_cpu: MPID of the CPU to power up
+ * entrypoint: Address where the CPU will jump once the framework has
+ * initialised it
+ * context_id: Context identifier as defined by the PSCI specification
+ *
+ * Return: Return code of the PSCI CPU_ON call
+ * (refer to the PSCI specification for details)
+ */
+int tftf_cpu_on(uint64_t target_cpu,
+ uint64_t entrypoint,
+ uint64_t context_id);
+
+/*
+ * Power down the calling core.
+ * This uses the PSCI CPU_OFF API, which means it relies on the EL3 firmware's
+ * runtime services capabilities.
+ *
+ * Return: This function does not return when successful.
+ * Otherwise, return the same error code as the PSCI CPU_OFF call
+ * (refer to the PSCI specification for details)
+ */
+int tftf_cpu_off(void);
+
+
+/* ----------------------------------------------------------------------------
+ * The above APIs might not be suitable in all test scenarios.
+ * A test case could want to bypass those APIs i.e. call the PSCI APIs
+ * directly. In this case, it is the responsibility of the test case to preserve
+ * the state of the framework. The below APIs are provided to this end.
+ * ----------------------------------------------------------------------------
+ */
+
+/*
+ * The 3 following functions are used to manipulate the reference count tracking
+ * the number of CPUs participating in a test.
+ */
+
+/*
+ * Increment the reference count.
+ * Return the new, incremented value.
+ */
+unsigned int tftf_inc_ref_cnt(void);
+
+/*
+ * Decrement the reference count.
+ * Return the new, decremented value.
+ */
+unsigned int tftf_dec_ref_cnt(void);
+
+/* Return the current reference count value */
+unsigned int tftf_get_ref_cnt(void);
+
+/*
+ * Set the calling CPU online/offline. This only adjusts the view of the core
+ * from the framework's point of view, it doesn't actually power up/down the
+ * core.
+ */
+void tftf_set_cpu_online(void);
+void tftf_set_cpu_offline(void);
+
+/*
+ * Query the state of a core.
+ * core_pos: Linear ID of the core
+ * Return: 1 if the core is online, 0 otherwise.
+ */
+unsigned int tftf_is_cpu_online(unsigned int core_pos);
+
+#endif /* __POWER_MANAGEMENT_H__ */