diff options
| author | Soby Mathew <soby.mathew@arm.com> | 2015-11-02 10:56:26 +0000 |
|---|---|---|
| committer | Soby Mathew <soby.mathew@arm.com> | 2016-02-04 16:59:18 +0000 |
| commit | b122cb138c83402a1a5f1b9b04c41bf48ff7cae9 (patch) | |
| tree | 1b268ab206a73d8f1644e0e374059944deac7982 /include/lib/power_management.h | |
| parent | 6c89ade9b2251c81a06759ca3189c8c9e70d0588 (diff) | |
Introduce the ARM GIC layer and refactor GICv2 driver
The TFTF assumed that the GIC driver architecture is v2.0 and made
inherent assumptions about the same in the framework. In order to
add support for GICv3 systems, this assumption needs to be removed
and a new ARM GIC layer is introduced which abstracts the GIC
Architecture details. The `arm_gic.c` and `arm_gic.h` contain the
prototypes and definitions for this new layer. Also the GICv2
driver is refactored such that all the functionality is contained
within the driver and the driver is accessed through well defined
API. This essentially means that the GICv2 specific functionality
present earlier in the interrupt framework and SGI framework is
now removed.
Also certain functionality of GICv2 like clearing the
interrupt target register (GICD_ITARGETSR) to leave an interrupt
untargeted cannot be supported generically in GICv3 and hence it is
removed. The timer framework, which made use of this feature, is
modified to not use it anymore.
All the framework and testcases are modified to use the ARM GIC
layer rather than the GICv2 driver directly. The functionality
common across GICv3 and GICv2 drivers are defined in gic_common.c.
Change-Id: Idf50fa14be42cb4dfb507087e340b0404e681e98
Diffstat (limited to 'include/lib/power_management.h')
| -rw-r--r-- | include/lib/power_management.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/include/lib/power_management.h b/include/lib/power_management.h index d15edab..15d80ae 100644 --- a/include/lib/power_management.h +++ b/include/lib/power_management.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: @@ -175,6 +175,8 @@ void tftf_set_cpu_offline(void); */ unsigned int tftf_is_cpu_online(unsigned int mpid); +unsigned int tftf_is_core_pos_online(unsigned int core_pos); + /* TFTF Suspend helpers */ static inline int tftf_cpu_suspend(unsigned int pwr_state) { |