diff options
| author | Paul Beesley <paul.beesley@arm.com> | 2019-03-13 15:11:04 +0000 |
|---|---|---|
| committer | Paul Beesley <paul.beesley@arm.com> | 2019-05-22 11:28:17 +0100 |
| commit | 29c02529592fb2489edee6c92e418918e5732105 (patch) | |
| tree | 9510a970fc1f7c0779ae1521303edfae4f55ff91 /docs/security_advisories/security-advisory-tfv-8.rst | |
| parent | 8f62ca7b3060b87ede0a55c1972e5d2146a23890 (diff) | |
doc: Set correct syntax highlighting style
Several code blocks do not specify a language for syntax
highlighting. This results in Sphinx using a default highlighter
which is Python.
This patch adds the correct language to each code block that doesn't
already specify it.
Change-Id: Icce1949aabfdc11a334a42d49edf55fa673cddc3
Signed-off-by: Paul Beesley <paul.beesley@arm.com>
Diffstat (limited to 'docs/security_advisories/security-advisory-tfv-8.rst')
| -rw-r--r-- | docs/security_advisories/security-advisory-tfv-8.rst | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/docs/security_advisories/security-advisory-tfv-8.rst b/docs/security_advisories/security-advisory-tfv-8.rst index 5a5ef7cb..c401eb3d 100644 --- a/docs/security_advisories/security-advisory-tfv-8.rst +++ b/docs/security_advisories/security-advisory-tfv-8.rst @@ -39,7 +39,7 @@ CPU context stored on the stack. This includes registers ``x0`` to ``x3``, as can be seen in the ``lib/el3_runtime/aarch64/context.S`` file at line 339 (referring to the version of the code as of `commit c385955`_): -.. code:: c +:: /* * This function restores all general purpose registers except x30 from the |