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author | Sami Mujawar <sami.mujawar@arm.com> | 2019-05-10 14:28:37 +0100 |
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committer | Sami Mujawar <sami.mujawar@arm.com> | 2019-05-14 15:57:10 +0100 |
commit | eca6e45336d81d924948bcff2f3db8488252f17b (patch) | |
tree | 2855adb7871297cd05c897cfa1f8e0ac86cf0468 | |
parent | c33aa45f4400bc7c09fed1300bc59e0e70d36bd8 (diff) |
Disable speculative loads only if SSBS is supported
Examine the ID_AA64PFR1_EL1 bits 7:4 to see if speculative
loads (SSBS) is implemented, before disabling speculative
loads.
Change-Id: I7607c45ed2889260d22a94f6fd9af804520acf67
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
-rw-r--r-- | lib/cpus/aarch64/neoverse_n1.S | 24 |
1 files changed, 22 insertions, 2 deletions
diff --git a/lib/cpus/aarch64/neoverse_n1.S b/lib/cpus/aarch64/neoverse_n1.S index 2038f318..a0babb0e 100644 --- a/lib/cpus/aarch64/neoverse_n1.S +++ b/lib/cpus/aarch64/neoverse_n1.S @@ -49,11 +49,31 @@ func check_errata_1043202 b cpu_rev_var_ls endfunc check_errata_1043202 +/* -------------------------------------------------- + * Disable speculative loads if Neoverse N1 supports + * SSBS. + * + * Shall clobber: x0. + * -------------------------------------------------- + */ +func neoverse_n1_disable_speculative_loads + /* Check if the PE implements SSBS */ + mrs x0, id_aa64pfr1_el1 + tst x0, #(ID_AA64PFR1_EL1_SSBS_MASK << ID_AA64PFR1_EL1_SSBS_SHIFT) + b.eq 1f + + /* Disable speculative loads */ + msr SSBS, xzr + isb + +1: + ret +endfunc neoverse_n1_disable_speculative_loads + func neoverse_n1_reset_func mov x19, x30 - /* Disables speculative loads */ - msr SSBS, xzr + bl neoverse_n1_disable_speculative_loads /* Forces all cacheable atomic instructions to be near */ mrs x0, NEOVERSE_N1_CPUACTLR2_EL1 |