diff options
| author | Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com> | 2017-12-13 13:49:55 -0600 |
|---|---|---|
| committer | Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com> | 2017-12-13 14:55:36 -0600 |
| commit | 684a05c63eb79ccdfe3626815fc45218c076a1c4 (patch) | |
| tree | 39533dbc518987df6e305230b74a795a74becc51 | |
| parent | b08944e4d922423ff3ad1010b29ae97917f4826c (diff) | |
Add low power state requests:rel_imx_4.9.51_8qxp_betarel_imx_4.9.51_8qm_beta2
1. Request to DRC switch to STBY in low power.
2. Set GIC to LP mode once GIC interface has been disabled in low power flow.
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
| -rw-r--r-- | plat/freescale/imx8qm/imx8qm_psci.c | 12 | ||||
| -rw-r--r-- | plat/freescale/imx8qxp/imx8qxp_psci.c | 8 |
2 files changed, 14 insertions, 6 deletions
diff --git a/plat/freescale/imx8qm/imx8qm_psci.c b/plat/freescale/imx8qm/imx8qm_psci.c index c6a6ee80..fd0eb0b2 100644 --- a/plat/freescale/imx8qm/imx8qm_psci.c +++ b/plat/freescale/imx8qm/imx8qm_psci.c @@ -217,6 +217,9 @@ void imx_domain_suspend(const psci_power_state_t *target_state) cci_disable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(mpidr)); + /* Put GIC in LP mode. */ + sc_pm_set_resource_power_mode(ipc_handle, SC_R_GIC, SC_PM_PW_MODE_LP); + if (cluster_id == 0) { sc_pm_set_cpu_resume_addr(ipc_handle, ap_core_index[cpu_id], 0x080000000); sc_pm_req_low_power_mode(ipc_handle, ap_core_index[cpu_id], SC_PM_PW_MODE_OFF); @@ -237,6 +240,9 @@ void imx_domain_suspend_finish(const psci_power_state_t *target_state) else sc_pm_req_low_power_mode(ipc_handle, ap_core_index[cpu_id + 4], SC_PM_PW_MODE_ON); + /* Put GIC back to high power mode. */ + sc_pm_set_resource_power_mode(ipc_handle, SC_R_GIC, SC_PM_PW_MODE_ON); + cci_enable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(mpidr)); plat_gic_cpuif_enable(); @@ -302,14 +308,12 @@ int plat_setup_psci_ops(uintptr_t sec_entrypoint, sc_pm_req_low_power_mode(ipc_handle, SC_R_CCI, SC_PM_PW_MODE_OFF); /* Request RUN and LP modes for DDR, system interconnect etc. */ - sc_pm_req_sys_if_power_mode(ipc_handle, SC_R_A53, SC_PM_SYS_IF_DDR, SC_PM_PW_MODE_ON, SC_PM_PW_MODE_ON); - sc_pm_req_sys_if_power_mode(ipc_handle, SC_R_A72, SC_PM_SYS_IF_DDR, SC_PM_PW_MODE_ON, SC_PM_PW_MODE_ON); + sc_pm_req_sys_if_power_mode(ipc_handle, SC_R_A53, SC_PM_SYS_IF_DDR, SC_PM_PW_MODE_ON, SC_PM_PW_MODE_STBY); + sc_pm_req_sys_if_power_mode(ipc_handle, SC_R_A72, SC_PM_SYS_IF_DDR, SC_PM_PW_MODE_ON, SC_PM_PW_MODE_STBY); sc_pm_req_sys_if_power_mode(ipc_handle, SC_R_A53, SC_PM_SYS_IF_MU, SC_PM_PW_MODE_ON, SC_PM_PW_MODE_LP); sc_pm_req_sys_if_power_mode(ipc_handle, SC_R_A72, SC_PM_SYS_IF_MU, SC_PM_PW_MODE_ON, SC_PM_PW_MODE_LP); sc_pm_req_sys_if_power_mode(ipc_handle, SC_R_A53, SC_PM_SYS_IF_INTERCONNECT, SC_PM_PW_MODE_ON, SC_PM_PW_MODE_OFF); sc_pm_req_sys_if_power_mode(ipc_handle, SC_R_A72, SC_PM_SYS_IF_INTERCONNECT, SC_PM_PW_MODE_ON, SC_PM_PW_MODE_OFF); - sc_pm_req_sys_if_power_mode(ipc_handle, SC_R_A53, SC_PM_SYS_IF_OCMEM, SC_PM_PW_MODE_ON, SC_PM_PW_MODE_OFF); - sc_pm_req_sys_if_power_mode(ipc_handle, SC_R_A72, SC_PM_SYS_IF_OCMEM, SC_PM_PW_MODE_ON, SC_PM_PW_MODE_OFF); return 0; } diff --git a/plat/freescale/imx8qxp/imx8qxp_psci.c b/plat/freescale/imx8qxp/imx8qxp_psci.c index dd8aa3dc..5c0e9d87 100644 --- a/plat/freescale/imx8qxp/imx8qxp_psci.c +++ b/plat/freescale/imx8qxp/imx8qxp_psci.c @@ -182,6 +182,9 @@ void imx_domain_suspend(const psci_power_state_t *target_state) plat_gic_cpuif_disable(); + /* Put GIC in LP mode. */ + sc_pm_set_resource_power_mode(ipc_handle, SC_R_GIC, SC_PM_PW_MODE_LP); + sc_pm_set_cpu_resume_addr(ipc_handle, ap_core_index[cpu_id], 0x080000000); sc_pm_req_low_power_mode(ipc_handle, ap_core_index[cpu_id], SC_PM_PW_MODE_OFF); } @@ -193,6 +196,8 @@ void imx_domain_suspend_finish(const psci_power_state_t *target_state) sc_pm_req_low_power_mode(ipc_handle, ap_core_index[cpu_id], SC_PM_PW_MODE_ON); + /* Put GIC back to high power mode. */ + sc_pm_set_resource_power_mode(ipc_handle, SC_R_GIC, SC_PM_PW_MODE_ON); plat_gic_cpuif_enable(); } @@ -246,10 +251,9 @@ int plat_setup_psci_ops(uintptr_t sec_entrypoint, sc_pm_req_low_power_mode(ipc_handle, SC_R_A35, SC_PM_PW_MODE_OFF); /* Request RUN and LP modes for DDR, system interconnect etc. */ - sc_pm_req_sys_if_power_mode(ipc_handle, SC_R_A35, SC_PM_SYS_IF_DDR, SC_PM_PW_MODE_ON, SC_PM_PW_MODE_ON); + sc_pm_req_sys_if_power_mode(ipc_handle, SC_R_A35, SC_PM_SYS_IF_DDR, SC_PM_PW_MODE_ON, SC_PM_PW_MODE_STBY); sc_pm_req_sys_if_power_mode(ipc_handle, SC_R_A35, SC_PM_SYS_IF_MU, SC_PM_PW_MODE_ON, SC_PM_PW_MODE_LP); sc_pm_req_sys_if_power_mode(ipc_handle, SC_R_A35, SC_PM_SYS_IF_INTERCONNECT, SC_PM_PW_MODE_ON, SC_PM_PW_MODE_OFF); - sc_pm_req_sys_if_power_mode(ipc_handle, SC_R_A35, SC_PM_SYS_IF_OCMEM, SC_PM_PW_MODE_ON, SC_PM_PW_MODE_OFF); return 0; } |