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authorBai Ping <ping.bai@nxp.com>2018-10-12 16:09:50 +0800
committerBai Ping <ping.bai@nxp.com>2018-10-12 16:37:04 +0800
commit30d73be7383282ddf8179390ff7a98485e65b8a7 (patch)
tree674b4bc81dca281e301ffb92df7a5fcdba6c2023
parentef9372ccd226a78f16af6fea00072a45869de5fb (diff)
plat: imx8m: update the DVFS flow for DDR4rel_imx_4.14.62_1.0.0_beta
Update the DDR4 DVFS flow Signed-off-by: Bai Ping <ping.bai@nxp.com> (cherry picked from commit 9aa39de9f366046a363a6754b40e9f277e73adbd)
-rw-r--r--plat/imx/common/imx8m/ddr4_dvfs.c5
1 files changed, 1 insertions, 4 deletions
diff --git a/plat/imx/common/imx8m/ddr4_dvfs.c b/plat/imx/common/imx8m/ddr4_dvfs.c
index 71237f0a..951d1770 100644
--- a/plat/imx/common/imx8m/ddr4_dvfs.c
+++ b/plat/imx/common/imx8m/ddr4_dvfs.c
@@ -162,7 +162,7 @@ void ddr4_dll_change(unsigned int num_rank, unsigned int pstate, unsigned int cu
mmio_setbits_32(DDRC_ZQCTL0(0), (1 << 31));
/* 3. Set RFSHCTL3.dis_auto_refresh=1, to disable automatic refreshes */
- /* mmio_setbits_32(DDRC_RFSHCTL3(0), 0x1); */
+ mmio_setbits_32(DDRC_RFSHCTL3(0), 0x1);
/* 4. Ensure all commands have been flushed from the uMCTL2 by polling */
do {
tmp = 0x36000000 & mmio_read_32(DDRC_DBGCAM(0));
@@ -215,9 +215,6 @@ void ddr4_dll_change(unsigned int num_rank, unsigned int pstate, unsigned int cu
tmp = 0x3f & (mmio_read_32((DDRC_STAT(0))));
} while (tmp != 0x23);
- /* FIXME Set RFSHCTL3.dis_auto_refresh=1, to disable automatic refreshes ??? */
- mmio_setbits_32(DDRC_RFSHCTL3(0), 0x1);
-
/* 11. Set the MSTR.dll_off_mode = 1 or 0. */
if (dll_sw == ON2OFF)
mmio_setbits_32(DDRC_MSTR(0), (1 << 15));