diff options
Diffstat (limited to 'ArmPkg')
26 files changed, 361 insertions, 241 deletions
diff --git a/ArmPkg/ArmPkg.dec b/ArmPkg/ArmPkg.dec index f11243f23..5efef7c9d 100644 --- a/ArmPkg/ArmPkg.dec +++ b/ArmPkg/ArmPkg.dec @@ -2,7 +2,7 @@ # ARM processor package.
#
# Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>
-# Copyright (c) 2011 - 2013, ARM Limited. All rights reserved.
+# Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -38,7 +38,7 @@ UncachedMemoryAllocationLib|Include/Library/UncachedMemoryAllocationLib.h
DefaultExceptionHandlerLib|Include/Library/DefaultExceptionHandlerLib.h
ArmDisassemblerLib|Include/Library/ArmDisassemblerLib.h
-
+
[Guids.common]
gArmTokenSpaceGuid = { 0xBB11ECFE, 0x820F, 0x4968, { 0xBB, 0xA6, 0xF7, 0x6A, 0xFE, 0x30, 0x25, 0x96 } }
@@ -64,10 +64,10 @@ # Set this PCD to TRUE if the Exception Vector is changed to add debugger support before
# it has been configured by the CPU DXE
gArmTokenSpaceGuid.PcdDebuggerExceptionSupport|FALSE|BOOLEAN|0x00000032
-
+
# Define if the Power State Coordination Interface (PSCI) is supported by the Platform Trusted Firmware
gArmTokenSpaceGuid.PcdArmPsciSupport|FALSE|BOOLEAN|0x00000033
-
+
[PcdsFixedAtBuild.common]
gArmTokenSpaceGuid.PcdTrustzoneSupport|FALSE|BOOLEAN|0x00000006
@@ -79,9 +79,9 @@ gArmTokenSpaceGuid.PcdArmCacheOperationThreshold|1024|UINT32|0x00000003
gArmTokenSpaceGuid.PcdCpuVectorBaseAddress|0xffff0000|UINT32|0x00000004
gArmTokenSpaceGuid.PcdCpuResetAddress|0x00000000|UINT32|0x00000005
-
+
#
- # ARM General Interrupt Controller
+ # ARM Generic Interrupt Controller
#
gArmTokenSpaceGuid.PcdGicDistributorBase|0|UINT32|0x0000000C
gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0|UINT32|0x0000000D
@@ -102,10 +102,10 @@ gArmTokenSpaceGuid.PcdFdSize|0|UINT32|0x0000002C
gArmTokenSpaceGuid.PcdFvBaseAddress|0|UINT32|0x0000002D
gArmTokenSpaceGuid.PcdFvSize|0|UINT32|0x0000002E
-
+
#
# ARM Hypervisor Firmware PCDs
- #
+ #
gArmTokenSpaceGuid.PcdHypFdBaseAddress|0|UINT32|0x0000003A
gArmTokenSpaceGuid.PcdHypFdSize|0|UINT32|0x0000003B
gArmTokenSpaceGuid.PcdHypFvBaseAddress|0|UINT32|0x0000003C
@@ -113,21 +113,21 @@ # System Memory (DRAM): These PCDs define the region of in-built system memory
# Some platforms can get DRAM extensions, these additional regions will be declared
- # to UEFI by ArmPLatformPlib
+ # to UEFI by ArmPlatformLib
gArmTokenSpaceGuid.PcdSystemMemoryBase|0|UINT64|0x00000029
gArmTokenSpaceGuid.PcdSystemMemorySize|0|UINT64|0x0000002A
# Use ClusterId + CoreId to identify the PrimaryCore
gArmTokenSpaceGuid.PcdArmPrimaryCoreMask|0xF03|UINT32|0x00000031
- # The Primary Core is ClusterId[0] & CoreId[0]
+ # The Primary Core is ClusterId[0] & CoreId[0]
gArmTokenSpaceGuid.PcdArmPrimaryCore|0|UINT32|0x00000037
#
# ARM L2x0 PCDs
#
gArmTokenSpaceGuid.PcdL2x0ControllerBase|0|UINT32|0x0000001B
-
- #
+
+ #
# BdsLib
#
gArmTokenSpaceGuid.PcdArmMachineType|0|UINT32|0x0000001E
@@ -139,7 +139,7 @@ #
gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|0|UINT32|0x00000034
# ARM Architectural Timer Interrupt(GIC PPI) number
- gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum|29|UINT32|0x00000035
+ gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum|29|UINT32|0x00000035
gArmTokenSpaceGuid.PcdArmArchTimerIntrNum|30|UINT32|0x00000036
[PcdsFixedAtBuild.ARM]
@@ -207,8 +207,8 @@ # By default we do transition to EL2 non-secure mode with Stack for EL2.
# Mode Description Bits
- # NS EL2 SP2 all interupts disabled = 0x3c9
- # NS EL1 SP1 all interupts disabled = 0x3c5
+ # NS EL2 SP2 all interrupts disabled = 0x3c9
+ # NS EL1 SP1 all interrupts disabled = 0x3c5
# Other modes include using SP0 or switching to Aarch32, but these are
# not currently supported.
gArmTokenSpaceGuid.PcdArmNonSecModeTransition|0x3c9|UINT32|0x0000003E
diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/AArch64/ArmCortexA5xHelper.S b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/AArch64/ArmCortexA5xHelper.S new file mode 100644 index 000000000..e5fbc86bc --- /dev/null +++ b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/AArch64/ArmCortexA5xHelper.S @@ -0,0 +1,32 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2013 - 2014, ARM Limited. All rights reserved.
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#------------------------------------------------------------------------------
+
+#include <AsmMacroIoLibV8.h>
+
+.text
+.align 3
+GCC_ASM_EXPORT (ArmReadCpuExCr)
+GCC_ASM_EXPORT (ArmWriteCpuExCr)
+
+ASM_PFX(ArmReadCpuExCr):
+ mrs x0, S3_1_c15_c2_1
+ ret
+
+ASM_PFX(ArmWriteCpuExCr):
+ msr S3_1_c15_c2_1, x0
+ dsb sy
+ isb
+ ret
+
+ASM_FUNCTION_REMOVE_IF_UNREFERENCED
diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/ArmCortexA5xLib.c b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/ArmCortexA5xLib.c index d13c7fd6f..99ee51fb6 100644 --- a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/ArmCortexA5xLib.c +++ b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/ArmCortexA5xLib.c @@ -1,6 +1,6 @@ /** @file
- Copyright (c) 2011-2013, ARM Limited. All rights reserved.
+ Copyright (c) 2011-2014, ARM Limited. All rights reserved.
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
@@ -37,9 +37,17 @@ ArmCpuSetup ( if (ArmIsMpCore ()) {
// Turn on SMP coherency
- ArmSetAuxCrBit (A5X_FEATURE_SMP);
+ ArmSetCpuExCrBit (A5X_FEATURE_SMP);
}
+ //
+ // If CPU is CortexA57 r0p0 apply Errata: 806969
+ //
+ if ((ArmReadMidr () & ((ARM_CPU_TYPE_MASK << 4) | ARM_CPU_REV_MASK)) ==
+ ((ARM_CPU_TYPE_A57 << 4) | ARM_CPU_REV(0,0))) {
+ // DisableLoadStoreWB
+ ArmSetCpuActlrBit (1ULL << 49);
+ }
}
VOID
@@ -48,3 +56,27 @@ ArmCpuSetupSmpNonSecure ( )
{
}
+
+VOID
+EFIAPI
+ArmSetCpuExCrBit (
+ IN UINT64 Bits
+ )
+{
+ UINT64 Value;
+ Value = ArmReadCpuExCr ();
+ Value |= Bits;
+ ArmWriteCpuExCr (Value);
+}
+
+VOID
+EFIAPI
+ArmUnsetCpuExCrBit (
+ IN UINT64 Bits
+ )
+{
+ UINT64 Value;
+ Value = ArmReadCpuExCr ();
+ Value &= ~Bits;
+ ArmWriteCpuExCr (Value);
+}
diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/ArmCortexA5xLib.inf b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/ArmCortexA5xLib.inf index 486aba74a..acfa98d41 100644 --- a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/ArmCortexA5xLib.inf +++ b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/ArmCortexA5xLib.inf @@ -1,5 +1,5 @@ #/* @file
-# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
+# Copyright (c) 2011-2014, ARM Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -31,5 +31,8 @@ [Sources.common]
ArmCortexA5xLib.c
+[Sources.AARCH64]
+ AArch64/ArmCortexA5xHelper.S | GCC
+
[FixedPcd]
gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz
diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexAEMv8Lib/ArmCortexAEMv8Lib.c b/ArmPkg/Drivers/ArmCpuLib/ArmCortexAEMv8Lib/ArmCortexAEMv8Lib.c index d38723f4b..3c85da616 100644 --- a/ArmPkg/Drivers/ArmCpuLib/ArmCortexAEMv8Lib/ArmCortexAEMv8Lib.c +++ b/ArmPkg/Drivers/ArmCpuLib/ArmCortexAEMv8Lib/ArmCortexAEMv8Lib.c @@ -13,11 +13,8 @@ **/
#include <Base.h>
-#include <Library/ArmLib.h>
#include <Library/ArmCpuLib.h>
-#include <Library/ArmGicLib.h>
#include <Library/ArmArchTimerLib.h>
-#include <Library/IoLib.h>
#include <Library/PcdLib.h>
#include <Chipset/ArmAemV8.h>
diff --git a/ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.c b/ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.c index 447ab5631..aae9582a6 100644 --- a/ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.c +++ b/ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.c @@ -2,7 +2,7 @@ Support a Semi Host file system over a debuggers JTAG
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
- Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
+ Portions copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
@@ -544,7 +544,9 @@ FileSetInfo ( if (CompareGuid (InformationType, &gEfiFileSystemInfoGuid) != 0) {
//Status = SetFilesystemInfo (Fcb, BufferSize, Buffer);
} else if (CompareGuid (InformationType, &gEfiFileInfoGuid) != 0) {
- //Status = SetFileInfo (Fcb, BufferSize, Buffer);
+ // Semihosting does not give us access to setting file info, but
+ // if we fail here we cannot create new files.
+ Status = EFI_SUCCESS;
} else if (CompareGuid (InformationType, &gEfiFileSystemVolumeLabelInfoIdGuid) != 0) {
if (StrSize (Buffer) > 0) {
FreePool (mSemihostFsLabel);
diff --git a/ArmPkg/Include/Chipset/AArch64.h b/ArmPkg/Include/Chipset/AArch64.h index e01158850..3e5b55bfd 100644 --- a/ArmPkg/Include/Chipset/AArch64.h +++ b/ArmPkg/Include/Chipset/AArch64.h @@ -1,7 +1,7 @@ /** @file
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
- Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
+ Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
@@ -45,10 +45,15 @@ // MIDR - Main ID Register definitions
#define ARM_CPU_TYPE_MASK 0xFFF
#define ARM_CPU_TYPE_AEMv8 0xD0F
+#define ARM_CPU_TYPE_A53 0xD03
+#define ARM_CPU_TYPE_A57 0xD07
#define ARM_CPU_TYPE_A15 0xC0F
#define ARM_CPU_TYPE_A9 0xC09
#define ARM_CPU_TYPE_A5 0xC05
+#define ARM_CPU_REV_MASK ((0xF << 20) | (0xF) )
+#define ARM_CPU_REV(rn, pn) ((((rn) & 0xF) << 20) | ((pn) & 0xF))
+
// Hypervisor Configuration Register
#define ARM_HCR_FMO BIT3
#define ARM_HCR_IMO BIT4
@@ -116,7 +121,6 @@ ArmDisableAlignmentCheck ( VOID
);
-
VOID
EFIAPI
ArmEnableAlignmentCheck (
diff --git a/ArmPkg/Include/Chipset/ArmCortexA5x.h b/ArmPkg/Include/Chipset/ArmCortexA5x.h index e2217e3f3..ba3d5197e 100644 --- a/ArmPkg/Include/Chipset/ArmCortexA5x.h +++ b/ArmPkg/Include/Chipset/ArmCortexA5x.h @@ -1,6 +1,6 @@ /** @file
- Copyright (c) 2012-2013, ARM Limited. All rights reserved.
+ Copyright (c) 2012-2014, ARM Limited. All rights reserved.
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
@@ -20,4 +20,31 @@ //
#define A5X_FEATURE_SMP (1 << 6)
+//
+// Helper functions to access CPU Extended Control Register
+//
+UINT64
+EFIAPI
+ArmReadCpuExCr (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmWriteCpuExCr (
+ IN UINT64 Val
+ );
+
+VOID
+EFIAPI
+ArmSetCpuExCrBit (
+ IN UINT64 Bits
+ );
+
+VOID
+EFIAPI
+ArmUnsetCpuExCrBit (
+ IN UINT64 Bits
+ );
+
#endif
diff --git a/ArmPkg/Include/Chipset/ArmV7.h b/ArmPkg/Include/Chipset/ArmV7.h index 3fcc4264f..345554eb2 100644 --- a/ArmPkg/Include/Chipset/ArmV7.h +++ b/ArmPkg/Include/Chipset/ArmV7.h @@ -1,7 +1,7 @@ /** @file
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
- Copyright (c) 2011-2013, ARM Ltd. All rights reserved.<BR>
+ Copyright (c) 2011-2014, ARM Ltd. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
@@ -71,10 +71,16 @@ // MIDR - Main ID Register definitions
#define ARM_CPU_TYPE_MASK 0xFFF
+#define ARM_CPU_TYPE_AEMv8 0xD0F
+#define ARM_CPU_TYPE_A53 0xD03
+#define ARM_CPU_TYPE_A57 0xD07
#define ARM_CPU_TYPE_A15 0xC0F
#define ARM_CPU_TYPE_A9 0xC09
#define ARM_CPU_TYPE_A5 0xC05
+#define ARM_CPU_REV_MASK ((0xF << 20) | (0xF) )
+#define ARM_CPU_REV(rn, pn) ((((rn) & 0xF) << 20) | ((pn) & 0xF))
+
#define ARM_VECTOR_TABLE_ALIGNMENT ((1 << 5)-1)
VOID
diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h index 82f0c4b39..a338f7790 100644 --- a/ArmPkg/Include/Library/ArmLib.h +++ b/ArmPkg/Include/Library/ArmLib.h @@ -212,9 +212,9 @@ ArmReadIdPfr1 ( VOID
);
-UINT32
+UINTN
EFIAPI
-Cp15CacheInfo (
+ArmCacheInfo (
VOID
);
@@ -452,18 +452,6 @@ ArmMmuEnabled ( VOID
EFIAPI
-ArmSwitchProcessorMode (
- IN ARM_PROCESSOR_MODE Mode
- );
-
-ARM_PROCESSOR_MODE
-EFIAPI
-ArmProcessorMode (
- VOID
- );
-
-VOID
-EFIAPI
ArmEnableBranchPrediction (
VOID
);
@@ -637,4 +625,33 @@ ArmWriteHVBar ( IN UINTN HypModeVectorBase
);
+
+//
+// Helper functions for accessing CPU ACTLR
+//
+
+UINTN
+EFIAPI
+ArmReadCpuActlr (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmWriteCpuActlr (
+ IN UINTN Val
+ );
+
+VOID
+EFIAPI
+ArmSetCpuActlrBit (
+ IN UINTN Bits
+ );
+
+VOID
+EFIAPI
+ArmUnsetCpuActlrBit (
+ IN UINTN Bits
+ );
+
#endif // __ARM_LIB__
diff --git a/ArmPkg/Include/Library/BdsLib.h b/ArmPkg/Include/Library/BdsLib.h index d16748da4..9fa687041 100644 --- a/ArmPkg/Include/Library/BdsLib.h +++ b/ArmPkg/Include/Library/BdsLib.h @@ -66,6 +66,23 @@ BdsConnectAllDrivers ( VOID
);
+/**
+ Return the value of a global variable defined by its VariableName.
+ The variable must be defined with the VendorGuid gEfiGlobalVariableGuid.
+
+ @param VariableName A Null-terminated string that is the name of the vendor's
+ variable.
+ @param DefaultValue Value returned by the function if the variable does not exist
+ @param DataSize On input, the size in bytes of the return Data buffer.
+ On output the size of data returned in Data.
+ @param Value Value read from the UEFI Variable or copy of the default value
+ if the UEFI Variable does not exist
+
+ @retval EFI_SUCCESS All drivers have been connected
+ @retval EFI_NOT_FOUND No handles match the search.
+ @retval EFI_OUT_OF_RESOURCES There is not resource pool memory to store the matching results.
+
+**/
EFI_STATUS
GetGlobalEnvironmentVariable (
IN CONST CHAR16* VariableName,
@@ -74,6 +91,23 @@ GetGlobalEnvironmentVariable ( OUT VOID** Value
);
+/**
+ Return the value of the variable defined by its VariableName and VendorGuid
+
+ @param VariableName A Null-terminated string that is the name of the vendor's
+ variable.
+ @param VendorGuid A unique identifier for the vendor.
+ @param DefaultValue Value returned by the function if the variable does not exist
+ @param DataSize On input, the size in bytes of the return Data buffer.
+ On output the size of data returned in Data.
+ @param Value Value read from the UEFI Variable or copy of the default value
+ if the UEFI Variable does not exist
+
+ @retval EFI_SUCCESS All drivers have been connected
+ @retval EFI_NOT_FOUND No handles match the search.
+ @retval EFI_OUT_OF_RESOURCES There is not resource pool memory to store the matching results.
+
+**/
EFI_STATUS
GetEnvironmentVariable (
IN CONST CHAR16* VariableName,
diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.inf b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.inf index dca0b22dd..06824e5e7 100644 --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.inf +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.inf @@ -1,7 +1,7 @@ #/** @file
#
# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
-# Portions copyright (c) 2011-2013, ARM Limited. All rights reserved.
+# Portions copyright (c) 2011 - 2014, ARM Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -26,10 +26,12 @@ AArch64Mmu.c
AArch64ArchTimer.c
ArmLibSupportV8.S | GCC
- ../Common/AArch64/ArmLibSupport.S | GCC
AArch64Support.S | GCC
AArch64ArchTimerSupport.S | GCC
+ ../Common/AArch64/ArmLibSupport.S | GCC
+ ../Common/ArmLib.c
+
[Packages]
ArmPkg/ArmPkg.dec
MdePkg/MdePkg.dec
diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64LibSec.inf b/ArmPkg/Library/ArmLib/AArch64/AArch64LibSec.inf index 9bb0bd21d..c273718b3 100644 --- a/ArmPkg/Library/ArmLib/AArch64/AArch64LibSec.inf +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64LibSec.inf @@ -1,6 +1,6 @@ #/* @file
#
-# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
+# Copyright (c) 2011-2014, ARM Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -23,9 +23,9 @@ [Sources.common]
ArmLibSupportV8.S | GCC
AArch64Support.S | GCC
- ArmLib.c
../Common/AArch64/ArmLibSupport.S | GCC
+ ../Common/ArmLib.c
AArch64Lib.c
diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c b/ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c index 9bc984f0b..bababab88 100644 --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c @@ -1,7 +1,7 @@ /** @file
* File managing the MMU for ARMv8 architecture
*
-* Copyright (c) 2011-2013, ARM Limited. All rights reserved.
+* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License
@@ -264,13 +264,22 @@ GetBlockEntryListFromAddress ( BlockEntry = NULL;
// Ensure the parameters are valid
- ASSERT (TableLevel && BlockEntrySize && LastBlockEntry);
+ if (!(TableLevel && BlockEntrySize && LastBlockEntry)) {
+ ASSERT_EFI_ERROR (EFI_INVALID_PARAMETER);
+ return NULL;
+ }
// Ensure the Region is aligned on 4KB boundary
- ASSERT ((RegionStart & (SIZE_4KB - 1)) == 0);
+ if ((RegionStart & (SIZE_4KB - 1)) != 0) {
+ ASSERT_EFI_ERROR (EFI_INVALID_PARAMETER);
+ return NULL;
+ }
// Ensure the required size is aligned on 4KB boundary
- ASSERT ((*BlockEntrySize & (SIZE_4KB - 1)) == 0);
+ if ((*BlockEntrySize & (SIZE_4KB - 1)) != 0) {
+ ASSERT_EFI_ERROR (EFI_INVALID_PARAMETER);
+ return NULL;
+ }
//
// Calculate LastBlockEntry from T0SZ - this is the last block entry of the root Translation table
@@ -427,7 +436,10 @@ FillTranslationTable ( UINTN TableLevel;
// Ensure the Length is aligned on 4KB boundary
- ASSERT ((MemoryRegion->Length > 0) && ((MemoryRegion->Length & (SIZE_4KB - 1)) == 0));
+ if ((MemoryRegion->Length == 0) || ((MemoryRegion->Length & (SIZE_4KB - 1)) != 0)) {
+ ASSERT_EFI_ERROR (EFI_INVALID_PARAMETER);
+ return RETURN_INVALID_PARAMETER;
+ }
// Variable initialization
Attributes = ArmMemoryAttributeToPageAttribute (MemoryRegion->Attributes) | TT_AF;
@@ -519,7 +531,11 @@ ArmConfigureMmu ( UINT64 TCR;
RETURN_STATUS Status;
- ASSERT (MemoryTable != NULL);
+ if(MemoryTable == NULL)
+ {
+ ASSERT (MemoryTable != NULL);
+ return RETURN_INVALID_PARAMETER;
+ }
// Identify the highest address of the memory table
MaxAddress = MemoryTable->PhysicalBase + MemoryTable->Length - 1;
diff --git a/ArmPkg/Library/ArmLib/AArch64/ArmLib.c b/ArmPkg/Library/ArmLib/AArch64/ArmLib.c deleted file mode 100644 index fa95d352d..000000000 --- a/ArmPkg/Library/ArmLib/AArch64/ArmLib.c +++ /dev/null @@ -1,53 +0,0 @@ -/** @file
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
- portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <Base.h>
-
-#include <Library/ArmLib.h>
-#include <Library/DebugLib.h>
-#include <Library/PcdLib.h>
-
-#include "ArmLibPrivate.h"
-
-VOID
-EFIAPI
-ArmCacheInformation (
- OUT ARM_CACHE_INFO *CacheInfo
- )
-{
- if (CacheInfo != NULL) {
- CacheInfo->Type = ArmCacheType();
- CacheInfo->Architecture = ArmCacheArchitecture();
- CacheInfo->DataCachePresent = ArmDataCachePresent();
- CacheInfo->DataCacheSize = ArmDataCacheSize();
- CacheInfo->DataCacheAssociativity = ArmDataCacheAssociativity();
- CacheInfo->DataCacheLineLength = ArmDataCacheLineLength();
- CacheInfo->InstructionCachePresent = ArmInstructionCachePresent();
- CacheInfo->InstructionCacheSize = ArmInstructionCacheSize();
- CacheInfo->InstructionCacheAssociativity = ArmInstructionCacheAssociativity();
- CacheInfo->InstructionCacheLineLength = ArmInstructionCacheLineLength();
- }
-}
-
-VOID
-EFIAPI
-ArmSetAuxCrBit (
- IN UINT32 Bits
- )
-{
- UINT32 val = ArmReadAuxCr();
- val |= Bits;
- ArmWriteAuxCr(val);
-}
diff --git a/ArmPkg/Library/ArmLib/AArch64/ArmLibPrivate.h b/ArmPkg/Library/ArmLib/AArch64/ArmLibPrivate.h deleted file mode 100644 index d2804fc10..000000000 --- a/ArmPkg/Library/ArmLib/AArch64/ArmLibPrivate.h +++ /dev/null @@ -1,82 +0,0 @@ -/** @file
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
- Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef __ARM_LIB_PRIVATE_H__
-#define __ARM_LIB_PRIVATE_H__
-
-#define CACHE_SIZE_4_KB (3UL)
-#define CACHE_SIZE_8_KB (4UL)
-#define CACHE_SIZE_16_KB (5UL)
-#define CACHE_SIZE_32_KB (6UL)
-#define CACHE_SIZE_64_KB (7UL)
-#define CACHE_SIZE_128_KB (8UL)
-
-#define CACHE_ASSOCIATIVITY_DIRECT (0UL)
-#define CACHE_ASSOCIATIVITY_4_WAY (2UL)
-#define CACHE_ASSOCIATIVITY_8_WAY (3UL)
-
-#define CACHE_PRESENT (0UL)
-#define CACHE_NOT_PRESENT (1UL)
-
-#define CACHE_LINE_LENGTH_32_BYTES (2UL)
-
-#define SIZE_FIELD_TO_CACHE_SIZE(x) (((x) >> 6) & 0x0F)
-#define SIZE_FIELD_TO_CACHE_ASSOCIATIVITY(x) (((x) >> 3) & 0x07)
-#define SIZE_FIELD_TO_CACHE_PRESENCE(x) (((x) >> 2) & 0x01)
-#define SIZE_FIELD_TO_CACHE_LINE_LENGTH(x) (((x) >> 0) & 0x03)
-
-#define DATA_CACHE_SIZE_FIELD(x) (((x) >> 12) & 0x0FFF)
-#define INSTRUCTION_CACHE_SIZE_FIELD(x) (((x) >> 0) & 0x0FFF)
-
-#define DATA_CACHE_SIZE(x) (SIZE_FIELD_TO_CACHE_SIZE(DATA_CACHE_SIZE_FIELD(x)))
-#define DATA_CACHE_ASSOCIATIVITY(x) (SIZE_FIELD_TO_CACHE_ASSOCIATIVITY(DATA_CACHE_SIZE_FIELD(x)))
-#define DATA_CACHE_PRESENT(x) (SIZE_FIELD_TO_CACHE_PRESENCE(DATA_CACHE_SIZE_FIELD(x)))
-#define DATA_CACHE_LINE_LENGTH(x) (SIZE_FIELD_TO_CACHE_LINE_LENGTH(DATA_CACHE_SIZE_FIELD(x)))
-
-#define INSTRUCTION_CACHE_SIZE(x) (SIZE_FIELD_TO_CACHE_SIZE(INSTRUCTION_CACHE_SIZE_FIELD(x)))
-#define INSTRUCTION_CACHE_ASSOCIATIVITY(x) (SIZE_FIELD_TO_CACHE_ASSOCIATIVITY(INSTRUCTION_CACHE_SIZE_FIELD(x)))
-#define INSTRUCTION_CACHE_PRESENT(x) (SIZE_FIELD_TO_CACHE_PRESENCE(INSTRUCTION_CACHE_SIZE_FIELD(x)))
-#define INSTRUCTION_CACHE_LINE_LENGTH(x) (SIZE_FIELD_TO_CACHE_LINE_LENGTH(INSTRUCTION_CACHE_SIZE_FIELD(x)))
-
-#define CACHE_TYPE(x) (((x) >> 25) & 0x0F)
-#define CACHE_TYPE_WRITE_BACK (0x0EUL)
-
-#define CACHE_ARCHITECTURE(x) (((x) >> 24) & 0x01)
-#define CACHE_ARCHITECTURE_UNIFIED (0UL)
-#define CACHE_ARCHITECTURE_SEPARATE (1UL)
-
-
-VOID
-CPSRMaskInsert (
- IN UINT32 Mask,
- IN UINT32 Value
- );
-
-UINT32
-CPSRRead (
- VOID
- );
-
-UINT32
-ReadCCSIDR (
- IN UINT32 CSSELR
- );
-
-UINT32
-ReadCLIDR (
- VOID
- );
-
-#endif // __ARM_LIB_PRIVATE_H__
diff --git a/ArmPkg/Library/ArmLib/Arm9/Arm9CacheInformation.c b/ArmPkg/Library/ArmLib/Arm9/Arm9CacheInformation.c index 6180a47de..19da4db25 100644 --- a/ArmPkg/Library/ArmLib/Arm9/Arm9CacheInformation.c +++ b/ArmPkg/Library/ArmLib/Arm9/Arm9CacheInformation.c @@ -1,7 +1,8 @@ /** @file
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
+ Copyright (c) 2014, ARM Limited. All rights reserved.
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -21,7 +22,7 @@ ArmCacheType ( VOID
)
{
- switch (CACHE_TYPE(Cp15CacheInfo()))
+ switch (CACHE_TYPE (ArmCacheInfo ()))
{
case CACHE_TYPE_WRITE_BACK: return ARM_CACHE_TYPE_WRITE_BACK;
default: return ARM_CACHE_TYPE_UNKNOWN;
@@ -34,7 +35,7 @@ ArmCacheArchitecture ( VOID
)
{
- switch (CACHE_ARCHITECTURE(Cp15CacheInfo()))
+ switch (CACHE_ARCHITECTURE (ArmCacheInfo ()))
{
case CACHE_ARCHITECTURE_UNIFIED: return ARM_CACHE_ARCHITECTURE_UNIFIED;
case CACHE_ARCHITECTURE_SEPARATE: return ARM_CACHE_ARCHITECTURE_SEPARATE;
@@ -48,7 +49,7 @@ ArmDataCachePresent ( VOID
)
{
- switch (DATA_CACHE_PRESENT(Cp15CacheInfo()))
+ switch (DATA_CACHE_PRESENT (ArmCacheInfo ()))
{
case CACHE_PRESENT: return TRUE;
case CACHE_NOT_PRESENT: return FALSE;
@@ -62,7 +63,7 @@ ArmDataCacheSize ( VOID
)
{
- switch (DATA_CACHE_SIZE(Cp15CacheInfo()))
+ switch (DATA_CACHE_SIZE (ArmCacheInfo ()))
{
case CACHE_SIZE_4_KB: return 4 * 1024;
case CACHE_SIZE_8_KB: return 8 * 1024;
@@ -80,7 +81,7 @@ ArmDataCacheAssociativity ( VOID
)
{
- switch (DATA_CACHE_ASSOCIATIVITY(Cp15CacheInfo()))
+ switch (DATA_CACHE_ASSOCIATIVITY (ArmCacheInfo ()))
{
case CACHE_ASSOCIATIVITY_4_WAY: return 4;
case CACHE_ASSOCIATIVITY_DIRECT: return 1;
@@ -94,7 +95,7 @@ ArmDataCacheLineLength ( VOID
)
{
- switch (DATA_CACHE_LINE_LENGTH(Cp15CacheInfo()))
+ switch (DATA_CACHE_LINE_LENGTH (ArmCacheInfo ()))
{
case CACHE_LINE_LENGTH_32_BYTES: return 32;
default: return 0;
@@ -107,7 +108,7 @@ ArmInstructionCachePresent ( VOID
)
{
- switch (INSTRUCTION_CACHE_PRESENT(Cp15CacheInfo()))
+ switch (INSTRUCTION_CACHE_PRESENT (ArmCacheInfo ()))
{
case CACHE_PRESENT: return TRUE;
case CACHE_NOT_PRESENT: return FALSE;
@@ -121,7 +122,7 @@ ArmInstructionCacheSize ( VOID
)
{
- switch (INSTRUCTION_CACHE_SIZE(Cp15CacheInfo()))
+ switch (INSTRUCTION_CACHE_SIZE (ArmCacheInfo ()))
{
case CACHE_SIZE_4_KB: return 4 * 1024;
case CACHE_SIZE_8_KB: return 8 * 1024;
@@ -139,7 +140,7 @@ ArmInstructionCacheAssociativity ( VOID
)
{
- switch (INSTRUCTION_CACHE_ASSOCIATIVITY(Cp15CacheInfo()))
+ switch (INSTRUCTION_CACHE_ASSOCIATIVITY (ArmCacheInfo ()))
{
case CACHE_ASSOCIATIVITY_8_WAY: return 8;
case CACHE_ASSOCIATIVITY_4_WAY: return 4;
@@ -154,7 +155,7 @@ ArmInstructionCacheLineLength ( VOID
)
{
- switch (INSTRUCTION_CACHE_LINE_LENGTH(Cp15CacheInfo()))
+ switch (INSTRUCTION_CACHE_LINE_LENGTH (ArmCacheInfo ()))
{
case CACHE_LINE_LENGTH_32_BYTES: return 32;
default: return 0;
diff --git a/ArmPkg/Library/ArmLib/Common/AArch64/ArmLibSupport.S b/ArmPkg/Library/ArmLib/Common/AArch64/ArmLibSupport.S index 12e6d0c82..28db98b41 100644 --- a/ArmPkg/Library/ArmLib/Common/AArch64/ArmLibSupport.S +++ b/ArmPkg/Library/ArmLib/Common/AArch64/ArmLibSupport.S @@ -37,6 +37,8 @@ GCC_ASM_EXPORT (ArmWriteScr) GCC_ASM_EXPORT (ArmWriteMVBar)
GCC_ASM_EXPORT (ArmCallWFE)
GCC_ASM_EXPORT (ArmCallSEV)
+GCC_ASM_EXPORT (ArmReadCpuActlr)
+GCC_ASM_EXPORT (ArmWriteCpuActlr)
#------------------------------------------------------------------------------
@@ -196,5 +198,14 @@ ASM_PFX(ArmCallSEV): sev
ret
+ASM_PFX(ArmReadCpuActlr):
+ mrs x0, S3_1_c15_c2_0
+ ret
+
+ASM_PFX(ArmWriteCpuActlr):
+ msr S3_1_c15_c2_0, x0
+ dsb sy
+ isb
+ ret
ASM_FUNCTION_REMOVE_IF_UNREFERENCED
diff --git a/ArmPkg/Library/ArmLib/Common/Arm/ArmLibSupport.S b/ArmPkg/Library/ArmLib/Common/Arm/ArmLibSupport.S index a3de902cc..08a433cc8 100644 --- a/ArmPkg/Library/ArmLib/Common/Arm/ArmLibSupport.S +++ b/ArmPkg/Library/ArmLib/Common/Arm/ArmLibSupport.S @@ -24,7 +24,7 @@ .text
.align 2
GCC_ASM_EXPORT(ArmReadMidr)
-GCC_ASM_EXPORT(Cp15CacheInfo)
+GCC_ASM_EXPORT(ArmCacheInfo)
GCC_ASM_EXPORT(ArmGetInterruptState)
GCC_ASM_EXPORT(ArmGetFiqState)
GCC_ASM_EXPORT(ArmGetTTBR0BaseAddress)
@@ -47,6 +47,8 @@ GCC_ASM_EXPORT(ArmWriteHVBar) GCC_ASM_EXPORT(ArmCallWFE)
GCC_ASM_EXPORT(ArmCallSEV)
GCC_ASM_EXPORT(ArmReadSctlr)
+GCC_ASM_EXPORT(ArmReadCpuActlr)
+GCC_ASM_EXPORT(ArmWriteCpuActlr)
#------------------------------------------------------------------------------
@@ -54,7 +56,7 @@ ASM_PFX(ArmReadMidr): mrc p15,0,R0,c0,c0,0
bx LR
-ASM_PFX(Cp15CacheInfo):
+ASM_PFX(ArmCacheInfo):
mrc p15,0,R0,c0,c0,1
bx LR
@@ -161,7 +163,6 @@ ASM_PFX(ArmWriteHVBar): mcr p15, 4, r0, c12, c0, 0
bx lr
-
ASM_PFX(ArmReadMVBar):
mrc p15, 0, r0, c12, c0, 1
bx lr
@@ -179,7 +180,17 @@ ASM_PFX(ArmCallSEV): bx lr
ASM_PFX(ArmReadSctlr):
- mrc p15, 0, R0, c1, c0, 0 @ Read SCTLR into R0 (Read control register configuration data)
- bx lr
+ mrc p15, 0, r0, c1, c0, 0 @ Read SCTLR into R0 (Read control register configuration data)
+ bx lr
+
+ASM_PFX(ArmReadCpuActlr):
+ mrc p15, 0, r0, c1, c0, 1
+ bx lr
+
+ASM_PFX(ArmWriteCpuActlr):
+ mcr p15, 0, r0, c1, c0, 1
+ dsb
+ isb
+ bx lr
ASM_FUNCTION_REMOVE_IF_UNREFERENCED
diff --git a/ArmPkg/Library/ArmLib/Common/Arm/ArmLibSupport.asm b/ArmPkg/Library/ArmLib/Common/Arm/ArmLibSupport.asm index cb69f71bc..9e6d57ef6 100644 --- a/ArmPkg/Library/ArmLib/Common/Arm/ArmLibSupport.asm +++ b/ArmPkg/Library/ArmLib/Common/Arm/ArmLibSupport.asm @@ -24,7 +24,7 @@ #endif
EXPORT ArmReadMidr
- EXPORT Cp15CacheInfo
+ EXPORT ArmCacheInfo
EXPORT ArmGetInterruptState
EXPORT ArmGetFiqState
EXPORT ArmGetTTBR0BaseAddress
@@ -47,6 +47,8 @@ EXPORT ArmCallWFE
EXPORT ArmCallSEV
EXPORT ArmReadSctlr
+ EXPORT ArmReadCpuActlr
+ EXPORT ArmWriteCpuActlr
AREA ArmLibSupport, CODE, READONLY
@@ -54,7 +56,7 @@ ArmReadMidr mrc p15,0,R0,c0,c0,0
bx LR
-Cp15CacheInfo
+ArmCacheInfo
mrc p15,0,R0,c0,c0,1
bx LR
@@ -179,6 +181,17 @@ ArmCallSEV ArmReadSctlr
mrc p15, 0, r0, c1, c0, 0 // Read SCTLR into R0 (Read control register configuration data)
- bx lr
+ bx lr
+
+
+ArmReadCpuActlr
+ mrc p15, 0, r0, c1, c0, 1
+ bx lr
+
+ArmWriteCpuActlr
+ mcr p15, 0, r0, c1, c0, 1
+ dsb
+ isb
+ bx lr
END
diff --git a/ArmPkg/Library/ArmLib/Common/ArmLib.c b/ArmPkg/Library/ArmLib/Common/ArmLib.c index a7b9551ba..72d5af4a5 100644 --- a/ArmPkg/Library/ArmLib/Common/ArmLib.c +++ b/ArmPkg/Library/ArmLib/Common/ArmLib.c @@ -1,7 +1,7 @@ /** @file
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
- Copyright (c) 2011 - 2012, ARM Ltd. All rights reserved.<BR>
+ Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
@@ -43,41 +43,50 @@ ArmCacheInformation ( VOID
EFIAPI
-ArmSwitchProcessorMode (
- IN ARM_PROCESSOR_MODE Mode
+ArmSetAuxCrBit (
+ IN UINT32 Bits
)
{
- CPSRMaskInsert(ARM_PROCESSOR_MODE_MASK, Mode);
+ UINT32 val = ArmReadAuxCr();
+ val |= Bits;
+ ArmWriteAuxCr(val);
}
-
-ARM_PROCESSOR_MODE
+VOID
EFIAPI
-ArmProcessorMode (
- VOID
+ArmUnsetAuxCrBit (
+ IN UINT32 Bits
)
{
- return (ARM_PROCESSOR_MODE)(CPSRRead() & (UINT32)ARM_PROCESSOR_MODE_MASK);
+ UINT32 val = ArmReadAuxCr();
+ val &= ~Bits;
+ ArmWriteAuxCr(val);
}
+//
+// Helper functions for accessing CPUACTLR
+//
+
VOID
EFIAPI
-ArmSetAuxCrBit (
- IN UINT32 Bits
+ArmSetCpuActlrBit (
+ IN UINTN Bits
)
{
- UINT32 val = ArmReadAuxCr();
- val |= Bits;
- ArmWriteAuxCr(val);
+ UINTN Value;
+ Value = ArmReadCpuActlr ();
+ Value |= Bits;
+ ArmWriteCpuActlr (Value);
}
VOID
EFIAPI
-ArmUnsetAuxCrBit (
- IN UINT32 Bits
+ArmUnsetCpuActlrBit (
+ IN UINTN Bits
)
{
- UINT32 val = ArmReadAuxCr();
- val &= ~Bits;
- ArmWriteAuxCr(val);
+ UINTN Value;
+ Value = ArmReadCpuActlr ();
+ Value &= ~Bits;
+ ArmWriteCpuActlr (Value);
}
diff --git a/ArmPkg/Library/BdsLib/BdsHelper.c b/ArmPkg/Library/BdsLib/BdsHelper.c index fb2ac9b80..1d4aa3572 100644 --- a/ArmPkg/Library/BdsLib/BdsHelper.c +++ b/ArmPkg/Library/BdsLib/BdsHelper.c @@ -331,7 +331,7 @@ GetEnvironmentVariable ( *Size,
DefaultValue
);
- *Value = DefaultValue;
+ *Value = AllocateCopyPool (*Size, DefaultValue);
} else {
return EFI_NOT_FOUND;
}
@@ -352,7 +352,7 @@ GetEnvironmentVariable ( *Size = VariableSize;
}
} else {
- *Value = DefaultValue;
+ *Value = AllocateCopyPool (*Size, DefaultValue);
return Status;
}
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/AArch64/memset.c b/ArmPkg/Library/CompilerIntrinsicsLib/AArch64/memset.c new file mode 100644 index 000000000..069c932a6 --- /dev/null +++ b/ArmPkg/Library/CompilerIntrinsicsLib/AArch64/memset.c @@ -0,0 +1,25 @@ +/** @file
+
+ Copyright (c) 2014, ARM Ltd. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <Base.h>
+
+void *memset(void *Destination, int Value, int Count)
+{
+ CHAR8 *Ptr = Destination;
+
+ while (Count--)
+ *Ptr++ = Value;
+
+ return Destination;
+}
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf b/ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf index 3e95105cd..d230da296 100644 --- a/ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf +++ b/ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf @@ -24,6 +24,7 @@ [Sources.AARCH64]
AArch64/memcpy.S | GCC
+ AArch64/memset.c
[Sources.ARM]
Arm/mullu.asm | RVCT
diff --git a/ArmPkg/Library/SemihostLib/SemihostLib.c b/ArmPkg/Library/SemihostLib/SemihostLib.c index 87c0379d6..53405edd7 100644 --- a/ArmPkg/Library/SemihostLib/SemihostLib.c +++ b/ArmPkg/Library/SemihostLib/SemihostLib.c @@ -1,7 +1,8 @@ /** @file
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
+ Copyright (c) 2013 - 2014, ARM Ltd. All rights reserved.<BR>
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -73,10 +74,12 @@ SemihostFileSeek ( Result = Semihost_SYS_SEEK(&SeekBlock);
- if (Result == 0) {
- return RETURN_SUCCESS;
- } else {
+ // Semihosting does not behave as documented. It returns the offset on
+ // success.
+ if (Result < 0) {
return RETURN_ABORTED;
+ } else {
+ return RETURN_SUCCESS;
}
}
@@ -100,7 +103,7 @@ SemihostFileRead ( Result = Semihost_SYS_READ(&ReadBlock);
- if (Result == *Length) {
+ if ((*Length != 0) && (Result == *Length)) {
return RETURN_ABORTED;
} else {
*Length -= Result;
@@ -126,8 +129,11 @@ SemihostFileWrite ( WriteBlock.Length = *Length;
*Length = Semihost_SYS_WRITE(&WriteBlock);
-
- return RETURN_SUCCESS;
+
+ if (*Length != 0)
+ return RETURN_ABORTED;
+ else
+ return RETURN_SUCCESS;
}
RETURN_STATUS
@@ -174,6 +180,11 @@ SemihostFileRemove ( SEMIHOST_FILE_REMOVE_BLOCK RemoveBlock;
UINT32 Result;
+ // Remove any leading separator (e.g.: '\'). EFI Shell adds one.
+ if (*FileName == '\\') {
+ FileName++;
+ }
+
RemoveBlock.FileName = FileName;
RemoveBlock.NameLength = AsciiStrLen(FileName);
diff --git a/ArmPkg/Library/SemihostLib/SemihostPrivate.h b/ArmPkg/Library/SemihostLib/SemihostPrivate.h index 02836ca28..c4bc4c0ec 100644 --- a/ArmPkg/Library/SemihostLib/SemihostPrivate.h +++ b/ArmPkg/Library/SemihostLib/SemihostPrivate.h @@ -1,6 +1,7 @@ /** @file
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+ Copyright (c) 2013 - 2014, ARM Ltd. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
@@ -17,29 +18,29 @@ typedef struct {
CHAR8 *FileName;
- UINT32 Mode;
- UINT32 NameLength;
+ UINTN Mode;
+ UINTN NameLength;
} SEMIHOST_FILE_OPEN_BLOCK;
typedef struct {
- UINT32 Handle;
+ UINTN Handle;
VOID *Buffer;
- UINT32 Length;
+ UINTN Length;
} SEMIHOST_FILE_READ_WRITE_BLOCK;
typedef struct {
- UINT32 Handle;
- UINT32 Location;
+ UINTN Handle;
+ UINTN Location;
} SEMIHOST_FILE_SEEK_BLOCK;
typedef struct {
CHAR8 *FileName;
- UINT32 NameLength;
+ UINTN NameLength;
} SEMIHOST_FILE_REMOVE_BLOCK;
typedef struct {
CHAR8 *CommandLine;
- UINT32 CommandLength;
+ UINTN CommandLength;
} SEMIHOST_SYSTEM_BLOCK;
#if defined(__CC_ARM)
|