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2013-03-19hs_defconfig: enable hisilicon nand flash drivernand_branchMingjun Zhang
enable hisilicon nand flash driver Signed-off-by: Mingjun Zhang <zhang.mingjun@linaro.org>
2013-03-18yaffs2: add yaffs2 filesystem supportMingjun Zhang
add yaffs2 filesystem support, also config auto select yaffs2 when using hisilicon nfc driver. Signed-off-by: Mingjun Zhang <zhang.mingjun@linaro.org>
2013-03-18ARM: hs: add flash node in hi3716.dtsiMingjun Zhang
add flash node in hi3716.dtsi, also document binding rules Signed-off-by: Mingjun Zhang <zhang.mingjun@linaro.org>
2013-03-18mtd: nand: hs nfc: support hisilicon nand flash controllerMingjun Zhang
Hisilicon nfc is a powerful nand flash controller with dma and hardware ecc functions. This driver supports some non-standard nand chips, included in the driver's nand ids table. Signed-off-by: Mingjun Zhang <zhang.mingjun@linaro.org>
2013-03-14Merge remote-tracking branch 'origin/testing/sync_pinmux' into ↵Guodong Xu
integration-linux-mainline
2013-03-13Document: sync pinctrl single documenttesting/sync_pinmuxHaojian Zhuang
Sync pinctrl single document with 3.10. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2013-03-13ARM: hs: refresh pin configuration in dtsHaojian Zhuang
Now node names can't be same. Otherwise, pinmux setting would be dropped. Sync properties with 3.10 at the same time. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2013-03-13pinctrl: single: sync code with latest next treeHaojian Zhuang
pinctrl-single is updated on 3.10. The interface on pin configurations are changed. So sync latest code into code base. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2013-03-13pinctrl: check pinctrl ready for gpio rangeHaojian Zhuang
pinctrl_get_device_gpio_range() only checks whether a certain GPIO pin is in gpio range. But maybe some GPIO pins don't have back-end pinctrl interface, it means that these pins are always configured as GPIO function. For example, gpio159 isn't related to back-end pinctrl device in Hi3620 while other GPIO pins are related to back-end pinctrl device. Append pinctrl_ready_for_gpio_range() that is used to check whether pinctrl device with GPIO range is ready. This function will be called after pinctrl_get_device_gpio_range() fails. If pinctrl device with GPIO range is found, it means that pinctrl device is already launched and a certain GPIO pin just don't have back-end pinctrl interface. Then pinctrl_request_gpio() shouldn't return -EPROBE_DEFER in this case. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-13pinctrl: generic: rename input schmitt disableHaojian Zhuang
Rename PIN_CONFIG_INPUT_SCHMITT_DISABLE to PIN_CONFIG_INPUT_SCHMITT_ENABLE. It's used to make it more generialize. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-13pinctrl: pinconf-generic: add drive strength parameterMaxime Ripard
Some pin configurations IP allows to set the current output to the pin. This patch adds such a parameter to the pinconf-generic mechanism. This parameter takes as argument the drive strength in mA. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-22ARM: hs: enable hotplug and reboothotplugZhangfei Gao
Hisilicon require system register to enable/disable cpu How to test: cat proc/interrupts echo 0 > /sys/devices/system/cpu/cpuX/online cat proc/interrupts echo 1 > /sys/devices/system/cpu/cpuX/online reboot Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org> Tested-by: Zhang Mingjun <zhang.mingjun@linaro.org>
2013-02-21ARM: hs: add twd timerZhangfei Gao
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
2013-02-21ARM: hs: add l2 aux prop in hi3716.dtsiMingjun Zhang
add l2 aux prop in hi3716.dtsi Signed-off-by: Mingjun Zhang <zhang.mingjun@linaro.org>
2013-02-21mtd: hs sfc: fix the io reg reading bugMingjun Zhang
sfc350's io registers don't support byte reading(memcpy may produce byte reading instruction). Using readl instead of memcpy when dealing with the io regsters. Signed-off-by: Mingjun Zhang <zhang.mingjun@linaro.org>
2013-02-21hs_defconfig: Enable mtd and jffs2Guodong Xu
Enable mtd and jffs2 Signed-off-by: Mingjun <zhang.mingjun@linaro.org>
2013-02-21hs_defconfig: Enable Hi6421 mfd and regulatorsGuodong Xu
Enable Hi6421 mfd and regulators. Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
2013-02-21mfd: hi6421: decouple dependency over hi6421 regulatorGuodong Xu
Use different of match table for hi6421 pmic's child devices and hi6421 regulators. This is to decouple its dependency over hi6421 regulator. Coding style modifications are included as well. Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
2013-02-21ARM: hs: remove version prop from flash node in dtsMingjun
remove sfc version prop from flash node in hi3716-dkb.dts Signed-off-by: Mingjun <zhang.mingjun@linaro.org>
2013-02-21mtd: hs sfc: remove dead code and fix code style issueMingjun
remove dead code and fix code style issues, still need to rewrite the dma wait looping to wait event timeout. Signed-off-by: Mingjun <zhang.mingjun@linaro.org>
2013-02-21ARM: hs: add dma clk dependenceZhangfei Gao
DMA need two clks to work, enable acp_clk here 1. 0xfc800000 + 0x50, bit 10 2. 0xfcA09000 + 0x30, bit 28, acp_clk Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
2013-02-21hs_defconfig: Enable K3 DMA and I2CGuodong Xu
Enable K3 DMA and Designware I2C for HiSilicon Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
2013-02-21ARM: hs: set gate clock flag to 0LiXin
Set gate clock falg to 0, the seventh parameter should be 0 for hi3620. Signed-off-by: LiXin <li.xin@linaro.org>
2013-02-21ARM: hs: add static to global varialbesLiXin
Add static to global varialbe in clk-hs.c. Signed-off-by: LiXin <li.xin@linaro.org>
2013-02-21ARM: dts: add clock for i2c,rtc,dmacLiXin
Add clock dts for i2c, rtc, dmac. Signed-off-by: LiXin <li.xin@linaro.org>
2013-02-21ARM: hs: solve sysctrl conflictLiXin
Solve sysctrl redefine for hi3620. Signed-off-by: LiXin <li.xin@linaro.org>
2013-02-21ARM: hs: compatible with hi3716Zhangfei Gao
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
2013-02-21regulator: hi6421: remove debugging printkGuodong Xu
Remove debugging printk()'s added during hi6421 regulator driver development. Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
2013-02-21regulator: hi6421: refactored as children of MFD device and more opsGuodong Xu
Refactored hi6421 regulators as children of MFD device, and add more regulator operation functions. Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
2013-02-21mfd: hi6421: add mfd core driverGuodong Xu
Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
2013-02-21regulator: hi6421: add more properties in dtsGuodong Xu
2013-02-21regulator:hi6421, update dtsGuodong Xu
2013-02-21regulator: hi6421 compilation error fixedGuodong Xu
2013-02-21regulator: hi6421 driver for each regulatorGuodong Xu
2013-02-21add regulators to hi4511.dts initialGuodong Xu
2013-02-21regulator:hs:add hi6421 dts supportGuodong Xu
2013-02-21ARM: hs: add clock driver to hi4511LiXin
Add clock driver based on common clock framework to hi4511. Signed-off-by: LiXin <li.xin@linaro.org>
2013-02-21HS: add SFC nodeMingjun Zhang
also add mtdparts in choose for easier use Signed-off-by: Mingjun Zhang <troy.zhangmingjun@huawei.com>
2013-02-21mtd: HS SFC: add SFC driver for serial NOR flashMingjun Zhang
Hisilicon Serial NOR Flash controller provide three ways to access the serial NOR flash chip: by reg interface, mapping it to a range of bus address and using dma. This driver implement the dma read/write ops and reg erase ops. Signed-off-by: Mingjun Zhang <troy.zhangmingjun@huawei.com>
2013-02-21ARM: hs: add dma and i2c resourceZhangfei Gao
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
2013-02-21i2c: designware: Add i2c-designware-hs.cZhangfei Gao
Add support hisilicon i2c driver, which reuse designware i2c ip Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
2013-02-21i2c-designware: support no DW_IC_COMP_TYPE platformZhangfei Gao
Check accessor_flags before reading DW_IC_COMP_TYPE Give chance to platform no such register Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
2013-02-21dmaengine: Add hisilicon k3 DMA engine driverZhangfei Gao
Add dmaengine driver for hisilicon k3 platform based on virt_dma Tested with dmatest.ko Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
2013-02-21dmaengine: add helper function to request a slave DMA channelJon Hunter
Currently slave DMA channels are requested by calling dma_request_channel() and requires DMA clients to pass various filter parameters to obtain the appropriate channel. With device-tree being used by architectures such as arm and the addition of device-tree helper functions to extract the relevant DMA client information from device-tree, add a new function to request a slave DMA channel using device-tree. This function is currently a simple wrapper that calls the device-tree of_dma_request_slave_channel() function. Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Russell King <linux@arm.linux.org.uk> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Vinod Koul <vinod.koul@intel.com> Cc: Dan Williams <djbw@fb.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jon Hunter <jon-hunter@ti.com> Reviewed-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2013-02-21dmaengine: fix !of_dma compilation warningVinod Koul
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Reported-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2013-02-21of: dma: fix protection of DMA controller data stored by DMA helpersJon Hunter
In the current implementation of the OF DMA helpers, read-copy-update (RCU) linked lists are being used for storing and accessing the DMA controller data. This part of implementation is based upon V2 of the DMA helpers by Nicolas [1]. During a recent review of RCU, it became apparent that the code is missing the required rcu_read_lock()/unlock() calls as well as synchronisation calls before freeing any memory protected by RCU. Having looked into adding the appropriate RCU calls to protect the DMA data it became apparent that with the current DMA helper implementation, using RCU is not as attractive as it may have been before. The main reasons being that ... 1. We need to protect the DMA data around calls to the xlate function. 2. The of_dma_simple_xlate() function calls the DMA engine function dma_request_channel() which employs a mutex and so could sleep. 3. The RCU read-side critical sections must not sleep and so we cannot hold an RCU read lock around the xlate function. Therefore, instead of using RCU, an alternative for this use-case is to employ a simple spinlock inconjunction with a usage count variable to keep track of how many current users of the DMA data structure there are. With this implementation, the DMA data cannot be freed until all current users of the DMA data are finished. This patch is based upon the DMA helpers fix for potential deadlock [2]. [1] http://article.gmane.org/gmane.linux.ports.arm.omap/73622 [2] http://marc.info/?l=linux-arm-kernel&m=134859982520984&w=2 Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2013-02-21of: dma- fix build break for !CONFIG_OFVinod Koul
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2013-02-21of: dma: fix potential deadlock when requesting a slave channelJon Hunter
In the latest version of the OF dma handlers I added support (rather hastily) to exhaustively search for an available dma slave channel, for the use-case where we have alternative slave channels that can be used. In the current implementation a deadlock scenario can occur causing the CPU to loop forever. The scenario is as follows ... 1. There are alternative channels avaialble 2. The first channel that is found by calling of_dma_find_channel() is not available and so the call to the xlate function returns NULL. In this case we will call of_dma_find_channel() again but we will return the same channel that we found the first time and hence, again the xlate will return NULL and we will loop here forever. Fix this potential deadlock by just using a single for-loop and not a for-loop nested in a do-while loop. This change also replaces the function of_dma_find_channel() with of_dma_match_channel() which performs a simple check to see if a DMA channel matches the name specified. I have tested this implementation on an OMAP4 panda board by adding a dummy DMA specifier, that will cause the xlate function to return NULL, to the beginning of a list of DMA specifiers for a DMA client. Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Russell King <linux@arm.linux.org.uk> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Vinod Koul <vinod.koul@intel.com> Cc: Dan Williams <djbw@fb.com> Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2013-02-21of: Add generic device tree DMA helpersJon Hunter
This is based upon the work by Benoit Cousson [1] and Nicolas Ferre [2] to add some basic helpers to retrieve a DMA controller device_node and the DMA request/channel information. Aim of DMA helpers - The purpose of device-tree is to describe the capabilites of the hardware. Thinking about DMA controllers purely from the context of the hardware to begin with, we can describe a device in terms of a DMA controller as follows ... 1. Number of DMA controllers 2. Number of channels (maybe physical or logical) 3. Mapping of DMA requests signals to DMA controller 4. Number of DMA interrupts 5. Mapping of DMA interrupts to channels - With the above in mind the aim of the DT DMA helper functions is to extract the above information from the DT and provide to the appropriate driver. However, due to the vast number of DMA controllers and not all are using a common driver (such as DMA Engine) it has been seen that this is not a trivial task. In previous discussions on this topic the following concerns have been raised ... 1. How does the binding support devices with multiple DMA controllers? 2. How to support both legacy DMA controllers not using DMA Engine as well as those that support DMA Engine. 3. When using with DMA Engine how do we support the various implementations where the opaque filter function parameter differs between implementations? 4. How do we handle DMA channels that are identified with a string versus a integer? - Hence the design of the DMA helpers has to accomodate the above or align on an agreement what can be or should be supported. Design of DMA helpers 1. Registering DMA controllers In the case of DMA controllers that are using DMA Engine, requesting a channel is performed by calling the following function. struct dma_chan *dma_request_channel(dma_cap_mask_t mask, dma_filter_fn filter_fn, void *filter_param); The mask variable is used to match a type of the device controller in a list of controllers. The filter_fn and filter_param are used to identify the required dma channel and return a handle to the dma channel of type dma_chan. From the examples I have seen, the mask and filter_fn are constant for a given DMA controller and therefore, we can specify these as controller specific data when registering the DMA controller with the device-tree DMA helpers. The filter_param variable is of an unknown type and is typically specific to the DMA engine implementation for a given DMA controller. To allow some flexibility in the type and formating of this filter_param we employ an xlate to translate the device-tree binding information into the appropriate format. The xlate function used for a DMA controller can also be specified when registering the DMA controller with the device-tree DMA helpers. Based upon the above, a function for registering the DMA controller with the DMA helpers now looks like the below. The data variable is used to pass a pointer to DMA controller specific data used by the xlate function. int of_dma_controller_register(struct device_node *np, struct dma_chan *(*of_dma_xlate) (struct of_phandle_args *, struct of_dma *), void *data) For example, in the case where DMA engine is used, we define the following structure (that stores the DMA engine capability mask and filter function) and pass this to the data variable in the above function. struct of_dma_filter_info { dma_cap_mask_t dma_cap; dma_filter_fn filter_fn; }; 2. Representing and requesting channel information Please see the dma binding documentation included in this patch for a description of how DMA controllers and client information should be represented with device-tree. For more information on how this binding came about please see [3]. In addition to this, feedback received from the Linux kernel summit showed a consensus (among those who attended) to use a name to identify DMA client information [4]. A DMA channel can be requested by calling the following function, where name is a required parameter used for identifying a DMA channel. This function has been designed to return a structure of type dma_chan to work with the DMA engine driver. Note that if DMA engine is used then drivers should be using the DMA engine API dma_request_slave_channel() (implemented in part 2 of this series, "dmaengine: add helper function to request a slave DMA channel") which will in turn call the below function if device-tree is present. The aim being to have a common DMA engine interface regardless of whether device tree is being used. struct dma_chan *of_dma_request_slave_channel(struct device_node *np, char *name) 3. Supporting legacy devices not using DMA Engine These devices present a problem, as there may not be a uniform way to easily support them with regard to device tree. Ideally, these should be migrated to DMA engine. However, if this is not possible, then they should still be able to use this binding, the only constaint imposed by this implementation is that when requesting a DMA channel via of_dma_request_slave_channel(), it will return a type of dma_chan. This implementation has been tested on OMAP4430 using the kernel v3.6-rc5. I have validated that MMC is working on the PANDA board with this implementation. My development branch for testing on OMAP can be found here [5]. v6: - minor corrections in DMA binding documentation v5: - minor update to binding documentation - added loop to exhaustively search for a slave channel in the case where there could be alternative channels available v4: - revert the removal of xlate function from v3 - update the proposed binding format and APIs based upon discussions [3] v3: - avoid passing an xlate function and instead pass DMA engine parameters - define number of dma channels and requests in dma-controller node v2: - remove of_dma_to_resource API - make property #dma-cells required (no fallback anymore) - another check in of_dma_xlate_onenumbercell() function [1] http://article.gmane.org/gmane.linux.drivers.devicetree/12022 [2] http://article.gmane.org/gmane.linux.ports.arm.omap/73622 [3] http://marc.info/?l=linux-omap&m=133582085008539&w=2 [4] http://pad.linaro.org/arm-mini-summit-2012 [5] https://github.com/jonhunter/linux/tree/dev-dt-dma Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Russell King <linux@arm.linux.org.uk> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Vinod Koul <vinod.koul@intel.com> Cc: Dan Williams <djbw@fb.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Jon Hunter <jon-hunter@ti.com> Reviewed-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2013-02-21ARM: hs: add smp resource to dtsZhangfei Gao
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>