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Diffstat (limited to 'arch/arm/mach-hs/hs-dt.c')
-rw-r--r--arch/arm/mach-hs/hs-dt.c50
1 files changed, 50 insertions, 0 deletions
diff --git a/arch/arm/mach-hs/hs-dt.c b/arch/arm/mach-hs/hs-dt.c
index 8394a26dc5c5..e9f46433da05 100644
--- a/arch/arm/mach-hs/hs-dt.c
+++ b/arch/arm/mach-hs/hs-dt.c
@@ -26,6 +26,7 @@
#include <asm/mach/time.h>
#include <asm/smp_plat.h>
#include <asm/proc-fns.h>
+#include <asm/smp_twd.h>
static void __iomem *hs_sctrl_base;
static int hs_smp_reg;
@@ -35,12 +36,19 @@ static void __init hs_map_io(void)
{
struct device_node *np;
+ printk("gzf %s\n", __func__);
np = of_find_compatible_node(NULL, NULL, "hisilicon,sysctrl");
hs_sctrl_base = of_iomap(np, 0);
of_property_read_u32(np, "smp_reg", &hs_smp_reg);
of_property_read_u32(np, "reset_reg", &hs_reset_reg);
}
+void __init kirkwood_init_early(void)
+{
+ printk("gzf %s\n", __func__);
+// hs_map_io();
+}
+
void hs_set_cpu_jump(int cpu, void *jump_addr)
{
int offset = hs_smp_reg;
@@ -51,6 +59,25 @@ void hs_set_cpu_jump(int cpu, void *jump_addr)
writel(virt_to_phys(jump_addr), hs_sctrl_base + offset);
}
+/* enable timer bit */
+#define TIMER2_ENABLE_BIT 1<<3
+#define TIMER3_ENABLE_BIT 1<<4
+
+void local_timer_clkenable(int cpu)
+{
+ unsigned long ctrl=0;
+
+ if((cpu == 1)||(cpu == 2)){
+ //BIT MAP, only bit 1 take effect.
+ ctrl = TIMER2_ENABLE_BIT;
+ writel(ctrl,(hs_sctrl_base+0x40));
+ }
+ else if(cpu == 3){
+ ctrl = TIMER3_ENABLE_BIT;
+ writel(ctrl,(hs_sctrl_base+0x40));
+ }
+}
+
static struct of_device_id hs_timer_match[] __initdata = {
{ .compatible = "arm,sp804", },
{}
@@ -61,12 +88,19 @@ static struct clk_lookup sp804_lookup = {
.clk = NULL,
};
+static struct clk_lookup twd_lookup = {
+ .dev_id = "smp_twd",
+ .clk = NULL,
+};
+
extern void __init hs_init_clocks(void);
+extern void __init hs_local_timer_of_register(void);
static void __init hs_timer_init(void)
{
struct device_node *node = NULL;
void __iomem *base;
int irq;
+ printk("gzf %s\n", __func__);
hs_init_clocks();
@@ -83,11 +117,25 @@ static void __init hs_timer_init(void)
irq = irq_of_parse_and_map(node, 0);
WARN_ON(!irq);
+ printk("irq=%d\n", irq);
+
sp804_lookup.clk = of_clk_get(node, 0);
clkdev_add(&sp804_lookup);
sp804_clocksource_and_sched_clock_init(base + TIMER_2_BASE, "timer1");
sp804_clockevents_init(base, irq, "timer0");
+
+ node = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-twd-timer");
+ if (node) {
+ twd_lookup.clk = of_clk_get(node, 0);
+ clkdev_add(&twd_lookup);
+ twd_local_timer_of_register();
+ }
+ /*
+ else {
+ hs_local_timer_of_register();
+ }
+ */
}
static struct sys_timer hs_timer = {
@@ -109,6 +157,7 @@ static void __init hs_irq_init(void)
struct device_node *node;
int ret;
u32 data[2];
+ printk("gzf %s\n", __func__);
hs_map_io();
of_irq_init(hs_irq_match);
@@ -142,6 +191,7 @@ static const char *hs_compat[] __initdata = {
extern struct smp_operations hs_smp_ops;
DT_MACHINE_START(HS_DT, "Hisilicon Hi36xx/Hi37xx (Flattened Device Tree)")
/* Maintainer: Haojian Zhuang <haojian.zhuang@linaro.org> */
+ .init_early = kirkwood_init_early,
.smp = smp_ops(hs_smp_ops),
.map_io = debug_ll_io_init,
.init_irq = hs_irq_init,