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Diffstat (limited to 'arch/arm/boot/dts/hi3620.dtsi')
-rw-r--r--arch/arm/boot/dts/hi3620.dtsi1670
1 files changed, 975 insertions, 695 deletions
diff --git a/arch/arm/boot/dts/hi3620.dtsi b/arch/arm/boot/dts/hi3620.dtsi
index c8bbdc42224c..c2e7ea59ef48 100644
--- a/arch/arm/boot/dts/hi3620.dtsi
+++ b/arch/arm/boot/dts/hi3620.dtsi
@@ -21,6 +21,67 @@
mshc3 = &dwmmc_3;
};
+ osc32k: osc@0 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ clock-output-names = "osc32khz";
+ };
+ osc26m: osc@1 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <26000000>;
+ clock-output-names = "osc26mhz";
+ };
+ pclk: clk@0 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <26000000>;
+ clock-output-names = "apb_pclk";
+ };
+ pll_arm0: clk@1 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <1600000000>;
+ clock-output-names = "armpll0";
+ };
+ pll_arm1: clk@2 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <1600000000>;
+ clock-output-names = "armpll1";
+ };
+ pll_peri: clk@3 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <1440000000>;
+ clock-output-names = "armpll2";
+ };
+ pll_usb: clk@4 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <1440000000>;
+ clock-output-names = "armpll3";
+ };
+ pll_hdmi: clk@5 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <1188000000>;
+ clock-output-names = "armpll4";
+ };
+ pll_gpu: clk@6 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <1300000000>;
+ clock-output-names = "armpll5";
+ };
+ test_sd_clk: clk@7 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <100000000>;
+ clock-output-names = "testsdclk";
+ };
+
amba {
#address-cells = <1>;
#size-cells = <1>;
@@ -32,7 +93,7 @@
compatible = "arm,cortex-a9-twd-timer";
reg = <0xfc000600 0x20>;
interrupts = <1 13 0xf01>;
- clocks = <&armpll0>;
+ clocks = <&pll_arm0>;
};
pmctrl: pmctrl@fca08000 {
@@ -55,678 +116,845 @@
reg = <0xfcd00000 0x2000>;
};
- /*clocks begins*/
- clocks {
- #address-cells = <1>;
- #size-cells = <0>;
-
- osc32k: osc@0 {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- clock-output-names = "osc32khz";
- };
-
- osc26m: osc@1 {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <26000000>;
- clock-output-names = "osc26mhz";
- };
-
- pclk: clk@0 {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <26000000>;
- clock-output-names = "apb_pclk";
- };
-
- timclk0: clk@1 {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <60000000>;
- clock-output-names = "timer0";
- };
-
- timclk1: clk@2 {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <60000000>;
- clock-output-names = "timer1";
- };
-
- /*------pll clk------*/
- armpll0: pll0 {
- compatible = "hisilicon,pll";
- #clock-cells = <0>;
- clocks = <&osc26m>;
- clock-frequency = <1600000000>;
- clock-output-names = "clk_armpll0";
- };
- armpll1: pll1 {
- compatible = "hisilicon,pll";
- #clock-cells = <0>;
- clocks = <&osc26m>;
- clock-frequency = <1600000000>;
- clock-output-names = "clk_armpll1";
- };
- peripll: pll2 {
- compatible = "hisilicon,pll";
- #clock-cells = <0>;
- clocks = <&osc26m>;
- clock-frequency = <1440000000>;
- clock-output-names = "clk_armpll2";
- };
- testsdclk: testsd {
- compatible = "hisilicon,pll";
- #clock-cells = <0>;
- clocks = <&peripll>;
- clock-frequency = <100000000>;
- };
- usbpll: pll3 {
- compatible = "hisilicon,pll";
- #clock-cells = <0>;
- clocks = <&osc26m>;
- clock-frequency = <1440000000>;
- clock-output-names = "clk_armpll3";
- };
-
- hdmipll: pll4 {
- compatible = "hisilicon,pll";
- #clock-cells = <0>;
- clocks = <&osc26m>;
- clock-frequency = <1188000000>;
- clock-output-names = "clk_armpll4";
- };
-
- gpupll: pll5 {
- compatible = "hisilicon,pll";
- #clock-cells = <0>;
- clocks = <&osc26m>;
- clock-frequency = <1300000000>;
- clock-output-names = "clk_armpll5";
- };
+ sysctrl@fc802000 {
+ compatible = "hisilicon,sysctrl";
+ reg = <0xfc802000 0x1000>;
+ smp_reg = <0x31c>;
+ reboot_reg = <0x4>;
- /*--------------cfgaxi clock--------------------*/
- clk_cfgaxi: cfgaxi {
- compatible = "hisilicon,cfgaxi";
- #clock-cells = <0>;
- clocks = <&peripll>;
+ refclk_uart0: refclk@0 {
+ compatible = "hisilicon,hi3620-clk-mux";
+ #clock-cells = <0>;
+ clocks = <&osc26m &pclk>;
+ clock-output-names = "rclk_uart0";
+ /* reg_offset, enable_bits */
+ hisilicon,hi3620-clkmux = <0x100 0x80>;
+ };
+ refclk_uart1: refclk@1 {
+ compatible = "hisilicon,hi3620-clk-mux";
+ #clock-cells = <0>;
+ clocks = <&osc26m &pclk>;
+ clock-output-names = "rclk_uart1";
+ hisilicon,hi3620-clkmux = <0x100 0x100>;
+ };
+ refclk_uart2: refclk@2 {
+ compatible = "hisilicon,hi3620-clk-mux";
+ #clock-cells = <0>;
+ clocks = <&osc26m &pclk>;
+ clock-output-names = "rclk_uart2";
+ hisilicon,hi3620-clkmux = <0x100 0x200>;
+ };
+ refclk_uart3: refclk@3 {
+ compatible = "hisilicon,hi3620-clk-mux";
+ #clock-cells = <0>;
+ clocks = <&osc26m &pclk>;
+ clock-output-names = "rclk_uart3";
+ hisilicon,hi3620-clkmux = <0x100 0x400>;
+ };
+ refclk_uart4: refclk@4 {
+ compatible = "hisilicon,hi3620-clk-mux";
+ #clock-cells = <0>;
+ clocks = <&osc26m &pclk>;
+ clock-output-names = "rclk_uart4";
+ hisilicon,hi3620-clkmux = <0x100 0x800>;
+ };
+ refclk_cfgaxi: refclk@5 {
+ compatible = "hisilicon,clk-fixed-factor";
+ #clock-cells = <0>;
+ clocks = <&pll_peri>;
+ clock-output-names = "rclk_cfgaxi";
/*mult, div*/
hisilicon,fixed-factor = <1 30>;
+ };
+ refclk_spi0: refclk@6 {
+ compatible = "hisilicon,hi3620-clk-mux";
+ #clock-cells = <0>;
+ clocks = <&osc26m &refclk_cfgaxi>;
+ clock-output-names = "rclk_spi0";
+ hisilicon,hi3620-clkmux = <0x100 0x1000>;
+ };
+ refclk_spi1: refclk@7 {
+ compatible = "hisilicon,hi3620-clk-mux";
+ #clock-cells = <0>;
+ clocks = <&osc26m &refclk_cfgaxi>;
+ clock-output-names = "rclk_spi1";
+ hisilicon,hi3620-clkmux = <0x100 0x2000>;
+ };
+ refclk_spi2: refclk@8 {
+ compatible = "hisilicon,hi3620-clk-mux";
+ #clock-cells = <0>;
+ clocks = <&osc26m &refclk_cfgaxi>;
+ clock-output-names = "rclk_spi2";
+ hisilicon,hi3620-clkmux = <0x100 0x4000>;
+ };
+ refclk_pwm0: refclk@9 {
+ compatible = "hisilicon,hi3620-clk-mux";
+ #clock-cells = <0>;
+ clocks = <&osc32k &osc26m>;
+ clock-output-names = "rclk_pwm0";
+ hisilicon,hi3620-clkmux = <0x104 0x400>;
+ };
+ refclk_pwm1: refclk@10 {
+ compatible = "hisilicon,hi3620-clk-mux";
+ #clock-cells = <0>;
+ clocks = <&osc32k &osc26m>;
+ clock-output-names = "rclk_pwm1";
+ hisilicon,hi3620-clkmux = <0x104 0x800>;
+ };
+ refclk_tcxo: refclk@11 {
+ compatible = "hisilicon,clk-fixed-factor";
+ #clock-cells = <0>;
+ clocks = <&osc26m>;
+ clock-output-names = "rclk_tcxo";
+ hisilicon,fixed-factor = <1 4>;
+ };
+ refclk_timer0: refclk@12 {
+ compatible = "hisilicon,hi3620-clk-mux";
+ #clock-cells = <0>;
+ clocks = <&osc32k &timerclk01>;
+ clock-output-names = "rclk_tim0";
+ hisilicon,hi3620-clkmux = <0 0x8000>;
+ };
+ refclk_timer1: refclk@13 {
+ compatible = "hisilicon,hi3620-clk-mux";
+ #clock-cells = <0>;
+ clocks = <&osc32k &timerclk01>;
+ clock-output-names = "rclk_tim1";
+ hisilicon,hi3620-clkmux = <0 0x20000>;
+ };
+ refclk_timer2: refclk@14 {
+ compatible = "hisilicon,hi3620-clk-mux";
+ #clock-cells = <0>;
+ clocks = <&osc32k &timerclk23>;
+ clock-output-names = "rclk_tim2";
+ hisilicon,hi3620-clkmux = <0 0x80000>;
+ };
+ refclk_timer3: refclk@15 {
+ compatible = "hisilicon,hi3620-clk-mux";
+ #clock-cells = <0>;
+ clocks = <&osc32k &timerclk23>;
+ clock-output-names = "rclk_tim3";
+ hisilicon,hi3620-clkmux = <0 0x200000>;
+ };
+ refclk_timer4: refclk@16 {
+ compatible = "hisilicon,hi3620-clk-mux";
+ #clock-cells = <0>;
+ clocks = <&osc32k &timerclk45>;
+ clock-output-names = "rclk_tim4";
+ hisilicon,hi3620-clkmux = <0x18 0x1>;
+ };
+ refclk_timer5: refclk@17 {
+ compatible = "hisilicon,hi3620-clk-mux";
+ #clock-cells = <0>;
+ clocks = <&osc32k &timerclk45>;
+ clock-output-names = "rclk_tim5";
+ hisilicon,hi3620-clkmux = <0x18 0x4>;
+ };
+ refclk_timer6: refclk@18 {
+ compatible = "hisilicon,hi3620-clk-mux";
+ #clock-cells = <0>;
+ clocks = <&osc32k &timerclk67>;
+ clock-output-names = "rclk_tim6";
+ hisilicon,hi3620-clkmux = <0x18 0x10>;
+ };
+ refclk_timer7: refclk@19 {
+ compatible = "hisilicon,hi3620-clk-mux";
+ #clock-cells = <0>;
+ clocks = <&osc32k &timerclk67>;
+ clock-output-names = "rclk_tim7";
+ hisilicon,hi3620-clkmux = <0x18 0x40>;
+ };
+ refclk_timer8: refclk@20 {
+ compatible = "hisilicon,hi3620-clk-mux";
+ #clock-cells = <0>;
+ clocks = <&osc32k &timerclk89>;
+ clock-output-names = "rclk_tim8";
+ hisilicon,hi3620-clkmux = <0x18 0x100>;
+ };
+ refclk_timer9: refclk@21 {
+ compatible = "hisilicon,hi3620-clk-mux";
+ #clock-cells = <0>;
+ clocks = <&osc32k &timerclk89>;
+ clock-output-names = "rclk_tim9";
+ hisilicon,hi3620-clkmux = <0x18 0x400>;
+ };
+ refclk_shareAXI: refclk@22 {
+ compatible = "hisilicon,hi3620-clk-mux";
+ #clock-cells = <0>;
+ clocks = <&pll_usb &pll_peri>;
+ clock-output-names = "rclk_shareAXI";
+ hisilicon,hi3620-clkmux = <0x24 0x8000>;
+ };
+ refclk_mmc1: refclk@23 {
+ compatible = "hisilicon,hi3620-clk-mux";
+ #clock-cells = <0>;
+ clocks = <&pll_peri &pll_usb>;
+ hisilicon,hi3620-clkmux = <0x108 0x200>;
};
-
- /*-------------------mux clock-------------------*/
- clk_uart0_mux: uart0_mux {
- compatible = "hisilicon,muxclock";
- #clock-cells = <0>;
- clocks = <&osc26m &clk_cfgaxi>;
- /*select register offset, mask*/
- hisilicon,hi3620-clkmux = <0x100 0x80>;
- };
-
- clk_uart1_mux: uart1_mux {
- compatible = "hisilicon,muxclock";
- #clock-cells = <0>;
- clocks = <&osc26m &clk_cfgaxi>;
- hisilicon,hi3620-clkmux = <0x100 0x100>;
- };
-
- clk_uart2_mux: uart2_mux {
- compatible = "hisilicon,muxclock";
- #clock-cells = <0>;
- clocks = <&osc26m &clk_cfgaxi>;
- hisilicon,hi3620-clkmux = <0x100 0x200>;
- };
-
- clk_uart3_mux: uart3_mux {
- compatible = "hisilicon,muxclock";
- #clock-cells = <0>;
- clocks = <&osc26m &clk_cfgaxi>;
- hisilicon,hi3620-clkmux = <0x100 0x400>;
- };
-
- clk_uart4_mux: uart4_mux {
- compatible = "hisilicon,muxclock";
- #clock-cells = <0>;
- clocks = <&osc26m &clk_cfgaxi>;
- hisilicon,hi3620-clkmux = <0x100 0x800>;
- };
-
- /*---------------------gate clock-------------------*/
- clk_uart0: uart0 {
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- clocks = <&clk_uart0_mux>;
- /*enable register, enable bit*/
- hisilicon,hi3620-clkgate = <0x40 16>;
- clock-output-names = "clk_uart0";
- };
-
- clk_uart1: uart1 {
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- clocks = <&clk_uart1_mux>;
- hisilicon,hi3620-clkgate = <0x40 17>;
- clock-output-names = "clk_uart1";
- };
-
- clk_uart2: uart2 {
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- clocks = <&clk_uart2_mux>;
- hisilicon,hi3620-clkgate = <0x40 18>;
- clock-output-names = "clk_uart2";
- };
-
- clk_uart3: uart3 {
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- clocks = <&clk_uart3_mux>;
- hisilicon,hi3620-clkgate = <0x40 19>;
- clock-output-names = "clk_uart3";
- };
-
- clk_uart4: uart4 {
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- clocks = <&clk_uart4_mux>;
- hisilicon,hi3620-clkgate = <0x40 20>;
- clock-output-names = "clk_uart4";
- };
-
- /*-------------------spi clock----------------*/
-
- clk_spi0_mux: spi0_mux {
- compatible = "hisilicon,muxclock";
- #clock-cells = <0>;
- clocks = <&osc26m &clk_cfgaxi>;
- hisilicon,hi3620-clkmux = <0x100 0x1000>;
- };
-
- clk_spi1_mux: spi1_mux {
- compatible = "hisilicon,muxclock";
- #clock-cells = <0>;
- clocks = <&osc26m &clk_cfgaxi>;
- hisilicon,hi3620-clkmux = <0x100 0x2000>;
- };
-
- clk_spi2_mux: spi2_mux {
- compatible = "hisilicon,muxclock";
- #clock-cells = <0>;
- clocks = <&osc26m &clk_cfgaxi>;
- hisilicon,hi3620-clkmux = <0x100 0x4000>;
- };
-
- clk_spi0: spi0 {
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- clocks = <&clk_spi0_mux>;
- hisilicon,hi3620-clkgate = <0x40 21>;
- clock-output-names = "clk_spi0";
+ refclk_mmc2: refclk@24 {
+ compatible = "hisilicon,hi3620-clk-mux";
+ #clock-cells = <0>;
+ clocks = <&pll_peri &pll_usb>;
+ hisilicon,hi3620-clkmux = <0x140 0x10>;
};
-
- clk_spi1: spi1 {
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- clocks = <&clk_spi1_mux>;
- hisilicon,hi3620-clkgate = <0x40 22>;
- clock-output-names = "clk_spi1";
+ refclk_mmc3: refclk@25 {
+ compatible = "hisilicon,hi3620-clk-mux";
+ #clock-cells = <0>;
+ clocks = <&pll_peri &pll_usb>;
+ hisilicon,hi3620-clkmux = <0x140 0x200>;
};
-
- clk_spi2: spi2 {
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- clocks = <&clk_spi2_mux>;
- hisilicon,hi3620-clkgate = <0x40 23>;
- clock-output-names = "clk_spi2";
+ refclk_sd: refclk@26 {
+ compatible = "hisilicon,hi3620-clk-mux";
+ #clock-cells = <0>;
+ clocks = <&pll_peri &pll_usb>;
+ hisilicon,hi3620-clkmux = <0x108 0x10>;
};
-
- /*-------------------mux clock----------------*/
- clk_pwm0_mux: pwm0_mux{
- compatible = "hisilicon,muxclock";
- #clock-cells = <0>;
- clocks = <&osc32k &osc26m>;
- hisilicon,hi3620-clkmux = <0x104 0x400>;
+ refclk_mmc1_parent: refclk@27 {
+ compatible = "hisilicon,hi3620-clk-mux";
+ #clock-cells = <0>;
+ clocks = <&osc26m &div_mmc1>;
+ hisilicon,hi3620-clkmux = <0x108 0x400>;
};
-
- clk_venc_mux: venc_mux{
- compatible = "hisilicon,muxclock";
- #clock-cells = <0>;
- clocks = <&peripll &usbpll>;
+ refclk_venc: refclk@28 {
+ #clock-cells = <0>;
+ clocks = <&pll_peri &pll_usb>;
hisilicon,hi3620-clkmux = <0x10c 0x800>;
};
-
- clk_g2d_mux: g2d_mux{
- compatible = "hisilicon,muxclock";
- #clock-cells = <0>;
- clocks = <&peripll &usbpll>;
+ refclk_g2d: refclk@29 {
+ #clock-cells = <0>;
+ clocks = <&pll_peri &pll_usb>;
hisilicon,hi3620-clkmux = <0x10c 0x20>;
};
-
- clk_vdec_mux: vdec_mux{
- compatible = "hisilicon,muxclock";
- #clock-cells = <0>;
- clocks = <&peripll &usbpll>;
+ refclk_vdec: refclk@30 {
+ #clock-cells = <0>;
+ clocks = <&pll_peri &pll_usb>;
hisilicon,hi3620-clkmux = <0x110 0x20>;
};
-
- clk_vpp_mux: vpp_mux{
- compatible = "hisilicon,muxclock";
- #clock-cells = <0>;
- clocks = <&peripll &usbpll>;
+ refclk_vpp: refclk@31 {
+ #clock-cells = <0>;
+ clocks = <&pll_peri &pll_usb>;
hisilicon,hi3620-clkmux = <0x110 0x800>;
};
-
- clk_ldi0_mux: ldi0_mux{
- compatible = "hisilicon,muxclock";
- #clock-cells = <0>;
- clocks = <&peripll &usbpll &hdmipll>;
+ refclk_ldi0: refclk@32 {
+ #clock-cells = <0>;
+ clocks = <&pll_peri &pll_usb &pll_hdmi>;
hisilicon,hi3620-clkmux = <0x114 0x6000>;
};
-
- clk_ldi1_mux: ldi1_mux{
- compatible = "hisilicon,muxclock";
- #clock-cells = <0>;
- clocks = <&peripll &usbpll &hdmipll>;
+ refclk_ldi1: refclk@33 {
+ #clock-cells = <0>;
+ clocks = <&pll_peri &pll_usb &pll_hdmi>;
hisilicon,hi3620-clkmux = <0x118 0xc000>;
};
- /*----periclock: gate clk, reg offset to sctrl-----*/
-
- clk_sci: sci {
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- clocks = <&osc26m>;
- /*enable register, enable bit*/
- hisilicon,hi3620-clkgate = <0x40 26>;
- clock-output-names = "clk_sci";
- };
-
- clk_dphy0: dphy0 {
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- clocks = <&osc26m>;
- hisilicon,hi3620-clkgate = <0x30 15>;
- clock-output-names = "clk_dphy0";
- };
-
- clk_dphy1: dphy1 {
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- clocks = <&osc26m>;
- hisilicon,hi3620-clkgate = <0x30 16>;
- };
-
- clk_dphy2: dphy2 {
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- clocks = <&osc26m>;
- hisilicon,hi3620-clkgate = <0x30 17>;
- };
-
- clk_kpc: kpc {
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- clocks = <&osc32k>;
- hisilicon,hi3620-clkgate = <0x20 6>;
- };
-
- clk_pwm0_gate: pwm0_gate {
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- clocks = <&osc32k &osc26m>;
- hisilicon,hi3620-clkgate = <0x40 7>;
- };
-
- /*gpio0-----gpio21 gate clock*/
- clk_gpio0: gpio0{
- compatible = "hisilicon,periclock";
- hisilicon,hi3620-clkgate = <0x20 8>;
- clock-output-names = "clk_gpio0";
- };
- clk_gpio1: gpio1{
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- hisilicon,hi3620-clkgate = <0x20 9>;
- clock-output-names = "clk_gpio1";
- };
- clk_gpio2: gpio2{
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- hisilicon,hi3620-clkgate = <0x20 10>;
- clock-output-names = "clk_gpio2";
- };
- clk_gpio3: gpio3{
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- hisilicon,hi3620-clkgate = <0x20 11>;
- clock-output-names = "clk_gpio3";
- };
- clk_gpio4: gpio4{
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- hisilicon,hi3620-clkgate = <0x20 12>;
- clock-output-names = "clk_gpio4";
- };
- clk_gpio5: gpio5{
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- hisilicon,hi3620-clkgate = <0x20 13>;
- clock-output-names = "clk_gpio5";
- };
- clk_gpio6: gpio6{
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- hisilicon,hi3620-clkgate = <0x20 14>;
- clock-output-names = "clk_gpio6";
- };
-
- clk_gpio7: gpio7{
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- hisilicon,hi3620-clkgate = <0x20 15>;
- clock-output-names = "clk_gpio7";
- };
- clk_gpio8: gpio8{
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- hisilicon,hi3620-clkgate = <0x20 16>;
- clock-output-names = "clk_gpio8";
- };
- clk_gpio9: gpio9{
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- hisilicon,hi3620-clkgate = <0x20 17>;
- clock-output-names = "clk_gpio9";
- };
- clk_gpio10: gpio10{
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- hisilicon,hi3620-clkgate = <0x20 18>;
- clock-output-names = "clk_gpio10";
- };
- clk_gpio11: gpio11{
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- hisilicon,hi3620-clkgate = <0x20 19>;
- clock-output-names = "clk_gpio11";
- };
- clk_gpio12: gpio12{
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- hisilicon,hi3620-clkgate = <0x20 20>;
- clock-output-names = "clk_gpio12";
- };
- clk_gpio13: gpio13{
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- hisilicon,hi3620-clkgate = <0x20 21>;
- clock-output-names = "clk_gpio13";
- };
- clk_gpio14: gpio14{
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- hisilicon,hi3620-clkgate = <0x20 22>;
- clock-output-names = "clk_gpio14";
- };
- clk_gpio15: gpio15{
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- hisilicon,hi3620-clkgate = <0x20 23>;
- clock-output-names = "clk_gpio15";
- };
- clk_gpio16: gpio16{
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- hisilicon,hi3620-clkgate = <0x20 24>;
- clock-output-names = "clk_gpio16";
- };
- clk_gpio17: gpio17{
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- hisilicon,hi3620-clkgate = <0x20 25>;
- clock-output-names = "clk_gpio17";
- };
- clk_gpio18: gpio18{
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- hisilicon,hi3620-clkgate = <0x20 26>;
- clock-output-names = "clk_gpio18";
- };
- clk_gpio19: gpio19{
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- hisilicon,hi3620-clkgate = <0x20 27>;
- clock-output-names = "clk_gpio19";
- };
- clk_gpio20: gpio20{
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- hisilicon,hi3620-clkgate = <0x20 28>;
- clock-output-names = "clk_gpio20";
- };
- clk_gpio21: gpio21{
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- hisilicon,hi3620-clkgate = <0x20 29>;
- clock-output-names = "clk_gpio21";
- };
-
- /*i2c clk*/
- clk_i2c0: i2c0{
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- clocks = <&clk_cfgaxi>;
- hisilicon,hi3620-clkgate = <0x40 24>;
+ uartclk0: clkgate@0 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&refclk_uart0>;
+ clock-output-names = "uartclk0";
+ hisilicon,hi3620-clkreset = <0x98 0x10000>;
+ hisilicon,hi3620-clkgate = <0x40 0x10000>;
+ };
+ uartclk1: clkgate@1 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&refclk_uart1>;
+ clock-output-names = "uartclk1";
+ hisilicon,hi3620-clkreset = <0x98 0x20000>;
+ hisilicon,hi3620-clkgate = <0x40 0x20000>;
+ };
+ uartclk2: clkgate@2 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&refclk_uart2>;
+ clock-output-names = "uartclk2";
+ hisilicon,hi3620-clkreset = <0x98 0x40000>;
+ hisilicon,hi3620-clkgate = <0x40 0x40000>;
+ };
+ uartclk3: clkgate@3 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&refclk_uart3>;
+ clock-output-names = "uartclk3";
+ hisilicon,hi3620-clkreset = <0x98 0x80000>;
+ hisilicon,hi3620-clkgate = <0x40 0x80000>;
+ };
+ uartclk4: clkgate@4 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&refclk_uart4>;
+ clock-output-names = "uartclk4";
+ hisilicon,hi3620-clkreset = <0x98 0x100000>;
+ hisilicon,hi3620-clkgate = <0x40 0x100000>;
+ };
+ gpioclk0: clkgate@5 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&pclk>;
+ clock-output-names = "gpioclk0";
+ hisilicon,hi3620-clkreset = <0x80 0x100>;
+ hisilicon,hi3620-clkgate = <0x20 0x100>;
+ };
+ gpioclk1: clkgate@6 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&pclk>;
+ clock-output-names = "gpioclk1";
+ hisilicon,hi3620-clkreset = <0x80 0x200>;
+ hisilicon,hi3620-clkgate = <0x20 0x200>;
+ };
+ gpioclk2: clkgate@7 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&pclk>;
+ clock-output-names = "gpioclk2";
+ hisilicon,hi3620-clkreset = <0x80 0x400>;
+ hisilicon,hi3620-clkgate = <0x20 0x400>;
+ };
+ gpioclk3: clkgate@8 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&pclk>;
+ clock-output-names = "gpioclk3";
+ hisilicon,hi3620-clkreset = <0x80 0x800>;
+ hisilicon,hi3620-clkgate = <0x20 0x800>;
+ };
+ gpioclk4: clkgate@9 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&pclk>;
+ clock-output-names = "gpioclk4";
+ hisilicon,hi3620-clkreset = <0x80 0x1000>;
+ hisilicon,hi3620-clkgate = <0x20 0x1000>;
+ };
+ gpioclk5: clkgate@10 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&pclk>;
+ clock-output-names = "gpioclk5";
+ hisilicon,hi3620-clkreset = <0x80 0x2000>;
+ hisilicon,hi3620-clkgate = <0x20 0x2000>;
+ };
+ gpioclk6: clkgate@11 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&pclk>;
+ clock-output-names = "gpioclk6";
+ hisilicon,hi3620-clkreset = <0x80 0x4000>;
+ hisilicon,hi3620-clkgate = <0x20 0x4000>;
+ };
+ gpioclk7: clkgate@12 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&pclk>;
+ clock-output-names = "gpioclk7";
+ hisilicon,hi3620-clkreset = <0x80 0x8000>;
+ hisilicon,hi3620-clkgate = <0x20 0x8000>;
+ };
+ gpioclk8: clkgate@13 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&pclk>;
+ clock-output-names = "gpioclk8";
+ hisilicon,hi3620-clkreset = <0x80 0x10000>;
+ hisilicon,hi3620-clkgate = <0x20 0x10000>;
+ };
+ gpioclk9: clkgate@14 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&pclk>;
+ clock-output-names = "gpioclk9";
+ hisilicon,hi3620-clkreset = <0x80 0x20000>;
+ hisilicon,hi3620-clkgate = <0x20 0x20000>;
+ };
+ gpioclk10: clkgate@15 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&pclk>;
+ clock-output-names = "gpioclk10";
+ hisilicon,hi3620-clkreset = <0x80 0x40000>;
+ hisilicon,hi3620-clkgate = <0x20 0x40000>;
+ };
+ gpioclk11: clkgate@16 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&pclk>;
+ clock-output-names = "gpioclk11";
+ hisilicon,hi3620-clkreset = <0x80 0x80000>;
+ hisilicon,hi3620-clkgate = <0x20 0x80000>;
+ };
+ gpioclk12: clkgate@17 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&pclk>;
+ clock-output-names = "gpioclk12";
+ hisilicon,hi3620-clkreset = <0x80 0x100000>;
+ hisilicon,hi3620-clkgate = <0x20 0x100000>;
+ };
+ gpioclk13: clkgate@18 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&pclk>;
+ clock-output-names = "gpioclk13";
+ hisilicon,hi3620-clkreset = <0x80 0x200000>;
+ hisilicon,hi3620-clkgate = <0x20 0x200000>;
+ };
+ gpioclk14: clkgate@19 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&pclk>;
+ clock-output-names = "gpioclk14";
+ hisilicon,hi3620-clkreset = <0x80 0x400000>;
+ hisilicon,hi3620-clkgate = <0x20 0x400000>;
+ };
+ gpioclk15: clkgate@20 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&pclk>;
+ clock-output-names = "gpioclk15";
+ hisilicon,hi3620-clkreset = <0x80 0x800000>;
+ hisilicon,hi3620-clkgate = <0x20 0x800000>;
+ };
+ gpioclk16: clkgate@21 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&pclk>;
+ clock-output-names = "gpioclk16";
+ hisilicon,hi3620-clkreset = <0x80 0x1000000>;
+ hisilicon,hi3620-clkgate = <0x20 0x1000000>;
+ };
+ gpioclk17: clkgate@22 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&pclk>;
+ clock-output-names = "gpioclk17";
+ hisilicon,hi3620-clkreset = <0x80 0x2000000>;
+ hisilicon,hi3620-clkgate = <0x20 0x2000000>;
+ };
+ gpioclk18: clkgate@23 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&pclk>;
+ clock-output-names = "gpioclk18";
+ hisilicon,hi3620-clkreset = <0x80 0x4000000>;
+ hisilicon,hi3620-clkgate = <0x20 0x4000000>;
+ };
+ gpioclk19: clkgate@24 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&pclk>;
+ clock-output-names = "gpioclk19";
+ hisilicon,hi3620-clkreset = <0x80 0x8000000>;
+ hisilicon,hi3620-clkgate = <0x20 0x8000000>;
+ };
+ gpioclk20: clkgate@25 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&pclk>;
+ clock-output-names = "gpioclk20";
+ hisilicon,hi3620-clkreset = <0x80 0x10000000>;
+ hisilicon,hi3620-clkgate = <0x20 0x10000000>;
+ };
+ gpioclk21: clkgate@26 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&pclk>;
+ clock-output-names = "gpioclk21";
+ hisilicon,hi3620-clkreset = <0x80 0x20000000>;
+ hisilicon,hi3620-clkgate = <0x20 0x20000000>;
+ };
+ spiclk0: clkgate@27 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&refclk_spi0>;
+ clock-output-names = "spiclk0";
+ hisilicon,hi3620-clkreset = <0x98 0x200000>;
+ hisilicon,hi3620-clkgate = <0x40 0x200000>;
+ };
+ spiclk1: clkgate@28 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&refclk_spi1>;
+ clock-output-names = "spiclk1";
+ hisilicon,hi3620-clkreset = <0x98 0x400000>;
+ hisilicon,hi3620-clkgate = <0x40 0x400000>;
+ };
+ spiclk2: clkgate@29 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&refclk_spi2>;
+ clock-output-names = "spiclk2";
+ hisilicon,hi3620-clkreset = <0x98 0x800000>;
+ hisilicon,hi3620-clkgate = <0x40 0x800000>;
+ };
+ pwmclk0: clkgate@30 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&refclk_pwm0>;
+ clock-output-names = "pwmclk0";
+ hisilicon,hi3620-clkreset = <0x98 0x80>;
+ hisilicon,hi3620-clkgate = <0x40 0x80>;
+ };
+ pwmclk1: clkgate@31 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&refclk_pwm1>;
+ clock-output-names = "pwmclk1";
+ hisilicon,hi3620-clkreset = <0x98 0x100>;
+ hisilicon,hi3620-clkgate = <0x40 0x100>;
+ };
+ timerclk01: clkgate@32 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&refclk_tcxo>;
+ clock-output-names = "timerclk01";
+ hisilicon,hi3620-clkreset = <0x80 0x1>;
+ hisilicon,hi3620-clkgate = <0x20 0x3>;
+ };
+ timerclk23: clkgate@33 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&refclk_tcxo>;
+ clock-output-names = "timerclk23";
+ hisilicon,hi3620-clkreset = <0x80 0x2>;
+ hisilicon,hi3620-clkgate = <0x20 0xc>;
+ };
+ timerclk45: clkgate@34 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&refclk_tcxo>;
+ clock-output-names = "timerclk45";
+ hisilicon,hi3620-clkreset = <0x98 0x8>;
+ hisilicon,hi3620-clkgate = <0x40 0x8>;
+ };
+ timerclk67: clkgate@35 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&refclk_tcxo>;
+ clock-output-names = "timerclk67";
+ hisilicon,hi3620-clkreset = <0x98 0x10>;
+ hisilicon,hi3620-clkgate = <0x40 0x10>;
+ };
+ timerclk89: clkgate@36 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&refclk_tcxo>;
+ clock-output-names = "timerclk89";
+ hisilicon,hi3620-clkreset = <0x98 0x20>;
+ hisilicon,hi3620-clkgate = <0x40 0x20>;
+ };
+ timclk0: clkgate@37 {
+ compatible = "hisilicon,clk-gate";
+ #clock-cells = <0>;
+ clocks = <&refclk_timer0>;
+ clock-output-names = "timclk0";
+ hisilicon,clkgate-inverted;
+ hisilicon,clkgate = <0 16>;
+ };
+ timclk1: clkgate@38 {
+ compatible = "hisilicon,clk-gate";
+ #clock-cells = <0>;
+ clocks = <&refclk_timer1>;
+ clock-output-names = "timclk1";
+ hisilicon,clkgate-inverted;
+ hisilicon,clkgate = <0 18>;
+ };
+ timclk2: clkgate@39 {
+ compatible = "hisilicon,clk-gate";
+ #clock-cells = <0>;
+ clocks = <&refclk_timer2>;
+ clock-output-names = "timclk2";
+ hisilicon,clkgate-inverted;
+ hisilicon,clkgate = <0 20>;
+ };
+ timclk3: clkgate@40 {
+ compatible = "hisilicon,clk-gate";
+ #clock-cells = <0>;
+ clocks = <&refclk_timer3>;
+ clock-output-names = "timclk3";
+ hisilicon,clkgate-inverted;
+ hisilicon,clkgate = <0 22>;
+ };
+ timclk4: clkgate@41 {
+ compatible = "hisilicon,clk-gate";
+ #clock-cells = <0>;
+ clocks = <&refclk_timer4>;
+ clock-output-names = "timclk4";
+ hisilicon,clkgate-inverted;
+ hisilicon,clkgate = <0x18 0>;
+ };
+ timclk5: clkgate@42 {
+ compatible = "hisilicon,clk-gate";
+ #clock-cells = <0>;
+ clocks = <&refclk_timer5>;
+ clock-output-names = "timclk5";
+ hisilicon,clkgate-inverted;
+ hisilicon,clkgate = <0x18 2>;
+ };
+ timclk6: clkgate@43 {
+ compatible = "hisilicon,clk-gate";
+ #clock-cells = <0>;
+ clocks = <&refclk_timer6>;
+ clock-output-names = "timclk6";
+ hisilicon,clkgate-inverted;
+ hisilicon,clkgate = <0x18 4>;
+ };
+ timclk7: clkgate@44 {
+ compatible = "hisilicon,clk-gate";
+ #clock-cells = <0>;
+ clocks = <&refclk_timer7>;
+ clock-output-names = "timclk7";
+ hisilicon,clkgate-inverted;
+ hisilicon,clkgate = <0x18 6>;
+ };
+ timclk8: clkgate@45 {
+ compatible = "hisilicon,clk-gate";
+ #clock-cells = <0>;
+ clocks = <&refclk_timer8>;
+ clock-output-names = "timclk8";
+ hisilicon,clkgate-inverted;
+ hisilicon,clkgate = <0x18 8>;
+ };
+ timclk9: clkgate@46 {
+ compatible = "hisilicon,clk-gate";
+ #clock-cells = <0>;
+ clocks = <&refclk_timer9>;
+ clock-output-names = "timclk9";
+ hisilicon,clkgate-inverted;
+ hisilicon,clkgate = <0x18 10>;
+ };
+ rtcclk: clkgate@47 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&pclk>;
+ clock-output-names = "clk_rtc";
+ hisilicon,hi3620-clkgate = <0x20 0x20>;
+ };
+ i2cclk0: clkgate@48 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&pclk>;
clock-output-names = "clk_i2c0";
- };
- clk_i2c1: i2c1{
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- clocks = <&clk_cfgaxi>;
- hisilicon,hi3620-clkgate = <0x40 25>;
+ hisilicon,hi3620-clkgate = <0x40 0x1000000>;
+ };
+ i2cclk1: clkgate@49 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&pclk>;
clock-output-names = "clk_i2c1";
- };
- clk_i2c2: i2c2{
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- clocks = <&clk_cfgaxi>;
- hisilicon,hi3620-clkgate = <0x40 28>;
+ hisilicon,hi3620-clkgate = <0x40 0x2000000>;
+ };
+ i2cclk2: clkgate@50 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&pclk>;
clock-output-names = "clk_i2c2";
- };
- clk_i2c3: i2c3{
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- clocks = <&clk_cfgaxi>;
- hisilicon,hi3620-clkgate = <0x40 29>;
+ hisilicon,hi3620-clkgate = <0x40 0x10000000>;
+ };
+ i2cclk3: clkgate@51 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&pclk>;
clock-output-names = "clk_i2c3";
- };
-
- /* clk_acp */
- clk_acp: acp{
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- clocks = <&clk_cfgaxi>;
- hisilicon,hi3620-clkgate = <0x30 28>;
- };
-
- /*dmac clk*/
- clk_dmac: dmac{
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- clocks = <&clk_acp>;
- hisilicon,hi3620-clkgate = <0x50 10>;
+ hisilicon,hi3620-clkgate = <0x40 0x20000000>;
+ };
+ dmaclk: clkgate@52 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&acpclk>;
clock-output-names = "clk_dmac";
+ hisilicon,hi3620-clkgate = <0x50 0x400>;
+ };
+ mcuclk: clkgate@53 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&refclk_cfgaxi>;
+ clock-output-names = "clk_mcu";
+ hisilicon,hi3620-clkgate = <0x50 0x1000000>;
+ };
+ ddrcperclk: clkgate@54 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&refclk_cfgaxi>;
+ clock-output-names = "clk_ddrc_per";
+ hisilicon,hi3620-clkgate = <0x50 0x200>;
+ };
+ acpclk: clkgate@55 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&refclk_cfgaxi>;
+ clock-output-names = "clk_apc";
+ hisilicon,hi3620-clkgate = <0x30 0x10000000>;
+ };
+ mmcclk1: clkgate@56 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&test_sd_clk>;
+ clock-output-names = "clk_mmc1";
+ hisilicon,hi3620-clkgate = <0x50 0x200000>;
+ };
+ mmcclk2: clkgate@57 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&div_mmc2>;
+ clock-output-names = "clk_mmc2";
+ hisilicon,hi3620-clkgate = <0x50 0x400000>;
+ };
+ mmcclk3: clkgate@58 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&div_mmc3>;
+ clock-output-names = "clk_mmc3";
+ hisilicon,hi3620-clkgate = <0x50 0x800000>;
+ };
+ sdclk: clkgate@59 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&test_sd_clk>;
+ clock-output-names = "clk_sd";
+ hisilicon,hi3620-clkgate = <0x50 0x100000>;
+ };
+ kpcclk: clkgate@60 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&osc32k>;
+ clock-output-names = "clk_kpc";
+ hisilicon,hi3620-clkgate = <0x20 0x40>;
};
-
- /*mmc clk*/
- clk_mmc1_mux: mmc1_mux{
- compatible = "hisilicon,muxclock";
- #clock-cells = <0>;
- clocks = <&peripll &usbpll>;
- hisilicon,hi3620-clkmux = <0x108 0x200>;
- };
-
- clk_mmc2_mux: mmc2_mux{
- compatible = "hisilicon,muxclock";
- #clock-cells = <0>;
- clocks = <&peripll &usbpll>;
- hisilicon,hi3620-clkmux = <0x140 0x010>;
- };
-
- clk_mmc3_mux: mmc3_mux{
- compatible = "hisilicon,muxclock";
- #clock-cells = <0>;
- clocks = <&peripll &usbpll>;
- hisilicon,hi3620-clkmux = <0x140 0x200>;
- };
-
- clk_sd_mux: sd_mux{
- compatible = "hisilicon,muxclock";
- #clock-cells = <0>;
- clocks = <&peripll &usbpll>;
- hisilicon,hi3620-clkmux = <0x108 0x010>;
- };
-
-
- /*-----------divider table clk---------------------*/
- clk_div_mmc1: div_mmc1{
- compatible = "hisilicon,divclock";
- #clock-cells = <0>;
- clocks = <&clk_mmc1_mux>;
- hisilicon,clkdiv-table = <&divtable 0x0f 16 &divtable 0x0e 15 &divtable 0x0d 14
- &divtable 0x0c 13 &divtable 0x0b 12 &divtable 0x0a 11
- &divtable 0x09 10 &divtable 0x08 9 &divtable 0x07 8
- &divtable 0x06 7 &divtable 0x05 6 &divtable 0x04 5
- &divtable 0x03 4 &divtable 0x02 3 &divtable 0x01 2
- &divtable 0x00 1>;
- /*divider register offset, shift, width*/
- hisilicon,hi3620-clkdiv = <0x108 5 4>;
- };
-
- clk_div_mmc2: div_mmc2{
- compatible = "hisilicon,divclock";
- #clock-cells = <0>;
- clocks = <&clk_mmc2_mux>;
- hisilicon,clkdiv-table = <&divtable 0x0f 16 &divtable 0x0e 15 &divtable 0x0d 14
- &divtable 0x0c 13 &divtable 0x0b 12 &divtable 0x0a 11
- &divtable 0x09 10 &divtable 0x08 9 &divtable 0x07 8
- &divtable 0x06 7 &divtable 0x05 6 &divtable 0x04 5
- &divtable 0x03 4 &divtable 0x02 3 &divtable 0x01 2
- &divtable 0x00 1>;
- /*divider register offset, shift, width*/
- hisilicon,hi3620-clkdiv = <0x140 0 4>;
- };
-
- clk_div_mmc3: div_mmc3{
- compatible = "hisilicon,divclock";
- #clock-cells = <0>;
- clocks = <&clk_mmc3_mux>;
- hisilicon,clkdiv-table = <&divtable 0x0f 16 &divtable 0x0e 15 &divtable 0x0d 14
- &divtable 0x0c 13 &divtable 0x0b 12 &divtable 0x0a 11
- &divtable 0x09 10 &divtable 0x08 9 &divtable 0x07 8
- &divtable 0x06 7 &divtable 0x05 6 &divtable 0x04 5
- &divtable 0x03 4 &divtable 0x02 3 &divtable 0x01 2
- &divtable 0x00 1>;
- /*divider register offset, shift, width*/
- hisilicon,hi3620-clkdiv = <0x140 5 4>;
- };
-
- clk_div_sd: div_sd{
- compatible = "hisilicon,divclock";
- #clock-cells = <0>;
- clocks = <&clk_sd_mux>;
- hisilicon,clkdiv-table = <&divtable 0x0f 16 &divtable 0x0e 15 &divtable 0x0d 14&divtable 0x0c 13
- &divtable 0x0b 12 &divtable 0x0a 11 &divtable 0x09 10 &divtable 0x08 9
- &divtable 0x07 8 &divtable 0x06 7 &divtable 0x05 6 &divtable 0x04 5
- &divtable 0x03 4 &divtable 0x02 3 &divtable 0x01 2 &divtable 0x00 1>;
- /*divider register offset, shift, width*/
- hisilicon,hi3620-clkdiv = <0x108 0 4>;
- };
-
- /*---------------gate--------------------*/
- clk_mmc1_parent: mmc1_parent{
- compatible = "hisilicon,muxclock";
- #clock-cells = <0>;
- clocks = <&osc26m &clk_div_mmc1>;
- hisilicon,hi3620-clkmux = <0x108 0x400>;
- };
-
- clk_mmc1: mmc1 {
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- clocks = <&testsdclk>;
- /* clocks = <&clk_mmc1_parent>; */
- hisilicon,hi3620-clkgate = <0x50 21>;
- };
-
- clk_mmc2: mmc2 {
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- clocks = <&clk_div_mmc2>;
- hisilicon,hi3620-clkgate = <0x50 22>;
- };
-
- clk_mmc3: mmc3 {
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- clocks = <&clk_div_mmc3>;
- hisilicon,hi3620-clkgate = <0x50 23>;
+ sciclk: clkgate@61 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&osc26m>;
+ clock-output-names = "clk_sci";
+ hisilicon,hi3620-clkgate = <0x40 0x4000000>;
};
-
- clk_sd: sd {
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- /* clocks = <&clk_div_sd>; */
- clocks = <&testsdclk>;
- hisilicon,hi3620-clkgate = <0x50 20>;
+ dphyclk0: clkgate@62 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&osc26m>;
+ clock-output-names = "clk_dphy0";
+ hisilicon,hi3620-clkgate = <0x30 0x8000>;
};
-
- clk_ddrc_per: ddrc_per {
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- clocks = <&clk_cfgaxi>;
- hisilicon,hi3620-clkgate = <0x50 9>;
+ dphyclk1: clkgate@63 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&osc26m>;
+ clock-output-names = "clk_dphy1";
+ hisilicon,hi3620-clkgate = <0x30 0x10000>;
};
-
- clk_mcu: mcu{
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
- clocks = <&clk_cfgaxi>;
- hisilicon,hi3620-clkgate = <0x50 24>;
- clock-output-names = "clk_mcu";
+ dphyclk2: clkgate@64 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&osc26m>;
+ clock-output-names = "clk_dphy2";
+ hisilicon,hi3620-clkgate = <0x30 0x20000>;
+ };
+ ldiclk0: clkgate@65 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&refclk_ldi0>;
+ clock-output-names = "clk_ldi0";
+ hisilicon,hi3620-clkgate = <0x30 0x200>;
+ };
+ ldiclk1: clkgate@66 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&refclk_ldi1>;
+ clock-output-names = "clk_ldi1";
+ hisilicon,hi3620-clkgate = <0x30 0x800>;
+ };
+ edcclk0: clkgate@67 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
+ clocks = <&pclk>;
+ clock-output-names = "clk_edc0";
+ hisilicon,hi3620-clkgate = <0x30 0x100>;
};
-
- /*rtc clk*/
- clk_rtc: rtc{
- compatible = "hisilicon,periclock";
- #clock-cells = <0>;
+ edcclk1: clkgate@68 {
+ compatible = "hisilicon,hi3620-clk-gate";
+ #clock-cells = <0>;
clocks = <&pclk>;
- hisilicon,hi3620-clkgate = <0x20 5>;
- clock-output-names = "clk_rtc";
+ clock-output-names = "clk_edc1";
+ hisilicon,hi3620-clkgate = <0x30 0x400>;
};
-
- /*--------------------divider clock -------------------*/
- divtable: clkdiv {
+ dtable: clkdiv@0 {
#hisilicon,clkdiv-table-cells = <2>;
- };
-
- clk_div_shaxi: div_shaxi{
- compatible = "hisilicon,divclock";
- #clock-cells = <0>;
- clocks = <&peripll>;
- hisilicon,clkdiv-table = <&divtable 0x04 5>;
- /*divider register offset, shift, width*/
- hisilicon,hi3620-clkdiv = <0x100 0 5>;
- };
-
- clk_div_cfgaxi: div_cfgaxi{
- compatible = "hisilicon,divclock";
- #clock-cells = <0>;
- clocks = <&clk_div_shaxi>;
- hisilicon,clkdiv-table = <&divtable 0x01 2>;
- hisilicon,hi3620-clkdiv = <0x100 5 2>;
+ };
+ div_shareaxi: clkdiv@1 {
+ compatible = "hisilicon,hi3620-clk-div";
+ #clock-cells = <0>;
+ clocks = <&refclk_shareAXI>;
+ clock-output-names = "shareAXI_div";
+ hisilicon,clkdiv-table = <
+ &dtable 0 1 &dtable 1 2 &dtable 2 3 &dtable 3 4
+ &dtable 4 5 &dtable 5 6 &dtable 6 7 &dtable 7 8
+ &dtable 8 9 &dtable 9 10 &dtable 10 11 &dtable 11 12
+ &dtable 12 13 &dtable 13 14 &dtable 14 15 &dtable 15 16
+ &dtable 16 17 &dtable 17 18 &dtable 18 19 &dtable 19 20
+ &dtable 20 21 &dtable 21 22 &dtable 22 23 &dtable 23 24
+ &dtable 24 25 &dtable 25 26 &dtable 26 27 &dtable 27 28
+ &dtable 28 29 &dtable 29 30 &dtable 30 31 &dtable 31 32>;
+ /* divider register offset, mask */
+ hisilicon,clkdiv = <0x100 0x1f>;
+ };
+ div_cfgaxi: clkdiv@2 {
+ compatible = "hisilicon,hi3620-clk-div";
+ #clock-cells = <0>;
+ clocks = <&div_shareaxi>;
+ clock-output-names = "cfgAXI_div";
+ hisilicon,clkdiv-table = <&dtable 0x01 2>;
+ hisilicon,clkdiv = <0x100 0x60>;
+ };
+ div_mmc1: clkdiv@3 {
+ compatible = "hisilicon,hi3620-clk-div";
+ #clock-cells = <0>;
+ clocks = <&refclk_mmc1>;
+ hisilicon,clkdiv-table = <
+ &dtable 0xf 16 &dtable 0xe 15 &dtable 0xd 14
+ &dtable 0xc 13 &dtable 0xb 12 &dtable 0xa 11
+ &dtable 9 10 &dtable 8 9 &dtable 7 8
+ &dtable 6 7 &dtable 5 6 &dtable 4 5
+ &dtable 3 4 &dtable 2 3 &dtable 1 2
+ &dtable 0 1>;
+ hisilicon,clkdiv = <0x108 0x1e0>;
+ };
+ div_mmc2: clkdiv@4 {
+ compatible = "hisilicon,hi3620-clk-div";
+ #clock-cells = <0>;
+ clocks = <&refclk_mmc2>;
+ hisilicon,clkdiv-table = <
+ &dtable 0xf 16 &dtable 0xe 15 &dtable 0xd 14
+ &dtable 0xc 13 &dtable 0xb 12 &dtable 0xa 11
+ &dtable 9 10 &dtable 8 9 &dtable 7 8
+ &dtable 6 7 &dtable 5 6 &dtable 4 5
+ &dtable 3 4 &dtable 2 3 &dtable 1 2
+ &dtable 0 1>;
+ hisilicon,clkdiv = <0x140 0xf>;
+ };
+ div_mmc3: clkdiv@5 {
+ compatible = "hisilicon,hi3620-clk-div";
+ #clock-cells = <0>;
+ clocks = <&refclk_mmc3>;
+ hisilicon,clkdiv-table = <
+ &dtable 0xf 16 &dtable 0xe 15 &dtable 0xd 14
+ &dtable 0xc 13 &dtable 0xb 12 &dtable 0xa 11
+ &dtable 9 10 &dtable 8 9 &dtable 7 8
+ &dtable 6 7 &dtable 5 6 &dtable 4 5
+ &dtable 3 4 &dtable 2 3 &dtable 1 2
+ &dtable 0 1>;
+ hisilicon,clkdiv = <0x140 0x1e0>;
+ };
+ div_sd: clkdiv@6 {
+ compatible = "hisilicon,hi3620-clk-div";
+ #clock-cells = <0>;
+ clocks = <&refclk_sd>;
+ hisilicon,clkdiv-table = <
+ &dtable 0xf 16 &dtable 0xe 15 &dtable 0xd 14
+ &dtable 0xc 13 &dtable 0xb 12 &dtable 0xa 11
+ &dtable 9 10 &dtable 8 9 &dtable 7 8
+ &dtable 6 7 &dtable 5 6 &dtable 4 5
+ &dtable 3 4 &dtable 2 3 &dtable 1 2
+ &dtable 0 1>;
+ hisilicon,clkdiv = <0x108 0xf>;
};
};
@@ -734,7 +962,7 @@
compatible = "arm,rtc-pl031", "arm,primecell";
reg = <0xfc804000 0x1000>;
interrupts = <0 9 0x4>;
- clocks = <&clk_rtc>;
+ clocks = <&rtcclk>;
clock-names = "apb_pclk";
status = "disabled";
};
@@ -762,8 +990,8 @@
reg = <0xfc800000 0x1000>;
/* timer00 & timer01 */
interrupts = <0 0 4>, <0 1 4>;
- clocks = <&timclk0 &timclk1 &pclk>;
- clock-names = "timer0", "timer1", "apb_pclk";
+ clocks = <&timclk0 &timclk1>;
+ clock-names = "apb_pclk";
status = "disabled";
};
@@ -777,8 +1005,8 @@
reg = <0xfc801000 0x1000>;
/* timer10 & timer11 */
interrupts = <0 2 4>, <0 3 4>;
- clocks = <&timclk0 &timclk1 &pclk>;
- clock-names = "timer0", "timer1", "apb_pclk";
+ clocks = <&timclk2 &timclk3>;
+ clock-names = "apb_pclk";
status = "disabled";
};
@@ -787,8 +1015,8 @@
reg = <0xfca01000 0x1000>;
/* timer20 & timer21 */
interrupts = <0 4 4>, <0 5 4>;
- clocks = <&timclk0 &timclk1 &pclk>;
- clock-names = "timer0", "timer1", "apb_pclk";
+ clocks = <&timclk4 &timclk5>;
+ clock-names = "apb_pclk";
status = "disabled";
};
@@ -797,8 +1025,8 @@
reg = <0xfca02000 0x1000>;
/* timer30 & timer31 */
interrupts = <0 6 4>, <0 7 4>;
- clocks = <&timclk0 &timclk1 &pclk>;
- clock-names = "timer0", "timer1", "apb_pclk";
+ clocks = <&timclk6 &timclk7>;
+ clock-names = "apb_pclk";
status = "disabled";
};
@@ -807,8 +1035,8 @@
reg = <0xfca03000 0x1000>;
/* timer40 & timer41 */
interrupts = <0 96 4>, <0 97 4>;
- clocks = <&timclk0 &timclk1 &pclk>;
- clock-names = "timer0", "timer1", "apb_pclk";
+ clocks = <&timclk8 &timclk9>;
+ clock-names = "apb_pclk";
status = "disabled";
};
@@ -816,7 +1044,7 @@
compatible = "arm,pl011", "arm,primecell";
reg = <0xfcb00000 0x1000>;
interrupts = <0 20 4>;
- clocks = <&clk_uart0>;
+ clocks = <&uartclk0>;
clock-names = "apb_pclk";
status = "disabled";
};
@@ -825,7 +1053,7 @@
compatible = "arm,pl011", "arm,primecell";
reg = <0xfcb01000 0x1000>;
interrupts = <0 21 4>;
- clocks = <&clk_uart1>;
+ clocks = <&uartclk1>;
clock-names = "apb_pclk";
status = "disabled";
};
@@ -834,7 +1062,7 @@
compatible = "arm,pl011", "arm,primecell";
reg = <0xfcb02000 0x1000>;
interrupts = <0 22 4>;
- clocks = <&clk_uart2>;
+ clocks = <&uartclk2>;
clock-names = "apb_pclk";
status = "disabled";
};
@@ -843,7 +1071,7 @@
compatible = "arm,pl011", "arm,primecell";
reg = <0xfcb03000 0x1000>;
interrupts = <0 23 4>;
- clocks = <&clk_uart3>;
+ clocks = <&uartclk3>;
clock-names = "apb_pclk";
status = "disabled";
};
@@ -852,7 +1080,7 @@
compatible = "arm,pl011", "arm,primecell";
reg = <0xfcb04000 0x1000>;
interrupts = <0 24 4>;
- clocks = <&clk_uart4>;
+ clocks = <&uartclk4>;
clock-names = "apb_pclk";
status = "disabled";
};
@@ -867,7 +1095,7 @@
&pmx0 5 0 1 &pmx0 6 1 1 &pmx0 7 2 1>;
interrupt-controller;
#interrupt-cells = <2>;
- clocks = <&pclk>;
+ clocks = <&gpioclk0>;
clock-names = "apb_pclk";
status = "disable";
};
@@ -883,7 +1111,7 @@
&pmx0 6 5 1 &pmx0 7 6 1>;
interrupt-controller;
#interrupt-cells = <2>;
- clocks = <&pclk>;
+ clocks = <&gpioclk1>;
clock-names = "apb_pclk";
status = "disable";
};
@@ -899,7 +1127,7 @@
&pmx0 6 3 1 &pmx0 7 3 1>;
interrupt-controller;
#interrupt-cells = <2>;
- clocks = <&pclk>;
+ clocks = <&gpioclk2>;
clock-names = "apb_pclk";
status = "disable";
};
@@ -915,7 +1143,7 @@
&pmx0 6 11 1 &pmx0 7 11 1>;
interrupt-controller;
#interrupt-cells = <2>;
- clocks = <&pclk>;
+ clocks = <&gpioclk3>;
clock-names = "apb_pclk";
status = "disable";
};
@@ -931,7 +1159,7 @@
&pmx0 6 13 1 &pmx0 7 13 1>;
interrupt-controller;
#interrupt-cells = <2>;
- clocks = <&pclk>;
+ clocks = <&gpioclk4>;
clock-names = "apb_pclk";
status = "disable";
};
@@ -947,7 +1175,7 @@
&pmx0 6 16 1 &pmx0 7 16 1>;
interrupt-controller;
#interrupt-cells = <2>;
- clocks = <&pclk>;
+ clocks = <&gpioclk5>;
clock-names = "apb_pclk";
status = "disable";
};
@@ -963,7 +1191,7 @@
&pmx0 6 18 1 &pmx0 7 19 1>;
interrupt-controller;
#interrupt-cells = <2>;
- clocks = <&pclk>;
+ clocks = <&gpioclk6>;
clock-names = "apb_pclk";
status = "disable";
};
@@ -979,7 +1207,7 @@
&pmx0 6 25 1 &pmx0 7 26 1>;
interrupt-controller;
#interrupt-cells = <2>;
- clocks = <&pclk>;
+ clocks = <&gpioclk7>;
clock-names = "apb_pclk";
status = "disable";
};
@@ -995,7 +1223,7 @@
&pmx0 6 33 1 &pmx0 7 34 1>;
interrupt-controller;
#interrupt-cells = <2>;
- clocks = <&pclk>;
+ clocks = <&gpioclk8>;
clock-names = "apb_pclk";
status = "disable";
};
@@ -1011,7 +1239,7 @@
&pmx0 6 41 1>;
interrupt-controller;
#interrupt-cells = <2>;
- clocks = <&pclk>;
+ clocks = <&gpioclk9>;
clock-names = "apb_pclk";
status = "disable";
};
@@ -1026,7 +1254,7 @@
&pmx0 5 45 1 &pmx0 6 46 1 &pmx0 7 46 1>;
interrupt-controller;
#interrupt-cells = <2>;
- clocks = <&pclk>;
+ clocks = <&gpioclk10>;
clock-names = "apb_pclk";
status = "disable";
};
@@ -1042,7 +1270,7 @@
&pmx0 6 49 1 &pmx0 7 49 1>;
interrupt-controller;
#interrupt-cells = <2>;
- clocks = <&pclk>;
+ clocks = <&gpioclk11>;
clock-names = "apb_pclk";
status = "disable";
};
@@ -1058,7 +1286,7 @@
&pmx0 6 51 1 &pmx0 7 52 1>;
interrupt-controller;
#interrupt-cells = <2>;
- clocks = <&pclk>;
+ clocks = <&gpioclk12>;
clock-names = "apb_pclk";
status = "disable";
};
@@ -1074,7 +1302,7 @@
&pmx0 6 55 1 &pmx0 7 56 1>;
interrupt-controller;
#interrupt-cells = <2>;
- clocks = <&pclk>;
+ clocks = <&gpioclk13>;
clock-names = "apb_pclk";
status = "disable";
};
@@ -1090,7 +1318,7 @@
&pmx0 6 60 1 &pmx0 7 61 1>;
interrupt-controller;
#interrupt-cells = <2>;
- clocks = <&pclk>;
+ clocks = <&gpioclk14>;
clock-names = "apb_pclk";
status = "disable";
};
@@ -1106,7 +1334,7 @@
&pmx0 6 64 1 &pmx0 7 65 1>;
interrupt-controller;
#interrupt-cells = <2>;
- clocks = <&pclk>;
+ clocks = <&gpioclk15>;
clock-names = "apb_pclk";
status = "disable";
};
@@ -1122,7 +1350,7 @@
&pmx0 6 72 1 &pmx0 7 73 1>;
interrupt-controller;
#interrupt-cells = <2>;
- clocks = <&pclk>;
+ clocks = <&gpioclk16>;
clock-names = "apb_pclk";
status = "disable";
};
@@ -1138,7 +1366,7 @@
&pmx0 6 80 1 &pmx0 7 81 1>;
interrupt-controller;
#interrupt-cells = <2>;
- clocks = <&pclk>;
+ clocks = <&gpioclk17>;
clock-names = "apb_pclk";
status = "disable";
};
@@ -1154,7 +1382,7 @@
&pmx0 6 86 1 &pmx0 7 87 1>;
interrupt-controller;
#interrupt-cells = <2>;
- clocks = <&pclk>;
+ clocks = <&gpioclk18>;
clock-names = "apb_pclk";
status = "disable";
};
@@ -1169,7 +1397,7 @@
&pmx0 3 88 1>;
interrupt-controller;
#interrupt-cells = <2>;
- clocks = <&pclk>;
+ clocks = <&gpioclk19>;
clock-names = "apb_pclk";
status = "disable";
};
@@ -1184,7 +1412,7 @@
&pmx0 3 90 1 &pmx0 4 91 1 &pmx0 5 92 1>;
interrupt-controller;
#interrupt-cells = <2>;
- clocks = <&pclk>;
+ clocks = <&gpioclk20>;
clock-names = "apb_pclk";
status = "disable";
};
@@ -1198,7 +1426,7 @@
gpio-ranges = < &pmx0 3 94 1 &pmx0 7 96 1>;
interrupt-controller;
#interrupt-cells = <2>;
- clocks = <&pclk>;
+ clocks = <&gpioclk21>;
clock-names = "apb_pclk";
status = "disable";
};
@@ -1234,20 +1462,13 @@
pinctrl-single,register-width = <32>;
};
- sysctrl@fc802000 {
- compatible = "hisilicon,sysctrl";
- reg = <0xfc802000 0x1000>;
- smp_reg = <0x31c>;
- reboot_reg = <0x4>;
- };
-
dma0: dma@fcd02000 {
compatible = "hisilicon,k3-dma-1.0";
reg = <0xfcd02000 0x1000>;
#dma-cells = <1>;
dma-channels = <27>;
interrupts = <0 12 4>;
- clocks = <&clk_dmac>;
+ clocks = <&dmaclk>;
status = "disable";
};
@@ -1257,7 +1478,7 @@
#size-cells = <0>;
reg = <0xfcb08000 0x1000>;
interrupts = <0 28 4>;
- clocks = <&clk_i2c0>;
+ clocks = <&i2cclk0>;
dmas = <&dma0 18 /* read channel */
&dma0 19>; /* write channel */
dma-names = "rx", "tx";
@@ -1271,7 +1492,7 @@
#size-cells = <0>;
reg = <0xfcb09000 0x1000>;
interrupts = <0 29 4>;
- clocks = <&clk_i2c1>;
+ clocks = <&i2cclk1>;
dmas = <&dma0 20 /* read channel */
&dma0 21>; /* write channel */
dma-names = "rx", "tx";
@@ -1283,7 +1504,7 @@
compatible = "hisilicon,designware-i2c";
reg = <0xfcb0c000 0x1000>;
interrupts = <0 62 4>;
- clocks = <&clk_i2c2>;
+ clocks = <&i2cclk2>;
delay-reg = <0xc 4>;
status = "disabled";
};
@@ -1292,7 +1513,7 @@
compatible = "hisilicon,designware-i2c";
reg = <0xfcb0d000 0x1000>;
interrupts = <0 63 4>;
- clocks = <&clk_i2c3>;
+ clocks = <&i2cclk3>;
delay-reg = <0xc 5>;
status = "disabled";
};
@@ -1301,7 +1522,7 @@
compatible = "hisilicon,hi3620-mcu";
reg = <0xfd000000 0x00010000>;
interrupts = <0 89 4>;
- clocks = <&clk_mcu>;
+ clocks = <&mcuclk>;
status = "disabled";
};
@@ -1312,7 +1533,7 @@
interrupts = <0 17 4>;
#address-cells = <1>;
#size-cells = <0>;
- clocks = <&clk_mmc1>, <&clk_ddrc_per>;
+ clocks = <&mmcclk1>, <&ddrcperclk>;
clock-names = "ciu", "biu";
};
@@ -1323,7 +1544,7 @@
interrupts = <0 16 4>;
#address-cells = <1>;
#size-cells = <0>;
- clocks = <&clk_sd>, <&clk_ddrc_per>;
+ clocks = <&sdclk>, <&ddrcperclk>;
clock-names = "ciu", "biu";
};
@@ -1333,7 +1554,7 @@
interrupts = <0 18 4>;
#address-cells = <1>;
#size-cells = <0>;
- clocks = <&clk_mmc2>;
+ clocks = <&mmcclk2>;
};
dwmmc_3: dwmmc3@fcd06000 {
@@ -1342,14 +1563,73 @@
interrupts = <0 19 4>;
#address-cells = <1>;
#size-cells = <0>;
- clocks = <&clk_mmc3>;
+ clocks = <&mmcclk3>;
};
kpc: kpc@fc805000 {
compatible = "hisilicon,k3_keypad";
reg = <0xfc805000 0x1000>;
interrupts = <0 10 4>;
- clocks = <&clk_kpc>;
+ clocks = <&kpcclk>;
status = "disabled";
};
+ edc0: edc@fa202000 {
+ compatible = "hisilicon,hi3620-fb";
+ reg = <0xfa202000 0x1000>;
+ clocks = <&ldiclk0 &edcclk0 &dsiclk0 &lanebyteclk0>;
+ clock-names = "ldi", "edc", "dsi", "lane";
+ interrupts = <0 38 0x4>, <0 39 0x4>, <0 40 0x4>;
+ interrupt-names = "edc", "ldi", "dsi";
+ status = "disabled";
+
+ dsi2xclk0: clkdsi@0 {
+ compatible = "hisilicon,hi3620-phy";
+ #clock-cells = <0>;
+ clocks = <&osc26m>;
+ clock-output-names = "clk_dsi2x0";
+ };
+ dsiclk0: clkdsi@1 {
+ compatible = "hisilicon,clk-fixed-factor";
+ #clock-cells = <0>;
+ clocks = <&dsi2xclk0>;
+ clock-output-names = "clk_dsi0";
+ /*mult, div*/
+ hisilicon,fixed-factor = <1 2>;
+ };
+ lanebyteclk0: clkdsi@2 {
+ compatible = "hisilicon,clk-fixed-factor";
+ #clock-cells = <0>;
+ clocks = <&dsi2xclk0>;
+ clock-output-names = "clk_lanebyte0";
+ /*mult, div*/
+ hisilicon,fixed-factor = <1 8>;
+ };
+ escclk0: clkdsi@3 {
+ compatible = "hisilicon,hi3620-phy-esc";
+ #clock-cells = <0>;
+ clocks = <&lanebyteclk0>;
+ clock-output-names = "clk_dsi_phy_esc0";
+ };
+ };
+ edc1: edc@fa206900 {
+ compatible = "hisilicon,hi3620-fb";
+ clocks = <&ldiclk1 &edcclk1>;
+ clock-names = "ldi", "edc";
+ status = "disabled";
+ };
+ pwm0: pwm@fca05000 {
+ compatible = "hisilicon,hi3620-pwm";
+ reg = <0xfca05000 0x1000>;
+ clocks = <&pwmclk0>;
+ #pwm-cells = <2>;
+ status = "disabled";
+ };
+ pwm1: pwm@fca06000 {
+ compatible = "hisilicon,hi3620-pwm";
+ reg = <0xfca06000 0x1000>;
+ clocks = <&pwmclk1>;
+ #pwm-cells = <2>;
+ status = "disabled";
+ };
+
};
};
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-10 05:40:38 +0000