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authorHaojian Zhuang <haojian.zhuang@linaro.org>2014-05-07 08:55:29 +0800
committerHaojian Zhuang <haojian.zhuang@linaro.org>2014-05-26 09:00:05 +0800
commit7ee6cd70e23d17190642c2c6ed0183580e196736 (patch)
tree0cf2b7f8c66cdb4e3112a54765da28d023274811 /arch/arm/boot/dts/hip04-d01.dts
parent324c5a3d8330948062fbf77d6fd90b6fd836029f (diff)
ARM: dts: append hip04 dts
Add hip04-d01.dts & hip04.dtsi for hip04 SoC platform. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/hip04-d01.dts')
-rw-r--r--arch/arm/boot/dts/hip04-d01.dts39
1 files changed, 39 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/hip04-d01.dts b/arch/arm/boot/dts/hip04-d01.dts
new file mode 100644
index 000000000000..661c8e5f7d7e
--- /dev/null
+++ b/arch/arm/boot/dts/hip04-d01.dts
@@ -0,0 +1,39 @@
+/*
+ * Copyright (C) 2013-2014 Linaro Ltd.
+ * Author: Haojian Zhuang <haojian.zhuang@linaro.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * publishhed by the Free Software Foundation.
+ */
+
+/dts-v1/;
+
+/* For bootwrapper */
+/memreserve/ 0x10c00000 0x00010000;
+
+#include "hip04.dtsi"
+
+/ {
+ /* memory bus is 64-bit */
+ #address-cells = <2>;
+ #size-cells = <2>;
+ model = "Hisilicon D01 Development Board";
+ compatible = "hisilicon,hip04-d01";
+
+ memory@00000000,10000000 {
+ device_type = "memory";
+ reg = <0x00000000 0x10000000 0x00000000 0xc0000000>;
+ };
+
+ memory@00000004,c0000000 {
+ device_type = "memory";
+ reg = <0x00000004 0xc0000000 0x00000003 0x40000000>;
+ };
+
+ soc {
+ uart0: uart@4007000 {
+ status = "ok";
+ };
+ };
+};