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author | Haojian Zhuang <haojian.zhuang@linaro.org> | 2013-01-30 09:14:51 +0800 |
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committer | Guodong Xu <guodong.xu@linaro.org> | 2013-02-21 16:12:22 +0800 |
commit | 674efa4f7978273d011d261bfc54216118f4d4e0 (patch) | |
tree | 1a250e8486b7010302f5c11ae7bbe7278ca8da35 /arch/arm/boot/dts/hi3620.dtsi | |
parent | 8f7ab35648ae87235c34727ee2b9da2fb18d58e2 (diff) |
ARM: dts: append l2 aux property in hi3620
L2 aux property is used to initialize L2 cache.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/hi3620.dtsi')
-rw-r--r-- | arch/arm/boot/dts/hi3620.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/hi3620.dtsi b/arch/arm/boot/dts/hi3620.dtsi index 37f047b3d995..763e9937cf85 100644 --- a/arch/arm/boot/dts/hi3620.dtsi +++ b/arch/arm/boot/dts/hi3620.dtsi @@ -74,6 +74,7 @@ interrupts = <0 15 4>; cache-unified; cache-level = <2>; + hisilicon,l2cache-aux = <0x30070000 0xf00f0000>; }; intc: interrupt-controller@fc001000 { |