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authorZhangfei Gao <zhangfei.gao@linaro.org>2013-01-31 17:51:44 +0800
committerGuodong Xu <guodong.xu@linaro.org>2013-02-21 16:12:29 +0800
commit2ec5131cc00286299f807c894cfda0cf0d87dc4d (patch)
tree03a3f6501bb40d774473d81a534f8cda6162cc83 /arch/arm/boot/dts/hi3620.dtsi
parentfde95916f3324ed278ce1e797c174e0f6cf64e9d (diff)
ARM: hs: add dma and i2c resource
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/hi3620.dtsi')
-rw-r--r--arch/arm/boot/dts/hi3620.dtsi52
1 files changed, 52 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/hi3620.dtsi b/arch/arm/boot/dts/hi3620.dtsi
index 073b802d8ce6..509689804745 100644
--- a/arch/arm/boot/dts/hi3620.dtsi
+++ b/arch/arm/boot/dts/hi3620.dtsi
@@ -569,5 +569,57 @@
smp_reg = <0x31c>;
reboot_reg = <0x4>;
};
+
+ dma0: dma@fcd02000 {
+ compatible = "hisilicon,k3-dma-1.0";
+ reg = <0xfcd02000 0x1000>;
+ #dma-cells = <1>;
+ dma-channels = <27>;
+ interrupts = <0 12 4>;
+ clocks = <&pclk>;
+ status = "disable";
+ };
+
+ i2c0: i2c@fcb08000 {
+ compatible = "hisilicon,designware-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0xfcb08000 0x1000>;
+ interrupts = <0 28 4>;
+ clocks = <&pclk>;
+ dmas = <&dma0 18 /* read channel */
+ &dma0 19>; /* write channel */
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ i2c1: i2c@fcb09000 {
+ compatible = "hisilicon,designware-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0xfcb09000 0x1000>;
+ interrupts = <0 29 4>;
+ clocks = <&pclk>;
+ dmas = <&dma0 20 /* read channel */
+ &dma0 21>; /* write channel */
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ i2c2: i2c@fcb0c000 {
+ compatible = "hisilicon,designware-i2c";
+ reg = <0xfcb0c000 0x1000>;
+ interrupts = <0 62 4>;
+ clocks = <&pclk>;
+ status = "disabled";
+ };
+
+ i2c3: i2c@fcb0d000 {
+ compatible = "hisilicon,designware-i2c";
+ reg = <0xfcb0d000 0x1000>;
+ interrupts = <0 63 4>;
+ clocks = <&pclk>;
+ status = "disabled";
+ };
};
};