ARM: dts: add clock for mmc, mcu

Signed-off-by: LiXin <li.xin@linaro.org>

1 files changed, 136 insertions, 7 deletions

diff --git a/arch/arm/boot/dts/hi3620.dtsi b/arch/arm/boot/dts/hi3620.dtsi
index f34fdb80682d..a6c0a5035be8 100644
--- a/arch/arm/boot/dts/hi3620.dtsi
+++ b/arch/arm/boot/dts/hi3620.dtsi
@@ -266,13 +266,6 @@
 				hisilicon,hi3620-clkmux = <0x104 0x400>;
 			};
 
-			clk_mmc1_mux: mmc1_mux{
-				compatible = "hisilicon,muxclock";
-				#clock-cells = <0>;
-				clocks = <&osc26m &clk_cfgaxi>;
-				hisilicon,hi3620-clkmux = <0x108 0x200>;
-			};
-
 			clk_venc_mux: venc_mux{
 				compatible = "hisilicon,muxclock";
 				#clock-cells = <0>;
@@ -543,6 +536,142 @@
 				clock-output-names = "clk_dmac";
 			};
 
+			/*mmc clk*/
+			clk_mmc1_mux: mmc1_mux{
+				compatible = "hisilicon,muxclock";
+				#clock-cells = <0>;
+				clocks = <&peripll &usbpll>;
+				hisilicon,hi3620-clkmux = <0x108 0x200>;
+			};
+
+			clk_mmc2_mux: mmc2_mux{
+				compatible = "hisilicon,muxclock";
+				#clock-cells = <0>;
+				clocks = <&peripll &usbpll>;
+				hisilicon,hi3620-clkmux = <0x140 0x010>;
+			};
+
+			clk_mmc3_mux: mmc3_mux{
+				compatible = "hisilicon,muxclock";
+				#clock-cells = <0>;
+				clocks = <&peripll &usbpll>;
+				hisilicon,hi3620-clkmux = <0x140 0x200>;
+			};
+
+			clk_sd_mux: sd_mux{
+				compatible = "hisilicon,muxclock";
+				#clock-cells = <0>;
+				clocks = <&peripll &usbpll>;
+				hisilicon,hi3620-clkmux = <0x108 0x010>;
+			};
+
+
+			/*-----------divider table clk---------------------*/
+			clk_div_mmc1: div_mmc1{
+				compatible = "hisilicon,divclock";
+				#clock-cells = <0>;
+				clocks = <&clk_mmc1_mux>;
+				hisilicon,clkdiv-table = <&divtable 0x0f 16 &divtable 0x0e 15 &divtable 0x0d 14
+							&divtable 0x0c 13 &divtable 0x0b 12 &divtable 0x0a 11
+							&divtable 0x09 10 &divtable 0x08 9 &divtable 0x07 8
+							&divtable 0x06 7 &divtable 0x05 6 &divtable 0x04 5
+							&divtable 0x03 4 &divtable 0x02 3 &divtable 0x01 2
+							&divtable 0x00 1>;
+				/*divider register offset, shift, width*/
+				hisilicon,hi3620-clkdiv = <0x108 5 4>;
+			};
+
+			clk_div_mmc2: div_mmc2{
+				compatible = "hisilicon,divclock";
+				#clock-cells = <0>;
+				clocks = <&clk_mmc2_mux>;
+				hisilicon,clkdiv-table = <&divtable 0x0f 16 &divtable 0x0e 15 &divtable 0x0d 14
+							&divtable 0x0c 13 &divtable 0x0b 12 &divtable 0x0a 11
+							&divtable 0x09 10 &divtable 0x08 9 &divtable 0x07 8
+							&divtable 0x06 7 &divtable 0x05 6 &divtable 0x04 5
+							&divtable 0x03 4 &divtable 0x02 3 &divtable 0x01 2
+							&divtable 0x00 1>;
+				/*divider register offset, shift, width*/
+				hisilicon,hi3620-clkdiv = <0x140 0 4>;
+			};
+
+			clk_div_mmc3: div_mmc3{
+				compatible = "hisilicon,divclock";
+				#clock-cells = <0>;
+				clocks = <&clk_mmc3_mux>;
+				hisilicon,clkdiv-table = <&divtable 0x0f 16 &divtable 0x0e 15 &divtable 0x0d 14
+							&divtable 0x0c 13 &divtable 0x0b 12 &divtable 0x0a 11
+							&divtable 0x09 10 &divtable 0x08 9 &divtable 0x07 8
+							&divtable 0x06 7 &divtable 0x05 6 &divtable 0x04 5
+							&divtable 0x03 4 &divtable 0x02 3 &divtable 0x01 2
+							&divtable 0x00 1>;
+				/*divider register offset, shift, width*/
+				hisilicon,hi3620-clkdiv = <0x140 5 4>;
+			};
+
+			clk_div_sd: div_sd{
+				compatible = "hisilicon,divclock";
+				#clock-cells = <0>;
+				clocks = <&clk_sd_mux>;
+				hisilicon,clkdiv-table = <&divtable 0x0f 16 &divtable 0x0e 15 &divtable 0x0d 14&divtable 0x0c 13
+							&divtable 0x0b 12 &divtable 0x0a 11 &divtable 0x09 10 &divtable 0x08 9
+							&divtable 0x07 8 &divtable 0x06 7 &divtable 0x05 6 &divtable 0x04 5
+							&divtable 0x03 4 &divtable 0x02 3 &divtable 0x01 2 &divtable 0x00 1>;
+				/*divider register offset, shift, width*/
+				hisilicon,hi3620-clkdiv = <0x108 0 4>;
+			};
+
+			/*---------------gate--------------------*/
+			clk_mmc1_parent: mmc1_parent{
+				compatible = "hisilicon,muxclock";
+				#clock-cells = <0>;
+				clocks = <&osc26m &clk_div_mmc1>;
+				hisilicon,hi3620-clkmux = <0x108 0x400>;
+			};
+
+			clk_mmc1: mmc1 {
+				compatible = "hisilicon,periclock";
+				#clock-cells = <0>;
+				clocks = <&clk_mmc1_parent>;
+				hisilicon,hi3620-clkgate = <0x50 21>;
+			};
+
+			clk_mmc2: mmc2 {
+				compatible = "hisilicon,periclock";
+				#clock-cells = <0>;
+				clocks = <&clk_div_mmc2>;
+				hisilicon,hi3620-clkgate = <0x50 22>;
+			};
+
+			clk_mmc3: mmc3 {
+				compatible = "hisilicon,periclock";
+				#clock-cells = <0>;
+				clocks = <&clk_div_mmc3>;
+				hisilicon,hi3620-clkgate = <0x50 23>;
+			};
+
+			clk_sd: sd {
+				compatible = "hisilicon,periclock";
+				#clock-cells = <0>;
+				clocks = <&clk_div_sd>;
+				hisilicon,hi3620-clkgate = <0x50 20>;
+			};
+
+			clk_ddrc_per: ddrc_per {
+				compatible = "hisilicon,periclock";
+				#clock-cells = <0>;
+				clocks = <&clk_cfgaxi>;
+				hisilicon,hi3620-clkgate = <0x50 9>;
+			};
+
+			clk_mcu: mcu{
+				compatible = "hisilicon,periclock";
+				#clock-cells = <0>;
+				clocks = <&clk_cfgaxi>;
+				hisilicon,hi3620-clkgate = <0x50 24>;
+				clock-output-names = "clk_mcu";
+			};
+
 			/*rtc clk*/
 			clk_rtc: rtc{
 				compatible = "hisilicon,periclock";