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| author | Haojian Zhuang <haojian.zhuang@linaro.org> | 2014-04-17 16:04:04 +0800 |
|---|---|---|
| committer | Haojian Zhuang <haojian.zhuang@linaro.org> | 2014-05-26 09:13:08 +0800 |
| commit | 4ba2e6fc1b4b0d206bc15e2069f5e63a1a9b0ed7 (patch) | |
| tree | 54db27c4fea4d1f905cbae33b5c1c067ec73b4be /CREDITS | |
| parent | 49bcb58ecb9bcde66fd189dc169060e274ed4d58 (diff) | |
virt: arm: support hip04 gic
In ARM standard GIC, GICH_APR offset is 0xf0 & GICH_LR0 offset is 0x100.
In HiP04 GIC, GICH_APR offset is 0x70 & GICH_LR0 offset is 0x80.
Now reuse the nr_lr field in struct vgic_cpu. Bit[31:16] is used to store
GICH_APR offset in HiP04, and bit[15:0] is used to store real nr_lr
variable. In ARM standard GIC, don't set bit[31:16]. So we could avoid
to change the VGIC implementation in arm64.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Diffstat (limited to 'CREDITS')
0 files changed, 0 insertions, 0 deletions