diff options
| author | LiXin <li.xin@linaro.org> | 2013-02-01 11:33:47 +0800 |
|---|---|---|
| committer | Guodong Xu <guodong.xu@linaro.org> | 2013-02-21 16:12:38 +0800 |
| commit | 7378818c0204d8284caeafb53d7e72465d96a6cd (patch) | |
| tree | 4dea7a47b693a4c700c1e8084dca008a2cf71cd3 | |
| parent | 58db109ac8de64bd0cd8a1f4bc74e7f2e4ee0348 (diff) | |
ARM: dts: add clock for i2c,rtc,dmac
Add clock dts for i2c, rtc, dmac.
Signed-off-by: LiXin <li.xin@linaro.org>
| -rw-r--r-- | arch/arm/boot/dts/hi3620.dtsi | 60 |
1 files changed, 54 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/hi3620.dtsi b/arch/arm/boot/dts/hi3620.dtsi index 9ea90a5b53cf..ae2f2f9a18d9 100644 --- a/arch/arm/boot/dts/hi3620.dtsi +++ b/arch/arm/boot/dts/hi3620.dtsi @@ -489,6 +489,54 @@ clock-output-names = "clk_gpio21"; }; + /*i2c clk*/ + clk_i2c0: i2c0{ + compatible = "hisilicon,periclock"; + #clock-cells = <0>; + clocks = <&clk_cfgaxi>; + hisilicon,hi3620-clkgate = <0x40 24>; + clock-output-names = "clk_i2c0"; + }; + clk_i2c1: i2c1{ + compatible = "hisilicon,periclock"; + #clock-cells = <0>; + clocks = <&clk_cfgaxi>; + hisilicon,hi3620-clkgate = <0x40 25>; + clock-output-names = "clk_i2c1"; + }; + clk_i2c2: i2c2{ + compatible = "hisilicon,periclock"; + #clock-cells = <0>; + clocks = <&clk_cfgaxi>; + hisilicon,hi3620-clkgate = <0x40 28>; + clock-output-names = "clk_i2c2"; + }; + clk_i2c3: i2c3{ + compatible = "hisilicon,periclock"; + #clock-cells = <0>; + clocks = <&clk_cfgaxi>; + hisilicon,hi3620-clkgate = <0x40 29>; + clock-output-names = "clk_i2c3"; + }; + + /*dmac clk*/ + clk_dmac: dmac{ + compatible = "hisilicon,periclock"; + #clock-cells = <0>; + clocks = <&clk_cfgaxi>; + hisilicon,hi3620-clkgate = <0x50 10>; + clock-output-names = "clk_dmac"; + }; + + /*rtc clk*/ + clk_rtc: rtc{ + compatible = "hisilicon,periclock"; + #clock-cells = <0>; + clocks = <&pclk>; + hisilicon,hi3620-clkgate = <0x20 5>; + clock-output-names = "clk_rtc"; + }; + /*--------------------divider clock -------------------*/ divtable: clkdiv { #hisilicon,clkdiv-table-cells = <2>; @@ -516,7 +564,7 @@ compatible = "arm,rtc-pl031", "arm,primecell"; reg = <0xfc804000 0x1000>; interrupts = <0 9 0x4>; - clocks = <&pclk>; /* need to be replaced by rtcclk */ + clocks = <&clk_rtc>; clock-names = "apb_pclk"; status = "disabled"; }; @@ -1029,7 +1077,7 @@ #dma-cells = <1>; dma-channels = <27>; interrupts = <0 12 4>; - clocks = <&pclk>; + clocks = <&clk_dmac>; status = "disable"; }; @@ -1039,7 +1087,7 @@ #size-cells = <0>; reg = <0xfcb08000 0x1000>; interrupts = <0 28 4>; - clocks = <&pclk>; + clocks = <&clk_i2c0>; dmas = <&dma0 18 /* read channel */ &dma0 19>; /* write channel */ dma-names = "rx", "tx"; @@ -1052,7 +1100,7 @@ #size-cells = <0>; reg = <0xfcb09000 0x1000>; interrupts = <0 29 4>; - clocks = <&pclk>; + clocks = <&clk_i2c1>; dmas = <&dma0 20 /* read channel */ &dma0 21>; /* write channel */ dma-names = "rx", "tx"; @@ -1063,7 +1111,7 @@ compatible = "hisilicon,designware-i2c"; reg = <0xfcb0c000 0x1000>; interrupts = <0 62 4>; - clocks = <&pclk>; + clocks = <&clk_i2c2>; status = "disabled"; }; @@ -1071,7 +1119,7 @@ compatible = "hisilicon,designware-i2c"; reg = <0xfcb0d000 0x1000>; interrupts = <0 63 4>; - clocks = <&pclk>; + clocks = <&clk_i2c3>; status = "disabled"; }; }; |