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| author | Haojian Zhuang <haojian.zhuang@linaro.org> | 2014-05-26 09:26:27 +0800 |
|---|---|---|
| committer | Haojian Zhuang <haojian.zhuang@linaro.org> | 2014-05-26 09:26:27 +0800 |
| commit | bc3c2fe72333567a1c7026be11cb8e82b0740530 (patch) | |
| tree | f473694152c6bbcd489d55045645fed25da2b85e | |
| parent | 4ba2e6fc1b4b0d206bc15e2069f5e63a1a9b0ed7 (diff) | |
Revert "irqchip: gic: use dmb ishst instead of dsb when raising a softirq"
This reverts commit 0edc2b5ee8ffcf648368a4a3597321c3a2231187.
| -rw-r--r-- | drivers/irqchip/irq-gic.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c index 5a62edfab734..e9902194b698 100644 --- a/drivers/irqchip/irq-gic.c +++ b/drivers/irqchip/irq-gic.c @@ -720,9 +720,9 @@ static void gic_raise_softirq(const struct cpumask *mask, unsigned int irq) /* * Ensure that stores to Normal memory are visible to the - * other CPUs before they observe us issuing the IPI. + * other CPUs before issuing the IPI. */ - dmb(ishst); + dsb(); /* * CPUTargetList -- bit[23:16] in GIC_DIST_SOFTINT in ARM GIC. |