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authorKefeng Wang <kefeng.wang@linaro.org>2014-03-17 18:27:07 +0800
committerKefeng Wang <kefeng.wang@linaro.org>2014-03-17 18:27:07 +0800
commit525018c317cff1d9e5de9cbe2ca89085be70c22b (patch)
treefc993353d6d23e711acaeea7b20ac1737427a4a3
parent12bb75e3ebe2ac3abaa2b4bc42af2c38d85a6826 (diff)
ARM: hip04: add l3 cache device node
Signed-off-by: Kefeng Wang <kefeng.wang@linaro.org>
-rw-r--r--arch/arm/boot/dts/hip04.dtsi5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/hip04.dtsi b/arch/arm/boot/dts/hip04.dtsi
index 2484c85bb76c..6c26b9c26bda 100644
--- a/arch/arm/boot/dts/hip04.dtsi
+++ b/arch/arm/boot/dts/hip04.dtsi
@@ -237,6 +237,11 @@
status = "disabled";
};
+ L3: L3cache@302b000 {
+ compatible = "hisilicon,hip04-l3cache";
+ reg = <0x302b000 0x1000>;
+ };
+
sata@a000000 {
compatible = "hisilicon,hisi-ahci";
reg = <0xa000000 0x1000000>;