From fc5d2d279ff820172a698706d33e733d4578bd6c Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Thu, 6 Jul 2006 13:04:01 +0100 Subject: [MIPS] Use the proper technical term for naming some of the cache macros. Signed-off-by: Ralf Baechle --- arch/mips/mm/c-r4k.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index 857b726f4d4..ed35ee57b38 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c @@ -578,7 +578,7 @@ static inline void local_r4k_flush_icache_page(void *args) * secondary cache will result in any entries in the primary caches * also getting invalidated which hopefully is a bit more economical. */ - if (cpu_has_subset_pcaches) { + if (cpu_has_inclusive_pcaches) { unsigned long addr = (unsigned long) page_address(page); r4k_blast_scache_page(addr); @@ -634,7 +634,7 @@ static void r4k_dma_cache_wback_inv(unsigned long addr, unsigned long size) /* Catch bad driver code */ BUG_ON(size == 0); - if (cpu_has_subset_pcaches) { + if (cpu_has_inclusive_pcaches) { if (size >= scache_size) r4k_blast_scache(); else @@ -662,7 +662,7 @@ static void r4k_dma_cache_inv(unsigned long addr, unsigned long size) /* Catch bad driver code */ BUG_ON(size == 0); - if (cpu_has_subset_pcaches) { + if (cpu_has_inclusive_pcaches) { if (size >= scache_size) r4k_blast_scache(); else @@ -1192,7 +1192,7 @@ static void __init setup_scache(void) printk("Unified secondary cache %ldkB %s, linesize %d bytes.\n", scache_size >> 10, way_string[c->scache.ways], c->scache.linesz); - c->options |= MIPS_CPU_SUBSET_CACHES; + c->options |= MIPS_CPU_INCLUSIVE_CACHES; } void au1x00_fixup_config_od(void) -- cgit v1.2.3