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-rw-r--r--include/asm-parisc/assembly.h20
-rw-r--r--include/asm-parisc/atomic.h12
-rw-r--r--include/asm-parisc/bitops.h24
-rw-r--r--include/asm-parisc/bug.h88
-rw-r--r--include/asm-parisc/cache.h29
-rw-r--r--include/asm-parisc/cacheflush.h179
-rw-r--r--include/asm-parisc/dma-mapping.h2
-rw-r--r--include/asm-parisc/elf.h2
-rw-r--r--include/asm-parisc/hardware.h16
-rw-r--r--include/asm-parisc/io.h4
-rw-r--r--include/asm-parisc/led.h2
-rw-r--r--include/asm-parisc/linkage.h28
-rw-r--r--include/asm-parisc/mmzone.h2
-rw-r--r--include/asm-parisc/module.h2
-rw-r--r--include/asm-parisc/msgbuf.h6
-rw-r--r--include/asm-parisc/page.h8
-rw-r--r--include/asm-parisc/parisc-device.h2
-rw-r--r--include/asm-parisc/pdc.h10
-rw-r--r--include/asm-parisc/pdcpat.h31
-rw-r--r--include/asm-parisc/pgalloc.h10
-rw-r--r--include/asm-parisc/pgtable.h1
-rw-r--r--include/asm-parisc/posix_types.h2
-rw-r--r--include/asm-parisc/processor.h10
-rw-r--r--include/asm-parisc/sembuf.h4
-rw-r--r--include/asm-parisc/shmbuf.h10
-rw-r--r--include/asm-parisc/signal.h2
-rw-r--r--include/asm-parisc/smp.h8
-rw-r--r--include/asm-parisc/spinlock_types.h4
-rw-r--r--include/asm-parisc/statfs.h10
-rw-r--r--include/asm-parisc/system.h2
-rw-r--r--include/asm-parisc/thread_info.h4
-rw-r--r--include/asm-parisc/tlbflush.h30
-rw-r--r--include/asm-parisc/types.h2
-rw-r--r--include/asm-parisc/uaccess.h122
-rw-r--r--include/asm-parisc/unistd.h12
35 files changed, 291 insertions, 409 deletions
diff --git a/include/asm-parisc/assembly.h b/include/asm-parisc/assembly.h
index 5a1e0e8b1c3..5587f002388 100644
--- a/include/asm-parisc/assembly.h
+++ b/include/asm-parisc/assembly.h
@@ -31,9 +31,13 @@
#define STREGM std,ma
#define SHRREG shrd
#define SHLREG shld
+#define ADDIB addib,*
+#define CMPB cmpb,*
+#define ANDCM andcm,*
#define RP_OFFSET 16
#define FRAME_SIZE 128
#define CALLEE_REG_FRAME_SIZE 144
+#define ASM_ULONG_INSN .dword
#else /* CONFIG_64BIT */
#define LDREG ldw
#define STREG stw
@@ -42,9 +46,13 @@
#define STREGM stwm
#define SHRREG shr
#define SHLREG shlw
+#define ADDIB addib,
+#define CMPB cmpb,
+#define ANDCM andcm
#define RP_OFFSET 20
#define FRAME_SIZE 64
#define CALLEE_REG_FRAME_SIZE 128
+#define ASM_ULONG_INSN .word
#endif
#define CALLEE_SAVE_FRAME_SIZE (CALLEE_REG_FRAME_SIZE + CALLEE_FLOAT_FRAME_SIZE)
@@ -65,7 +73,7 @@
#ifdef __ASSEMBLY__
-#ifdef __LP64__
+#ifdef CONFIG_64BIT
/* the 64-bit pa gnu assembler unfortunately defaults to .level 1.1 or 2.0 so
* work around that for now... */
.level 2.0w
@@ -156,7 +164,7 @@
.endm
.macro loadgp
-#ifdef __LP64__
+#ifdef CONFIG_64BIT
ldil L%__gp, %r27
ldo R%__gp(%r27), %r27
#else
@@ -334,7 +342,7 @@
fldd,mb -8(%r30), %fr12
.endm
-#ifdef __LP64__
+#ifdef CONFIG_64BIT
.macro callee_save
std,ma %r3, CALLEE_REG_FRAME_SIZE(%r30)
mfctl %cr27, %r3
@@ -377,7 +385,7 @@
ldd,mb -CALLEE_REG_FRAME_SIZE(%r30), %r3
.endm
-#else /* ! __LP64__ */
+#else /* ! CONFIG_64BIT */
.macro callee_save
stw,ma %r3, CALLEE_REG_FRAME_SIZE(%r30)
@@ -420,7 +428,7 @@
mtctl %r3, %cr27
ldw,mb -CALLEE_REG_FRAME_SIZE(%r30), %r3
.endm
-#endif /* ! __LP64__ */
+#endif /* ! CONFIG_64BIT */
.macro save_specials regs
@@ -441,7 +449,7 @@
mtctl %r0, %cr18
SAVE_CR (%cr18, PT_IAOQ1(\regs))
-#ifdef __LP64__
+#ifdef CONFIG_64BIT
/* cr11 (sar) is a funny one. 5 bits on PA1.1 and 6 bit on PA2.0
* For PA2.0 mtsar or mtctl always write 6 bits, but mfctl only
* reads 5 bits. Use mfctl,w to read all six bits. Otherwise
diff --git a/include/asm-parisc/atomic.h b/include/asm-parisc/atomic.h
index 48bf9b8ab8f..7d57d34fcca 100644
--- a/include/asm-parisc/atomic.h
+++ b/include/asm-parisc/atomic.h
@@ -58,7 +58,7 @@ extern void __xchg_called_with_bad_pointer(void);
/* __xchg32/64 defined in arch/parisc/lib/bitops.c */
extern unsigned long __xchg8(char, char *);
extern unsigned long __xchg32(int, int *);
-#ifdef __LP64__
+#ifdef CONFIG_64BIT
extern unsigned long __xchg64(unsigned long, unsigned long *);
#endif
@@ -67,7 +67,7 @@ static __inline__ unsigned long
__xchg(unsigned long x, __volatile__ void * ptr, int size)
{
switch(size) {
-#ifdef __LP64__
+#ifdef CONFIG_64BIT
case 8: return __xchg64(x,(unsigned long *) ptr);
#endif
case 4: return __xchg32((int) x, (int *) ptr);
@@ -81,7 +81,7 @@ __xchg(unsigned long x, __volatile__ void * ptr, int size)
/*
** REVISIT - Abandoned use of LDCW in xchg() for now:
** o need to test sizeof(*ptr) to avoid clearing adjacent bytes
-** o and while we are at it, could __LP64__ code use LDCD too?
+** o and while we are at it, could CONFIG_64BIT code use LDCD too?
**
** if (__builtin_constant_p(x) && (x == NULL))
** if (((unsigned long)p & 0xf) == 0)
@@ -105,7 +105,7 @@ static __inline__ unsigned long
__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new_, int size)
{
switch(size) {
-#ifdef __LP64__
+#ifdef CONFIG_64BIT
case 8: return __cmpxchg_u64((unsigned long *)ptr, old, new_);
#endif
case 4: return __cmpxchg_u32((unsigned int *)ptr, (unsigned int) old, (unsigned int) new_);
@@ -218,7 +218,7 @@ static __inline__ int atomic_read(const atomic_t *v)
#define smp_mb__before_atomic_inc() smp_mb()
#define smp_mb__after_atomic_inc() smp_mb()
-#ifdef __LP64__
+#ifdef CONFIG_64BIT
typedef struct { volatile s64 counter; } atomic64_t;
@@ -270,7 +270,7 @@ atomic64_read(const atomic64_t *v)
#define atomic64_dec_and_test(v) (atomic64_dec_return(v) == 0)
#define atomic64_sub_and_test(i,v) (atomic64_sub_return((i),(v)) == 0)
-#endif /* __LP64__ */
+#endif /* CONFIG_64BIT */
#include <asm-generic/atomic.h>
diff --git a/include/asm-parisc/bitops.h b/include/asm-parisc/bitops.h
index 900561922c4..015cb0d379b 100644
--- a/include/asm-parisc/bitops.h
+++ b/include/asm-parisc/bitops.h
@@ -60,31 +60,37 @@ static __inline__ void change_bit(int nr, volatile unsigned long * addr)
static __inline__ int test_and_set_bit(int nr, volatile unsigned long * addr)
{
unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr);
- unsigned long oldbit;
+ unsigned long old;
unsigned long flags;
+ int set;
addr += (nr >> SHIFT_PER_LONG);
_atomic_spin_lock_irqsave(addr, flags);
- oldbit = *addr;
- *addr = oldbit | mask;
+ old = *addr;
+ set = (old & mask) ? 1 : 0;
+ if (!set)
+ *addr = old | mask;
_atomic_spin_unlock_irqrestore(addr, flags);
- return (oldbit & mask) ? 1 : 0;
+ return set;
}
static __inline__ int test_and_clear_bit(int nr, volatile unsigned long * addr)
{
unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr);
- unsigned long oldbit;
+ unsigned long old;
unsigned long flags;
+ int set;
addr += (nr >> SHIFT_PER_LONG);
_atomic_spin_lock_irqsave(addr, flags);
- oldbit = *addr;
- *addr = oldbit & ~mask;
+ old = *addr;
+ set = (old & mask) ? 1 : 0;
+ if (set)
+ *addr = old & ~mask;
_atomic_spin_unlock_irqrestore(addr, flags);
- return (oldbit & mask) ? 1 : 0;
+ return set;
}
static __inline__ int test_and_change_bit(int nr, volatile unsigned long * addr)
@@ -130,7 +136,7 @@ static __inline__ unsigned long __ffs(unsigned long x)
unsigned long ret;
__asm__(
-#ifdef __LP64__
+#ifdef CONFIG_64BIT
" ldi 63,%1\n"
" extrd,u,*<> %0,63,32,%%r0\n"
" extrd,u,*TR %0,31,32,%0\n" /* move top 32-bits down */
diff --git a/include/asm-parisc/bug.h b/include/asm-parisc/bug.h
index 695588da41f..83ba510ed5d 100644
--- a/include/asm-parisc/bug.h
+++ b/include/asm-parisc/bug.h
@@ -1,14 +1,92 @@
#ifndef _PARISC_BUG_H
#define _PARISC_BUG_H
+/*
+ * Tell the user there is some problem.
+ * The offending file and line are encoded in the __bug_table section.
+ */
+
#ifdef CONFIG_BUG
#define HAVE_ARCH_BUG
-#define BUG() do { \
- printk("kernel BUG at %s:%d!\n", __FILE__, __LINE__); \
- dump_stack(); \
- panic("BUG!"); \
-} while (0)
+#define HAVE_ARCH_WARN_ON
+
+/* the break instruction is used as BUG() marker. */
+#define PARISC_BUG_BREAK_ASM "break 0x1f, 0x1fff"
+#define PARISC_BUG_BREAK_INSN 0x03ffe01f /* PARISC_BUG_BREAK_ASM */
+
+#if defined(CONFIG_64BIT)
+#define ASM_WORD_INSN ".dword\t"
+#else
+#define ASM_WORD_INSN ".word\t"
+#endif
+
+#ifdef CONFIG_DEBUG_BUGVERBOSE
+#define BUG() \
+ do { \
+ asm volatile("\n" \
+ "1:\t" PARISC_BUG_BREAK_ASM "\n" \
+ "\t.pushsection __bug_table,\"a\"\n" \
+ "2:\t" ASM_WORD_INSN "1b, %c0\n" \
+ "\t.short %c1, %c2\n" \
+ "\t.org 2b+%c3\n" \
+ "\t.popsection" \
+ : : "i" (__FILE__), "i" (__LINE__), \
+ "i" (0), "i" (sizeof(struct bug_entry)) ); \
+ for(;;) ; \
+ } while(0)
+
+#else
+#define BUG() \
+ do { \
+ asm volatile(PARISC_BUG_BREAK_ASM : : ); \
+ for(;;) ; \
+ } while(0)
+#endif
+
+#ifdef CONFIG_DEBUG_BUGVERBOSE
+#define __WARN() \
+ do { \
+ asm volatile("\n" \
+ "1:\t" PARISC_BUG_BREAK_ASM "\n" \
+ "\t.pushsection __bug_table,\"a\"\n" \
+ "2:\t" ASM_WORD_INSN "1b, %c0\n" \
+ "\t.short %c1, %c2\n" \
+ "\t.org 2b+%c3\n" \
+ "\t.popsection" \
+ : : "i" (__FILE__), "i" (__LINE__), \
+ "i" (BUGFLAG_WARNING), \
+ "i" (sizeof(struct bug_entry)) ); \
+ } while(0)
+#else
+#define __WARN() \
+ do { \
+ asm volatile("\n" \
+ "1:\t" PARISC_BUG_BREAK_ASM "\n" \
+ "\t.pushsection __bug_table,\"a\"\n" \
+ "2:\t" ASM_WORD_INSN "1b\n" \
+ "\t.short %c0\n" \
+ "\t.org 2b+%c1\n" \
+ "\t.popsection" \
+ : : "i" (BUGFLAG_WARNING), \
+ "i" (sizeof(struct bug_entry)) ); \
+ } while(0)
+#endif
+
+
+#define WARN_ON(x) ({ \
+ typeof(x) __ret_warn_on = (x); \
+ if (__builtin_constant_p(__ret_warn_on)) { \
+ if (__ret_warn_on) \
+ __WARN(); \
+ } else { \
+ if (unlikely(__ret_warn_on)) \
+ __WARN(); \
+ } \
+ unlikely(__ret_warn_on); \
+})
+
#endif
#include <asm-generic/bug.h>
#endif
+
diff --git a/include/asm-parisc/cache.h b/include/asm-parisc/cache.h
index 7d22fa206fc..32c2cca7434 100644
--- a/include/asm-parisc/cache.h
+++ b/include/asm-parisc/cache.h
@@ -30,31 +30,11 @@
#define __read_mostly __attribute__((__section__(".data.read_mostly")))
-extern void flush_data_cache_local(void *); /* flushes local data-cache only */
-extern void flush_instruction_cache_local(void *); /* flushes local code-cache only */
-#ifdef CONFIG_SMP
-extern void flush_data_cache(void); /* flushes data-cache only (all processors) */
-extern void flush_instruction_cache(void); /* flushes i-cache only (all processors) */
-#else
-#define flush_data_cache() flush_data_cache_local(NULL)
-#define flush_instruction_cache() flush_instruction_cache_local(NULL)
-#endif
-
-extern void parisc_cache_init(void); /* initializes cache-flushing */
-extern void flush_all_caches(void); /* flush everything (tlb & cache) */
-extern int get_cache_info(char *);
-extern void flush_user_icache_range_asm(unsigned long, unsigned long);
-extern void flush_kernel_icache_range_asm(unsigned long, unsigned long);
-extern void flush_user_dcache_range_asm(unsigned long, unsigned long);
-extern void flush_kernel_dcache_range_asm(unsigned long, unsigned long);
-extern void flush_kernel_dcache_page_asm(void *);
-extern void flush_kernel_icache_page(void *);
-extern void disable_sr_hashing(void); /* turns off space register hashing */
-extern void disable_sr_hashing_asm(int); /* low level support for above */
-extern void free_sid(unsigned long);
+void parisc_cache_init(void); /* initializes cache-flushing */
+void disable_sr_hashing_asm(int); /* low level support for above */
+void disable_sr_hashing(void); /* turns off space register hashing */
+void free_sid(unsigned long);
unsigned long alloc_sid(void);
-extern void flush_user_dcache_page(unsigned long);
-extern void flush_user_icache_page(unsigned long);
struct seq_file;
extern void show_cache_info(struct seq_file *m);
@@ -63,6 +43,7 @@ extern int split_tlb;
extern int dcache_stride;
extern int icache_stride;
extern struct pdc_cache_info cache_info;
+void parisc_setup_cache_timing(void);
#define pdtlb(addr) asm volatile("pdtlb 0(%%sr1,%0)" : : "r" (addr));
#define pitlb(addr) asm volatile("pitlb 0(%%sr1,%0)" : : "r" (addr));
diff --git a/include/asm-parisc/cacheflush.h b/include/asm-parisc/cacheflush.h
index a799dd8ef39..2f1e1b05440 100644
--- a/include/asm-parisc/cacheflush.h
+++ b/include/asm-parisc/cacheflush.h
@@ -2,60 +2,46 @@
#define _PARISC_CACHEFLUSH_H
#include <linux/mm.h>
-#include <asm/cache.h> /* for flush_user_dcache_range_asm() proto */
/* The usual comment is "Caches aren't brain-dead on the <architecture>".
* Unfortunately, that doesn't apply to PA-RISC. */
-/* Cache flush operations */
-
+/* Internal implementation */
+void flush_data_cache_local(void *); /* flushes local data-cache only */
+void flush_instruction_cache_local(void *); /* flushes local code-cache only */
#ifdef CONFIG_SMP
-#define flush_cache_mm(mm) flush_cache_all()
+void flush_data_cache(void); /* flushes data-cache only (all processors) */
+void flush_instruction_cache(void); /* flushes i-cache only (all processors) */
#else
-#define flush_cache_mm(mm) flush_cache_all_local()
+#define flush_data_cache() flush_data_cache_local(NULL)
+#define flush_instruction_cache() flush_instruction_cache_local(NULL)
#endif
#define flush_cache_dup_mm(mm) flush_cache_mm(mm)
-#define flush_kernel_dcache_range(start,size) \
- flush_kernel_dcache_range_asm((start), (start)+(size));
+void flush_user_icache_range_asm(unsigned long, unsigned long);
+void flush_kernel_icache_range_asm(unsigned long, unsigned long);
+void flush_user_dcache_range_asm(unsigned long, unsigned long);
+void flush_kernel_dcache_range_asm(unsigned long, unsigned long);
+void flush_kernel_dcache_page_asm(void *);
+void flush_kernel_icache_page(void *);
+void flush_user_dcache_page(unsigned long);
+void flush_user_icache_page(unsigned long);
+void flush_user_dcache_range(unsigned long, unsigned long);
+void flush_user_icache_range(unsigned long, unsigned long);
-extern void flush_cache_all_local(void);
+/* Cache flush operations */
-static inline void cacheflush_h_tmp_function(void *dummy)
-{
- flush_cache_all_local();
-}
+void flush_cache_all_local(void);
+void flush_cache_all(void);
+void flush_cache_mm(struct mm_struct *mm);
-static inline void flush_cache_all(void)
-{
- on_each_cpu(cacheflush_h_tmp_function, NULL, 1, 1);
-}
+#define flush_kernel_dcache_range(start,size) \
+ flush_kernel_dcache_range_asm((start), (start)+(size));
#define flush_cache_vmap(start, end) flush_cache_all()
#define flush_cache_vunmap(start, end) flush_cache_all()
-extern int parisc_cache_flush_threshold;
-void parisc_setup_cache_timing(void);
-
-static inline void
-flush_user_dcache_range(unsigned long start, unsigned long end)
-{
- if ((end - start) < parisc_cache_flush_threshold)
- flush_user_dcache_range_asm(start,end);
- else
- flush_data_cache();
-}
-
-static inline void
-flush_user_icache_range(unsigned long start, unsigned long end)
-{
- if ((end - start) < parisc_cache_flush_threshold)
- flush_user_icache_range_asm(start,end);
- else
- flush_instruction_cache();
-}
-
extern void flush_dcache_page(struct page *page);
#define flush_dcache_mmap_lock(mapping) \
@@ -63,9 +49,15 @@ extern void flush_dcache_page(struct page *page);
#define flush_dcache_mmap_unlock(mapping) \
write_unlock_irq(&(mapping)->tree_lock)
-#define flush_icache_page(vma,page) do { flush_kernel_dcache_page(page); flush_kernel_icache_page(page_address(page)); } while (0)
+#define flush_icache_page(vma,page) do { \
+ flush_kernel_dcache_page(page); \
+ flush_kernel_icache_page(page_address(page)); \
+} while (0)
-#define flush_icache_range(s,e) do { flush_kernel_dcache_range_asm(s,e); flush_kernel_icache_range_asm(s,e); } while (0)
+#define flush_icache_range(s,e) do { \
+ flush_kernel_dcache_range_asm(s,e); \
+ flush_kernel_icache_range_asm(s,e); \
+} while (0)
#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
do { \
@@ -80,118 +72,17 @@ do { \
memcpy(dst, src, len); \
} while (0)
-static inline void flush_cache_range(struct vm_area_struct *vma,
- unsigned long start, unsigned long end)
-{
- int sr3;
-
- if (!vma->vm_mm->context) {
- BUG();
- return;
- }
-
- sr3 = mfsp(3);
- if (vma->vm_mm->context == sr3) {
- flush_user_dcache_range(start,end);
- flush_user_icache_range(start,end);
- } else {
- flush_cache_all();
- }
-}
-
-/* Simple function to work out if we have an existing address translation
- * for a user space vma. */
-static inline int translation_exists(struct vm_area_struct *vma,
- unsigned long addr, unsigned long pfn)
-{
- pgd_t *pgd = pgd_offset(vma->vm_mm, addr);
- pmd_t *pmd;
- pte_t pte;
-
- if(pgd_none(*pgd))
- return 0;
-
- pmd = pmd_offset(pgd, addr);
- if(pmd_none(*pmd) || pmd_bad(*pmd))
- return 0;
-
- /* We cannot take the pte lock here: flush_cache_page is usually
- * called with pte lock already held. Whereas flush_dcache_page
- * takes flush_dcache_mmap_lock, which is lower in the hierarchy:
- * the vma itself is secure, but the pte might come or go racily.
- */
- pte = *pte_offset_map(pmd, addr);
- /* But pte_unmap() does nothing on this architecture */
-
- /* Filter out coincidental file entries and swap entries */
- if (!(pte_val(pte) & (_PAGE_FLUSH|_PAGE_PRESENT)))
- return 0;
-
- return pte_pfn(pte) == pfn;
-}
-
-/* Private function to flush a page from the cache of a non-current
- * process. cr25 contains the Page Directory of the current user
- * process; we're going to hijack both it and the user space %sr3 to
- * temporarily make the non-current process current. We have to do
- * this because cache flushing may cause a non-access tlb miss which
- * the handlers have to fill in from the pgd of the non-current
- * process. */
-static inline void
-flush_user_cache_page_non_current(struct vm_area_struct *vma,
- unsigned long vmaddr)
-{
- /* save the current process space and pgd */
- unsigned long space = mfsp(3), pgd = mfctl(25);
-
- /* we don't mind taking interrups since they may not
- * do anything with user space, but we can't
- * be preempted here */
- preempt_disable();
-
- /* make us current */
- mtctl(__pa(vma->vm_mm->pgd), 25);
- mtsp(vma->vm_mm->context, 3);
-
- flush_user_dcache_page(vmaddr);
- if(vma->vm_flags & VM_EXEC)
- flush_user_icache_page(vmaddr);
-
- /* put the old current process back */
- mtsp(space, 3);
- mtctl(pgd, 25);
- preempt_enable();
-}
-
-static inline void
-__flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr)
-{
- if (likely(vma->vm_mm->context == mfsp(3))) {
- flush_user_dcache_page(vmaddr);
- if (vma->vm_flags & VM_EXEC)
- flush_user_icache_page(vmaddr);
- } else {
- flush_user_cache_page_non_current(vma, vmaddr);
- }
-}
-
-static inline void
-flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned long pfn)
-{
- BUG_ON(!vma->vm_mm->context);
-
- if (likely(translation_exists(vma, vmaddr, pfn)))
- __flush_cache_page(vma, vmaddr);
-
-}
+void flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned long pfn);
+void flush_cache_range(struct vm_area_struct *vma,
+ unsigned long start, unsigned long end);
+#define ARCH_HAS_FLUSH_ANON_PAGE
static inline void
flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vmaddr)
{
if (PageAnon(page))
flush_user_dcache_page(vmaddr);
}
-#define ARCH_HAS_FLUSH_ANON_PAGE
#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE
void flush_kernel_dcache_page_addr(void *addr);
diff --git a/include/asm-parisc/dma-mapping.h b/include/asm-parisc/dma-mapping.h
index 66f0b408c66..c6c0e9ff6bd 100644
--- a/include/asm-parisc/dma-mapping.h
+++ b/include/asm-parisc/dma-mapping.h
@@ -236,7 +236,7 @@ int ccio_allocate_resource(const struct parisc_device *dev,
unsigned long min, unsigned long max, unsigned long align);
#else /* !CONFIG_IOMMU_CCIO */
#define ccio_get_iommu(dev) NULL
-#define ccio_request_resource(dev, res) request_resource(&iomem_resource, res)
+#define ccio_request_resource(dev, res) insert_resource(&iomem_resource, res)
#define ccio_allocate_resource(dev, res, size, min, max, align) \
allocate_resource(&iomem_resource, res, size, min, max, \
align, NULL, NULL)
diff --git a/include/asm-parisc/elf.h b/include/asm-parisc/elf.h
index adea65fc43c..f628ac7de83 100644
--- a/include/asm-parisc/elf.h
+++ b/include/asm-parisc/elf.h
@@ -220,7 +220,7 @@ typedef struct elf64_fdesc {
* macros, and then it includes fs/binfmt_elf.c to provide an alternate
* elf binary handler for 32 bit binaries (on the 64 bit kernel).
*/
-#ifdef __LP64__
+#ifdef CONFIG_64BIT
#define ELF_CLASS ELFCLASS64
#else
#define ELF_CLASS ELFCLASS32
diff --git a/include/asm-parisc/hardware.h b/include/asm-parisc/hardware.h
index 106d3f7cd88..76d880dc4ba 100644
--- a/include/asm-parisc/hardware.h
+++ b/include/asm-parisc/hardware.h
@@ -1,19 +1,13 @@
#ifndef _PARISC_HARDWARE_H
#define _PARISC_HARDWARE_H
+#include <linux/mod_devicetable.h>
#include <asm/pdc.h>
-struct parisc_device_id {
- unsigned char hw_type; /* 5 bits used */
- unsigned char hversion_rev; /* 4 bits */
- unsigned short hversion; /* 12 bits */
- unsigned int sversion; /* 20 bits */
-};
-
-#define HWTYPE_ANY_ID 0xff
-#define HVERSION_REV_ANY_ID 0xff
-#define HVERSION_ANY_ID 0xffff
-#define SVERSION_ANY_ID 0xffffffffU
+#define HWTYPE_ANY_ID PA_HWTYPE_ANY_ID
+#define HVERSION_ANY_ID PA_HVERSION_ANY_ID
+#define HVERSION_REV_ANY_ID PA_HVERSION_REV_ANY_ID
+#define SVERSION_ANY_ID PA_SVERSION_ANY_ID
struct hp_hardware {
unsigned short hw_type:5; /* HPHW_xxx */
diff --git a/include/asm-parisc/io.h b/include/asm-parisc/io.h
index ca46e7cc094..c0fed91da3a 100644
--- a/include/asm-parisc/io.h
+++ b/include/asm-parisc/io.h
@@ -67,7 +67,7 @@ static inline unsigned long long gsc_readq(unsigned long addr)
{
unsigned long long ret;
-#ifdef __LP64__
+#ifdef CONFIG_64BIT
__asm__ __volatile__(
" ldda 0(%1),%0\n"
: "=r" (ret) : "r" (addr) );
@@ -108,7 +108,7 @@ static inline void gsc_writel(unsigned int val, unsigned long addr)
static inline void gsc_writeq(unsigned long long val, unsigned long addr)
{
-#ifdef __LP64__
+#ifdef CONFIG_64BIT
__asm__ __volatile__(
" stda %0,0(%1)\n"
: : "r" (val), "r" (addr) );
diff --git a/include/asm-parisc/led.h b/include/asm-parisc/led.h
index efadfd543ec..c3405ab9d60 100644
--- a/include/asm-parisc/led.h
+++ b/include/asm-parisc/led.h
@@ -31,7 +31,7 @@ void __init register_led_regions(void);
#ifdef CONFIG_CHASSIS_LCD_LED
/* writes a string to the LCD display (if possible on this h/w) */
-int lcd_print(char *str);
+int lcd_print(const char *str);
#else
#define lcd_print(str)
#endif
diff --git a/include/asm-parisc/linkage.h b/include/asm-parisc/linkage.h
index 291c2d01c44..7a09d911b53 100644
--- a/include/asm-parisc/linkage.h
+++ b/include/asm-parisc/linkage.h
@@ -1,6 +1,28 @@
-#ifndef __ASM_LINKAGE_H
-#define __ASM_LINKAGE_H
+#ifndef __ASM_PARISC_LINKAGE_H
+#define __ASM_PARISC_LINKAGE_H
-/* Nothing to see here... */
+#ifndef __ALIGN
+#define __ALIGN .align 4
+#define __ALIGN_STR ".align 4"
+#endif
+
+/*
+ * In parisc assembly a semicolon marks a comment while a
+ * exclamation mark is used to seperate independend lines.
+ */
+#define ENTRY(name) \
+ .export name !\
+ ALIGN !\
+name:
+#ifdef CONFIG_64BIT
+#define ENDPROC(name) \
+ END(name)
+#else
+#define ENDPROC(name) \
+ .type name, @function !\
+ END(name)
#endif
+
+
+#endif /* __ASM_PARISC_LINKAGE_H */
diff --git a/include/asm-parisc/mmzone.h b/include/asm-parisc/mmzone.h
index c87813662d4..9608d2cf214 100644
--- a/include/asm-parisc/mmzone.h
+++ b/include/asm-parisc/mmzone.h
@@ -35,7 +35,7 @@ extern struct node_map_data node_data[];
#define PFNNID_MAP_MAX 512 /* support 512GB */
extern unsigned char pfnnid_map[PFNNID_MAP_MAX];
-#ifndef __LP64__
+#ifndef CONFIG_64BIT
#define pfn_is_io(pfn) ((pfn & (0xf0000000UL >> PAGE_SHIFT)) == (0xf0000000UL >> PAGE_SHIFT))
#else
/* io can be 0xf0f0f0f0f0xxxxxx or 0xfffffffff0000000 */
diff --git a/include/asm-parisc/module.h b/include/asm-parisc/module.h
index 00f06885f84..c2cb49e934c 100644
--- a/include/asm-parisc/module.h
+++ b/include/asm-parisc/module.h
@@ -3,7 +3,7 @@
/*
* This file contains the parisc architecture specific module code.
*/
-#ifdef __LP64__
+#ifdef CONFIG_64BIT
#define Elf_Shdr Elf64_Shdr
#define Elf_Sym Elf64_Sym
#define Elf_Ehdr Elf64_Ehdr
diff --git a/include/asm-parisc/msgbuf.h b/include/asm-parisc/msgbuf.h
index 14ffc2782f1..fe88f264941 100644
--- a/include/asm-parisc/msgbuf.h
+++ b/include/asm-parisc/msgbuf.h
@@ -13,15 +13,15 @@
struct msqid64_ds {
struct ipc64_perm msg_perm;
-#ifndef __LP64__
+#ifndef CONFIG_64BIT
unsigned int __pad1;
#endif
__kernel_time_t msg_stime; /* last msgsnd time */
-#ifndef __LP64__
+#ifndef CONFIG_64BIT
unsigned int __pad2;
#endif
__kernel_time_t msg_rtime; /* last msgrcv time */
-#ifndef __LP64__
+#ifndef CONFIG_64BIT
unsigned int __pad3;
#endif
__kernel_time_t msg_ctime; /* last change time */
diff --git a/include/asm-parisc/page.h b/include/asm-parisc/page.h
index 3567208191e..f6bba4c1366 100644
--- a/include/asm-parisc/page.h
+++ b/include/asm-parisc/page.h
@@ -105,7 +105,7 @@ extern int npmem_ranges;
/* WARNING: The definitions below must match exactly to sizeof(pte_t)
* etc
*/
-#ifdef __LP64__
+#ifdef CONFIG_64BIT
#define BITS_PER_PTE_ENTRY 3
#define BITS_PER_PMD_ENTRY 2
#define BITS_PER_PGD_ENTRY 2
@@ -127,7 +127,11 @@ extern int npmem_ranges;
/* This governs the relationship between virtual and physical addresses.
* If you alter it, make sure to take care of our various fixed mapping
* segments in fixmap.h */
-#define __PAGE_OFFSET (0x10000000)
+#ifdef CONFIG_64BIT
+#define __PAGE_OFFSET (0x40000000) /* 1GB */
+#else
+#define __PAGE_OFFSET (0x10000000) /* 256MB */
+#endif
#define PAGE_OFFSET ((unsigned long)__PAGE_OFFSET)
diff --git a/include/asm-parisc/parisc-device.h b/include/asm-parisc/parisc-device.h
index e12624d8941..7aa13f2add7 100644
--- a/include/asm-parisc/parisc-device.h
+++ b/include/asm-parisc/parisc-device.h
@@ -15,7 +15,7 @@ struct parisc_device {
unsigned int num_addrs; /* some devices have additional address ranges. */
unsigned long *addr; /* which will be stored here */
-#ifdef __LP64__
+#ifdef CONFIG_64BIT
/* parms for pdc_pat_cell_module() call */
unsigned long pcell_loc; /* Physical Cell location */
unsigned long mod_index; /* PAT specific - Misc Module info */
diff --git a/include/asm-parisc/pdc.h b/include/asm-parisc/pdc.h
index 423c2b84b4a..876fd8116d4 100644
--- a/include/asm-parisc/pdc.h
+++ b/include/asm-parisc/pdc.h
@@ -341,7 +341,7 @@ struct pdc_model { /* for PDC_MODEL */
struct pdc_cache_cf { /* for PDC_CACHE (I/D-caches) */
unsigned long
-#ifdef __LP64__
+#ifdef CONFIG_64BIT
cc_padW:32,
#endif
cc_alias: 4, /* alias boundaries for virtual addresses */
@@ -357,7 +357,7 @@ struct pdc_cache_cf { /* for PDC_CACHE (I/D-caches) */
struct pdc_tlb_cf { /* for PDC_CACHE (I/D-TLB's) */
unsigned long tc_pad0:12, /* reserved */
-#ifdef __LP64__
+#ifdef CONFIG_64BIT
tc_padW:32,
#endif
tc_sh : 2, /* 0 = separate I/D-TLB, else shared I/D-TLB */
@@ -445,7 +445,7 @@ struct pdc_btlb_info { /* PDC_BLOCK_TLB, return of PDC_BTLB_INFO */
#endif /* !CONFIG_PA20 */
-#ifdef __LP64__
+#ifdef CONFIG_64BIT
struct pdc_memory_table_raddr { /* PDC_MEM/PDC_MEM_TABLE (return info) */
unsigned long entries_returned;
unsigned long entries_total;
@@ -456,7 +456,7 @@ struct pdc_memory_table { /* PDC_MEM/PDC_MEM_TABLE (arguments) */
unsigned int pages;
unsigned int reserved;
};
-#endif /* __LP64__ */
+#endif /* CONFIG_64BIT */
struct pdc_system_map_mod_info { /* PDC_SYSTEM_MAP/FIND_MODULE */
unsigned long mod_addr;
@@ -752,7 +752,7 @@ int pdc_get_initiator(struct hardware_path *, struct pdc_initiator *);
int pdc_tod_read(struct pdc_tod *tod);
int pdc_tod_set(unsigned long sec, unsigned long usec);
-#ifdef __LP64__
+#ifdef CONFIG_64BIT
int pdc_mem_mem_table(struct pdc_memory_table_raddr *r_addr,
struct pdc_memory_table *tbl, unsigned long entries);
#endif
diff --git a/include/asm-parisc/pdcpat.h b/include/asm-parisc/pdcpat.h
index b4b34c0e8c1..47539f11795 100644
--- a/include/asm-parisc/pdcpat.h
+++ b/include/asm-parisc/pdcpat.h
@@ -250,7 +250,7 @@ struct pdc_pat_pd_addr_map_entry {
#define PAT_GET_ENTITY(value) (((value) >> 56) & 0xffUL)
#define PAT_GET_DVI(value) (((value) >> 48) & 0xffUL)
#define PAT_GET_IOC(value) (((value) >> 40) & 0xffUL)
-#define PAT_GET_MOD_PAGES(value)(((value) & 0xffffffUL)
+#define PAT_GET_MOD_PAGES(value) ((value) & 0xffffffUL)
/*
@@ -303,35 +303,6 @@ extern int pdc_pat_io_pci_cfg_write(unsigned long pci_addr, int pci_size, u32 va
*/
extern int pdc_pat; /* arch/parisc/kernel/inventory.c */
-/********************************************************************
-* PDC_PAT_CELL[Return Cell Module] memaddr[0] conf_base_addr
-* ----------------------------------------------------------
-* Bit 0 to 51 - conf_base_addr
-* Bit 52 to 62 - reserved
-* Bit 63 - endianess bit
-********************************************************************/
-#define PAT_GET_CBA(value) ((value) & 0xfffffffffffff000UL)
-
-/********************************************************************
-* PDC_PAT_CELL[Return Cell Module] memaddr[1] mod_info
-* ----------------------------------------------------
-* Bit 0 to 7 - entity type
-* 0 = central agent, 1 = processor,
-* 2 = memory controller, 3 = system bus adapter,
-* 4 = local bus adapter, 5 = processor bus converter,
-* 6 = crossbar fabric connect, 7 = fabric interconnect,
-* 8 to 254 reserved, 255 = unknown.
-* Bit 8 to 15 - DVI
-* Bit 16 to 23 - IOC functions
-* Bit 24 to 39 - reserved
-* Bit 40 to 63 - mod_pages
-* number of 4K pages a module occupies starting at conf_base_addr
-********************************************************************/
-#define PAT_GET_ENTITY(value) (((value) >> 56) & 0xffUL)
-#define PAT_GET_DVI(value) (((value) >> 48) & 0xffUL)
-#define PAT_GET_IOC(value) (((value) >> 40) & 0xffUL)
-#define PAT_GET_MOD_PAGES(value)(((value) & 0xffffffUL)
-
#endif /* __ASSEMBLY__ */
#endif /* ! __PARISC_PATPDC_H */
diff --git a/include/asm-parisc/pgalloc.h b/include/asm-parisc/pgalloc.h
index 3122fad38a1..1af1a41e072 100644
--- a/include/asm-parisc/pgalloc.h
+++ b/include/asm-parisc/pgalloc.h
@@ -14,7 +14,7 @@
* Here (for 64 bit kernels) we implement a Hybrid L2/L3 scheme: we
* allocate the first pmd adjacent to the pgd. This means that we can
* subtract a constant offset to get to it. The pmd and pgd sizes are
- * arranged so that a single pmd covers 4GB (giving a full LP64
+ * arranged so that a single pmd covers 4GB (giving a full 64-bit
* process access to 8TB) so our lookups are effectively L2 for the
* first 4GB of the kernel (i.e. for all ILP32 processes and all the
* kernel for machines with under 4GB of memory) */
@@ -26,7 +26,7 @@ static inline pgd_t *pgd_alloc(struct mm_struct *mm)
if (likely(pgd != NULL)) {
memset(pgd, 0, PAGE_SIZE<<PGD_ALLOC_ORDER);
-#ifdef __LP64__
+#ifdef CONFIG_64BIT
actual_pgd += PTRS_PER_PGD;
/* Populate first pmd with allocated memory. We mark it
* with PxD_FLAG_ATTACHED as a signal to the system that this
@@ -45,7 +45,7 @@ static inline pgd_t *pgd_alloc(struct mm_struct *mm)
static inline void pgd_free(pgd_t *pgd)
{
-#ifdef __LP64__
+#ifdef CONFIG_64BIT
pgd -= PTRS_PER_PGD;
#endif
free_pages((unsigned long)pgd, PGD_ALLOC_ORDER);
@@ -72,7 +72,7 @@ static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address)
static inline void pmd_free(pmd_t *pmd)
{
-#ifdef __LP64__
+#ifdef CONFIG_64BIT
if(pmd_flag(*pmd) & PxD_FLAG_ATTACHED)
/* This is the permanent pmd attached to the pgd;
* cannot free it */
@@ -99,7 +99,7 @@ static inline void pmd_free(pmd_t *pmd)
static inline void
pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd, pte_t *pte)
{
-#ifdef __LP64__
+#ifdef CONFIG_64BIT
/* preserve the gateway marker if this is the beginning of
* the permanent pmd */
if(pmd_flag(*pmd) & PxD_FLAG_ATTACHED)
diff --git a/include/asm-parisc/pgtable.h b/include/asm-parisc/pgtable.h
index c0b61e0d149..d7e1b10da5c 100644
--- a/include/asm-parisc/pgtable.h
+++ b/include/asm-parisc/pgtable.h
@@ -10,7 +10,6 @@
* we simulate an x86-style page table for the linux mm code
*/
-#include <linux/spinlock.h>
#include <linux/mm.h> /* for vm_area_struct */
#include <asm/processor.h>
#include <asm/cache.h>
diff --git a/include/asm-parisc/posix_types.h b/include/asm-parisc/posix_types.h
index 9b19970de61..b634e3c47fd 100644
--- a/include/asm-parisc/posix_types.h
+++ b/include/asm-parisc/posix_types.h
@@ -20,7 +20,7 @@ typedef int __kernel_timer_t;
typedef int __kernel_clockid_t;
typedef int __kernel_daddr_t;
/* Note these change from narrow to wide kernels */
-#ifdef __LP64__
+#ifdef CONFIG_64BIT
typedef unsigned long __kernel_size_t;
typedef long __kernel_ssize_t;
typedef long __kernel_ptrdiff_t;
diff --git a/include/asm-parisc/processor.h b/include/asm-parisc/processor.h
index fd7866dc8c8..d2f396721d3 100644
--- a/include/asm-parisc/processor.h
+++ b/include/asm-parisc/processor.h
@@ -9,13 +9,10 @@
#define __ASM_PARISC_PROCESSOR_H
#ifndef __ASSEMBLY__
-#include <asm/prefetch.h> /* lockdep.h needs <linux/prefetch.h> */
-
#include <linux/threads.h>
-#include <linux/spinlock_types.h>
+#include <asm/prefetch.h>
#include <asm/hardware.h>
-#include <asm/page.h>
#include <asm/pdc.h>
#include <asm/ptrace.h>
#include <asm/types.h>
@@ -41,7 +38,7 @@
#define DEFAULT_TASK_SIZE32 (0xFFF00000UL)
#define DEFAULT_MAP_BASE32 (0x40000000UL)
-#ifdef __LP64__
+#ifdef CONFIG_64BIT
#define DEFAULT_TASK_SIZE (MAX_ADDRESS-0xf000000)
#define DEFAULT_MAP_BASE (0x200000000UL)
#else
@@ -87,7 +84,6 @@ struct cpuinfo_parisc {
unsigned long hpa; /* Host Physical address */
unsigned long txn_addr; /* MMIO addr of EIR or id_eid */
#ifdef CONFIG_SMP
- spinlock_t lock; /* synchronization for ipi's */
unsigned long pending_ipi; /* bitmap of type ipi_message_type */
unsigned long ipi_count; /* number ipi Interrupts */
#endif
@@ -277,7 +273,7 @@ on downward growing arches, it looks like this:
* it in here from the current->personality
*/
-#ifdef __LP64__
+#ifdef CONFIG_64BIT
#define USER_WIDE_MODE (!test_thread_flag(TIF_32BIT))
#else
#define USER_WIDE_MODE 0
diff --git a/include/asm-parisc/sembuf.h b/include/asm-parisc/sembuf.h
index 1083368ef8d..1e59ffd3bd1 100644
--- a/include/asm-parisc/sembuf.h
+++ b/include/asm-parisc/sembuf.h
@@ -13,11 +13,11 @@
struct semid64_ds {
struct ipc64_perm sem_perm; /* permissions .. see ipc.h */
-#ifndef __LP64__
+#ifndef CONFIG_64BIT
unsigned int __pad1;
#endif
__kernel_time_t sem_otime; /* last semop time */
-#ifndef __LP64__
+#ifndef CONFIG_64BIT
unsigned int __pad2;
#endif
__kernel_time_t sem_ctime; /* last change time */
diff --git a/include/asm-parisc/shmbuf.h b/include/asm-parisc/shmbuf.h
index 623b6c0c49e..0a3eada1863 100644
--- a/include/asm-parisc/shmbuf.h
+++ b/include/asm-parisc/shmbuf.h
@@ -13,19 +13,19 @@
struct shmid64_ds {
struct ipc64_perm shm_perm; /* operation perms */
-#ifndef __LP64__
+#ifndef CONFIG_64BIT
unsigned int __pad1;
#endif
__kernel_time_t shm_atime; /* last attach time */
-#ifndef __LP64__
+#ifndef CONFIG_64BIT
unsigned int __pad2;
#endif
__kernel_time_t shm_dtime; /* last detach time */
-#ifndef __LP64__
+#ifndef CONFIG_64BIT
unsigned int __pad3;
#endif
__kernel_time_t shm_ctime; /* last change time */
-#ifndef __LP64__
+#ifndef CONFIG_64BIT
unsigned int __pad4;
#endif
size_t shm_segsz; /* size of segment (bytes) */
@@ -36,7 +36,7 @@ struct shmid64_ds {
unsigned int __unused2;
};
-#ifdef __LP64__
+#ifdef CONFIG_64BIT
/* The 'unsigned int' (formerly 'unsigned long') data types below will
* ensure that a 32-bit app calling shmctl(*,IPC_INFO,*) will work on
* a wide kernel, but if some of these values are meant to contain pointers
diff --git a/include/asm-parisc/signal.h b/include/asm-parisc/signal.h
index 98a82fa0cfd..c20356375d1 100644
--- a/include/asm-parisc/signal.h
+++ b/include/asm-parisc/signal.h
@@ -105,7 +105,7 @@
struct siginfo;
/* Type of a signal handler. */
-#ifdef __LP64__
+#ifdef CONFIG_64BIT
/* function pointers on 64-bit parisc are pointers to little structs and the
* compiler doesn't support code which changes or tests the address of
* the function in the little struct. This is really ugly -PB
diff --git a/include/asm-parisc/smp.h b/include/asm-parisc/smp.h
index d4c0e26afcd..306f4950e32 100644
--- a/include/asm-parisc/smp.h
+++ b/include/asm-parisc/smp.h
@@ -41,14 +41,6 @@ extern void smp_send_all_nop(void);
#define PROC_CHANGE_PENALTY 15 /* Schedule penalty */
-#undef ENTRY_SYS_CPUS
-#ifdef ENTRY_SYS_CPUS
-#define STATE_RENDEZVOUS 0
-#define STATE_STOPPED 1
-#define STATE_RUNNING 2
-#define STATE_HALTED 3
-#endif
-
extern unsigned long cpu_present_mask;
#define raw_smp_processor_id() (current_thread_info()->cpu)
diff --git a/include/asm-parisc/spinlock_types.h b/include/asm-parisc/spinlock_types.h
index d6b479bdb88..3f72f47cf4b 100644
--- a/include/asm-parisc/spinlock_types.h
+++ b/include/asm-parisc/spinlock_types.h
@@ -1,10 +1,6 @@
#ifndef __ASM_SPINLOCK_TYPES_H
#define __ASM_SPINLOCK_TYPES_H
-#ifndef __LINUX_SPINLOCK_TYPES_H
-# error "please don't include this file directly"
-#endif
-
typedef struct {
#ifdef CONFIG_PA20
volatile unsigned int slock;
diff --git a/include/asm-parisc/statfs.h b/include/asm-parisc/statfs.h
index a52d8f93f05..1d2b8130b23 100644
--- a/include/asm-parisc/statfs.h
+++ b/include/asm-parisc/statfs.h
@@ -30,11 +30,11 @@ struct statfs {
struct statfs64 {
long f_type;
long f_bsize;
- u64 f_blocks;
- u64 f_bfree;
- u64 f_bavail;
- u64 f_files;
- u64 f_ffree;
+ __u64 f_blocks;
+ __u64 f_bfree;
+ __u64 f_bavail;
+ __u64 f_files;
+ __u64 f_ffree;
__kernel_fsid_t f_fsid;
long f_namelen;
long f_frsize;
diff --git a/include/asm-parisc/system.h b/include/asm-parisc/system.h
index 74f037a39e6..7e9afa720d4 100644
--- a/include/asm-parisc/system.h
+++ b/include/asm-parisc/system.h
@@ -34,7 +34,7 @@ struct pa_psw {
unsigned int i:1;
};
-#ifdef __LP64__
+#ifdef CONFIG_64BIT
#define pa_psw(task) ((struct pa_psw *) ((char *) (task) + TASK_PT_PSW + 4))
#else
#define pa_psw(task) ((struct pa_psw *) ((char *) (task) + TASK_PT_PSW))
diff --git a/include/asm-parisc/thread_info.h b/include/asm-parisc/thread_info.h
index f2f83b04cd8..949314cf618 100644
--- a/include/asm-parisc/thread_info.h
+++ b/include/asm-parisc/thread_info.h
@@ -62,6 +62,7 @@ struct thread_info {
#define TIF_POLLING_NRFLAG 4 /* true if poll_idle() is polling TIF_NEED_RESCHED */
#define TIF_32BIT 5 /* 32 bit binary */
#define TIF_MEMDIE 6
+#define TIF_RESTORE_SIGMASK 7 /* restore saved signal mask */
#define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE)
#define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME)
@@ -69,9 +70,10 @@ struct thread_info {
#define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED)
#define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG)
#define _TIF_32BIT (1 << TIF_32BIT)
+#define _TIF_RESTORE_SIGMASK (1 << TIF_RESTORE_SIGMASK)
#define _TIF_USER_WORK_MASK (_TIF_NOTIFY_RESUME | _TIF_SIGPENDING | \
- _TIF_NEED_RESCHED)
+ _TIF_NEED_RESCHED | _TIF_RESTORE_SIGMASK)
#endif /* __KERNEL__ */
diff --git a/include/asm-parisc/tlbflush.h b/include/asm-parisc/tlbflush.h
index f662e837dea..3313da9ea00 100644
--- a/include/asm-parisc/tlbflush.h
+++ b/include/asm-parisc/tlbflush.h
@@ -73,33 +73,11 @@ static inline void flush_tlb_page(struct vm_area_struct *vma,
purge_tlb_end();
}
-static inline void flush_tlb_range(struct vm_area_struct *vma,
- unsigned long start, unsigned long end)
-{
- unsigned long npages;
+void __flush_tlb_range(unsigned long sid,
+ unsigned long start, unsigned long end);
- npages = ((end - (start & PAGE_MASK)) + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
- if (npages >= 512) /* 2MB of space: arbitrary, should be tuned */
- flush_tlb_all();
- else {
- mtsp(vma->vm_mm->context,1);
- purge_tlb_start();
- if (split_tlb) {
- while (npages--) {
- pdtlb(start);
- pitlb(start);
- start += PAGE_SIZE;
- }
- } else {
- while (npages--) {
- pdtlb(start);
- start += PAGE_SIZE;
- }
- }
- purge_tlb_end();
- }
-}
+#define flush_tlb_range(vma,start,end) __flush_tlb_range((vma)->vm_mm->context,start,end)
-#define flush_tlb_kernel_range(start, end) flush_tlb_all()
+#define flush_tlb_kernel_range(start, end) __flush_tlb_range(0,start,end)
#endif
diff --git a/include/asm-parisc/types.h b/include/asm-parisc/types.h
index 34fdce361a5..d4aa33033d9 100644
--- a/include/asm-parisc/types.h
+++ b/include/asm-parisc/types.h
@@ -31,7 +31,7 @@ typedef unsigned long long __u64;
*/
#ifdef __KERNEL__
-#ifdef __LP64__
+#ifdef CONFIG_64BIT
#define BITS_PER_LONG 64
#define SHIFT_PER_LONG 6
#else
diff --git a/include/asm-parisc/uaccess.h b/include/asm-parisc/uaccess.h
index d973e8b3466..4878b9501f2 100644
--- a/include/asm-parisc/uaccess.h
+++ b/include/asm-parisc/uaccess.h
@@ -4,7 +4,6 @@
/*
* User space memory access functions
*/
-#include <linux/sched.h>
#include <asm/page.h>
#include <asm/system.h>
#include <asm/cache.h>
@@ -43,16 +42,18 @@ static inline long access_ok(int type, const void __user * addr,
#define put_user __put_user
#define get_user __get_user
-#if BITS_PER_LONG == 32
+#if !defined(CONFIG_64BIT)
#define LDD_KERNEL(ptr) __get_kernel_bad();
#define LDD_USER(ptr) __get_user_bad();
#define STD_KERNEL(x, ptr) __put_kernel_asm64(x,ptr)
#define STD_USER(x, ptr) __put_user_asm64(x,ptr)
+#define ASM_WORD_INSN ".word\t"
#else
-#define LDD_KERNEL(ptr) __get_kernel_asm("ldd",ptr)
-#define LDD_USER(ptr) __get_user_asm("ldd",ptr)
-#define STD_KERNEL(x, ptr) __put_kernel_asm("std",x,ptr)
-#define STD_USER(x, ptr) __put_user_asm("std",x,ptr)
+#define LDD_KERNEL(ptr) __get_kernel_asm("ldd",ptr)
+#define LDD_USER(ptr) __get_user_asm("ldd",ptr)
+#define STD_KERNEL(x, ptr) __put_kernel_asm("std",x,ptr)
+#define STD_USER(x, ptr) __put_user_asm("std",x,ptr)
+#define ASM_WORD_INSN ".dword\t"
#endif
/*
@@ -66,6 +67,11 @@ struct exception_table_entry {
long fixup; /* fixup routine */
};
+#define ASM_EXCEPTIONTABLE_ENTRY( fault_addr, except_addr )\
+ ".section __ex_table,\"aw\"\n" \
+ ASM_WORD_INSN #fault_addr ", " #except_addr "\n\t" \
+ ".previous\n"
+
/*
* The page fault handler stores, in a per-cpu area, the following information
* if a fixup routine is available.
@@ -104,43 +110,19 @@ struct exception_data {
__gu_err; \
})
-#ifdef __LP64__
-#define __get_kernel_asm(ldx,ptr) \
- __asm__("\n1:\t" ldx "\t0(%2),%0\n" \
- "\t.section __ex_table,\"aw\"\n" \
- "\t.dword\t1b,fixup_get_user_skip_1\n" \
- "\t.previous" \
- : "=r"(__gu_val), "=r"(__gu_err) \
- : "r"(ptr), "1"(__gu_err) \
- : "r1");
-
-#define __get_user_asm(ldx,ptr) \
- __asm__("\n1:\t" ldx "\t0(%%sr3,%2),%0\n" \
- "\t.section __ex_table,\"aw\"\n" \
- "\t.dword\t1b,fixup_get_user_skip_1\n" \
- "\t.previous" \
- : "=r"(__gu_val), "=r"(__gu_err) \
- : "r"(ptr), "1"(__gu_err) \
- : "r1");
-#else
#define __get_kernel_asm(ldx,ptr) \
- __asm__("\n1:\t" ldx "\t0(%2),%0\n" \
- "\t.section __ex_table,\"aw\"\n" \
- "\t.word\t1b,fixup_get_user_skip_1\n" \
- "\t.previous" \
+ __asm__("\n1:\t" ldx "\t0(%2),%0\n\t" \
+ ASM_EXCEPTIONTABLE_ENTRY(1b, fixup_get_user_skip_1)\
: "=r"(__gu_val), "=r"(__gu_err) \
: "r"(ptr), "1"(__gu_err) \
: "r1");
#define __get_user_asm(ldx,ptr) \
- __asm__("\n1:\t" ldx "\t0(%%sr3,%2),%0\n" \
- "\t.section __ex_table,\"aw\"\n" \
- "\t.word\t1b,fixup_get_user_skip_1\n" \
- "\t.previous" \
+ __asm__("\n1:\t" ldx "\t0(%%sr3,%2),%0\n\t" \
+ ASM_EXCEPTIONTABLE_ENTRY(1b,fixup_get_user_skip_1)\
: "=r"(__gu_val), "=r"(__gu_err) \
: "r"(ptr), "1"(__gu_err) \
: "r1");
-#endif /* !__LP64__ */
#define __put_user(x,ptr) \
({ \
@@ -179,80 +161,54 @@ struct exception_data {
* r8/r9 are already listed as err/val.
*/
-#ifdef __LP64__
#define __put_kernel_asm(stx,x,ptr) \
__asm__ __volatile__ ( \
- "\n1:\t" stx "\t%2,0(%1)\n" \
- "\t.section __ex_table,\"aw\"\n" \
- "\t.dword\t1b,fixup_put_user_skip_1\n" \
- "\t.previous" \
+ "\n1:\t" stx "\t%2,0(%1)\n\t" \
+ ASM_EXCEPTIONTABLE_ENTRY(1b,fixup_put_user_skip_1)\
: "=r"(__pu_err) \
: "r"(ptr), "r"(x), "0"(__pu_err) \
: "r1")
#define __put_user_asm(stx,x,ptr) \
__asm__ __volatile__ ( \
- "\n1:\t" stx "\t%2,0(%%sr3,%1)\n" \
- "\t.section __ex_table,\"aw\"\n" \
- "\t.dword\t1b,fixup_put_user_skip_1\n" \
- "\t.previous" \
- : "=r"(__pu_err) \
- : "r"(ptr), "r"(x), "0"(__pu_err) \
- : "r1")
-#else
-#define __put_kernel_asm(stx,x,ptr) \
- __asm__ __volatile__ ( \
- "\n1:\t" stx "\t%2,0(%1)\n" \
- "\t.section __ex_table,\"aw\"\n" \
- "\t.word\t1b,fixup_put_user_skip_1\n" \
- "\t.previous" \
+ "\n1:\t" stx "\t%2,0(%%sr3,%1)\n\t" \
+ ASM_EXCEPTIONTABLE_ENTRY(1b,fixup_put_user_skip_1)\
: "=r"(__pu_err) \
: "r"(ptr), "r"(x), "0"(__pu_err) \
: "r1")
-#define __put_user_asm(stx,x,ptr) \
- __asm__ __volatile__ ( \
- "\n1:\t" stx "\t%2,0(%%sr3,%1)\n" \
- "\t.section __ex_table,\"aw\"\n" \
- "\t.word\t1b,fixup_put_user_skip_1\n" \
- "\t.previous" \
- : "=r"(__pu_err) \
- : "r"(ptr), "r"(x), "0"(__pu_err) \
- : "r1")
-#define __put_kernel_asm64(__val,ptr) do { \
- u64 __val64 = (u64)(__val); \
- u32 hi = (__val64) >> 32; \
- u32 lo = (__val64) & 0xffffffff; \
+#if !defined(CONFIG_64BIT)
+
+#define __put_kernel_asm64(__val,ptr) do { \
+ u64 __val64 = (u64)(__val); \
+ u32 hi = (__val64) >> 32; \
+ u32 lo = (__val64) & 0xffffffff; \
__asm__ __volatile__ ( \
- "\n1:\tstw %2,0(%1)\n" \
- "\n2:\tstw %3,4(%1)\n" \
- "\t.section __ex_table,\"aw\"\n" \
- "\t.word\t1b,fixup_put_user_skip_2\n" \
- "\t.word\t2b,fixup_put_user_skip_1\n" \
- "\t.previous" \
+ "\n1:\tstw %2,0(%1)" \
+ "\n2:\tstw %3,4(%1)\n\t" \
+ ASM_EXCEPTIONTABLE_ENTRY(1b,fixup_put_user_skip_2)\
+ ASM_EXCEPTIONTABLE_ENTRY(2b,fixup_put_user_skip_1)\
: "=r"(__pu_err) \
: "r"(ptr), "r"(hi), "r"(lo), "0"(__pu_err) \
: "r1"); \
} while (0)
-#define __put_user_asm64(__val,ptr) do { \
- u64 __val64 = (u64)__val; \
- u32 hi = (__val64) >> 32; \
- u32 lo = (__val64) & 0xffffffff; \
+#define __put_user_asm64(__val,ptr) do { \
+ u64 __val64 = (u64)(__val); \
+ u32 hi = (__val64) >> 32; \
+ u32 lo = (__val64) & 0xffffffff; \
__asm__ __volatile__ ( \
- "\n1:\tstw %2,0(%%sr3,%1)\n" \
- "\n2:\tstw %3,4(%%sr3,%1)\n" \
- "\t.section __ex_table,\"aw\"\n" \
- "\t.word\t1b,fixup_get_user_skip_2\n" \
- "\t.word\t2b,fixup_get_user_skip_1\n" \
- "\t.previous" \
+ "\n1:\tstw %2,0(%%sr3,%1)" \
+ "\n2:\tstw %3,4(%%sr3,%1)\n\t" \
+ ASM_EXCEPTIONTABLE_ENTRY(1b,fixup_put_user_skip_2)\
+ ASM_EXCEPTIONTABLE_ENTRY(2b,fixup_put_user_skip_1)\
: "=r"(__pu_err) \
: "r"(ptr), "r"(hi), "r"(lo), "0"(__pu_err) \
: "r1"); \
} while (0)
-#endif /* !__LP64__ */
+#endif /* !defined(CONFIG_64BIT) */
/*
diff --git a/include/asm-parisc/unistd.h b/include/asm-parisc/unistd.h
index 53b0f5d290e..2f7c40861c9 100644
--- a/include/asm-parisc/unistd.h
+++ b/include/asm-parisc/unistd.h
@@ -772,7 +772,7 @@
#define __NR_mknodat (__NR_Linux + 277)
#define __NR_fchownat (__NR_Linux + 278)
#define __NR_futimesat (__NR_Linux + 279)
-#define __NR_newfstatat (__NR_Linux + 280)
+#define __NR_fstatat64 (__NR_Linux + 280)
#define __NR_unlinkat (__NR_Linux + 281)
#define __NR_renameat (__NR_Linux + 282)
#define __NR_linkat (__NR_Linux + 283)
@@ -786,8 +786,14 @@
#define __NR_splice (__NR_Linux + 291)
#define __NR_sync_file_range (__NR_Linux + 292)
#define __NR_tee (__NR_Linux + 293)
+#define __NR_vmsplice (__NR_Linux + 294)
+#define __NR_move_pages (__NR_Linux + 295)
+#define __NR_getcpu (__NR_Linux + 296)
+#define __NR_epoll_pwait (__NR_Linux + 297)
+#define __NR_statfs64 (__NR_Linux + 298)
+#define __NR_fstatfs64 (__NR_Linux + 299)
-#define __NR_Linux_syscalls 294
+#define __NR_Linux_syscalls (__NR_fstatfs64 + 1)
#define HPUX_GATEWAY_ADDR 0xC0000004
#define LINUX_GATEWAY_ADDR 0x100
@@ -951,6 +957,8 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) \
#define __ARCH_WANT_SYS_SIGPENDING
#define __ARCH_WANT_SYS_SIGPROCMASK
#define __ARCH_WANT_SYS_RT_SIGACTION
+#define __ARCH_WANT_SYS_RT_SIGSUSPEND
+#define __ARCH_WANT_COMPAT_SYS_RT_SIGSUSPEND
#endif /* __ASSEMBLY__ */