path: root/module/ppu_v1/src/mod_ppu_v1.c

/*
 * Arm SCP/MCP Software
 * Copyright (c) 2015-2019, Arm Limited and Contributors. All rights reserved.
 *
 * SPDX-License-Identifier: BSD-3-Clause
 *
 * Description:
 *     Power State Management PPU v1 driver.
 */

#include <stdbool.h>
#include <fwk_assert.h>
#include <fwk_id.h>
#include <fwk_interrupt.h>
#include <fwk_math.h>
#include <fwk_macros.h>
#include <fwk_mm.h>
#include <fwk_module.h>
#include <fwk_module_idx.h>
#include <fwk_notification.h>
#include <mod_log.h>
#include <mod_power_domain.h>
#include <mod_ppu_v1.h>
#include <ppu_v1.h>
#if BUILD_HAS_MOD_SYSTEM_POWER
#include <mod_system_power.h>
#endif

#define CORE_PER_CLUSTER_COUNT_MAX 8

/*
 * Inequality that must be true for the usage of the bit mask
 * 'pending_on_core_mask' in 'struct cluster_pd_specific_ctx' to work properly.
 */
static_assert(CORE_PER_CLUSTER_COUNT_MAX < (sizeof(uint32_t) * CHAR_BIT),
              "Maximum number of cores per cluster too large.");

/* Cluster power domain specific context */
struct cluster_pd_specific_ctx {
    /*
     * Table of pointers to the contexts of the cores being part of the
     * cluster.
     */
    struct ppu_v1_pd_ctx *core_pd_ctx_table[CORE_PER_CLUSTER_COUNT_MAX];

    /* Number of cores */
    unsigned int core_count;

    /*
     * Mask indicating which cluster's cores must be powered on when the
     * cluster reaches the ON power mode. The bit 'i' is equal to one if and
     * only if the core defined by the entry 'i' of the 'core_pd_ctx_table'
     * table must be powered on when the cluster reaches the ON power mode.
     */
    uint32_t pending_on_core_mask;

    /* Pointer to the power state observer API */
    const struct mod_ppu_v1_power_state_observer_api *observer_api;

    /*
     * Flag indicating whether the cluster power domain has been requested to
     * be in the OFF power state or not.
     */
    bool off_power_state_requested;

    /*
     * Power state corresponding to the OFF power mode. If the cluster power
     * domain has been requested to be in the OFF power state, this is
     * MOD_PD_STATE_OFF, MOD_PD_STATE_SLEEP otherwise.
     */
    unsigned int off_power_mode_power_state;
};

/* Thread context */
struct thread_ctx {
    /* Identifier of the entity bound to the power domain driver API */
    fwk_id_t bound_id;

    /*
     * Flag indicating whether the thread power domain has been requested to be
     * in the OFF power state or not.
     */
    bool off_power_state_requested;

    /*
     * Power state corresponding to the OFF power mode. If the thread has
     * been requested to be in the OFF power state, this is MOD_PD_STATE_OFF,
     * MOD_PD_STATE_SLEEP otherwise.
     */
    unsigned int off_power_mode_power_state;
};

/* Core power domain specific context */
struct core_pd_specific_ctx {
    /* Context of the cluster power domain */
    struct ppu_v1_pd_ctx *cluster_pd_ctx;

    /*
     * Index of the pointer to the core power domain context in the table of
     * pointers to core power domain contexts of its cluster.
     */
    unsigned int core_pd_ctx_idx;

    /*
     * Flag indicating whether the core power domain has been requested to be
     * in the OFF power state or not.
     */
    bool off_power_state_requested;

    /*
     * Power state corresponding to the OFF power mode. If the core power
     * domain has been requested to be in the OFF power state, this is
     * MOD_PD_STATE_OFF, MOD_PD_STATE_SLEEP otherwise.
     */
    unsigned int off_power_mode_power_state;

    /* Number of threads */
    unsigned int thread_count;

    /* Table of thread contexts */
    struct thread_ctx *thread_ctx_table;
};

/* Power domain context */
struct ppu_v1_pd_ctx {
    /* Power domain configuration data */
    const struct mod_ppu_v1_pd_config *config;

    /* PPU registers */
    struct ppu_v1_reg *ppu;

    /* Identifier of the entity bound to the power domain driver API */
    fwk_id_t bound_id;

    /* Power module driver input API */
    struct mod_pd_driver_input_api *pd_driver_input_api;

    /* Context data specific to the type of power domain */
    union {
        struct cluster_pd_specific_ctx *cluster;
        struct core_pd_specific_ctx *core;
    } specific;
};

/* Module context */
struct ppu_v1_ctx {
    /* Table of the power domain contexts */
    struct ppu_v1_pd_ctx *pd_ctx_table;

    /* Number of power domains */
    size_t pd_ctx_table_size;

    /* Minimum power mode for the cluster ON power state */
    unsigned int cluster_on_min_mode;

    /* Log API */
    struct mod_log_api *log_api;
};

/*
 * Internal variables
 */

static struct ppu_v1_ctx ppu_v1_ctx;

#define MODE_UNSUPPORTED        ~0U
static const uint8_t ppu_mode_to_power_state[] = {
    [MOD_PPU_V1_MODE_OFF]         = (uint8_t)MOD_PD_STATE_OFF,
    [MOD_PPU_V1_MODE_OFF_EMU]     = (uint8_t)MOD_PD_STATE_OFF,
    [MOD_PPU_V1_MODE_MEM_RET]     = (uint8_t)MOD_PD_STATE_OFF,
    [MOD_PPU_V1_MODE_MEM_RET_EMU] = (uint8_t)MOD_PD_STATE_OFF,
    [MOD_PPU_V1_MODE_LOGIC_RET]   = (uint8_t)MOD_PD_STATE_ON,
    [MOD_PPU_V1_MODE_FULL_RET]    = (uint8_t)MOD_PD_STATE_ON,
    [MOD_PPU_V1_MODE_MEM_OFF]     = (uint8_t)MOD_PD_STATE_ON,
    [MOD_PPU_V1_MODE_FUNC_RET]    = (uint8_t)MOD_PD_STATE_ON,
    [MOD_PPU_V1_MODE_ON]          = (uint8_t)MOD_PD_STATE_ON,
    [MOD_PPU_V1_MODE_WARM_RST]    = (uint8_t)MODE_UNSUPPORTED,
    [MOD_PPU_V1_MODE_DBG_RECOV]   = (uint8_t)MODE_UNSUPPORTED
};

/*
 * Functions not specific to any type of power domain
 */

static int get_state(struct ppu_v1_reg *ppu, unsigned int *state)
{
    enum mod_ppu_v1_mode mode;

    /* Ensure ppu_to_pd_state_v1 has an entry for each PPU state */
    static_assert((FWK_ARRAY_SIZE(ppu_mode_to_power_state) ==
        MOD_PPU_V1_MODE_COUNT), "[PPU_V1] ppu_mode_to_power_state size error");

    mode = ppu_v1_get_power_mode(ppu);
    assert(mode < MOD_PPU_V1_MODE_COUNT);

    *state = ppu_mode_to_power_state[mode];

    if ((*state == MOD_PD_STATE_OFF) && (ppu_v1_is_dynamic_enabled(ppu)))
        *state = MOD_PD_STATE_SLEEP;

    if (*state == MODE_UNSUPPORTED) {
        ppu_v1_ctx.log_api->log(MOD_LOG_GROUP_ERROR,
                                "[PPU_V1] Unexpected PPU mode (%i).\n", mode);
        return FWK_E_DEVICE;
    }

    return FWK_SUCCESS;
}

static int ppu_v1_pd_set_state(fwk_id_t pd_id, unsigned int state)
{
    int status;
    struct ppu_v1_pd_ctx *pd_ctx;

    status = fwk_module_check_call(pd_id);
    if (status != FWK_SUCCESS)
        return status;

    pd_ctx = ppu_v1_ctx.pd_ctx_table + fwk_id_get_element_idx(pd_id);

    switch (state) {
    case MOD_PD_STATE_ON:
        ppu_v1_set_power_mode(pd_ctx->ppu, MOD_PPU_V1_MODE_ON);
        status = pd_ctx->pd_driver_input_api->report_power_state_transition(
            pd_ctx->bound_id, MOD_PD_STATE_ON);
        assert(status == FWK_SUCCESS);
        break;

    case MOD_PD_STATE_OFF:
        ppu_v1_set_power_mode(pd_ctx->ppu, MOD_PPU_V1_MODE_OFF);
        status = pd_ctx->pd_driver_input_api->report_power_state_transition(
            pd_ctx->bound_id, MOD_PD_STATE_OFF);
        assert(status == FWK_SUCCESS);
        break;

    default:
        ppu_v1_ctx.log_api->log(MOD_LOG_GROUP_ERROR,
            "[PD] Requested power state (%i) is not supported.\n", state);
        return FWK_E_PARAM;
    }

    return FWK_SUCCESS;
}

static int ppu_v1_pd_get_state(fwk_id_t pd_id, unsigned int *state)
{
    int status;
    struct ppu_v1_pd_ctx *pd_ctx;

    status = fwk_module_check_call(pd_id);
    if (status != FWK_SUCCESS)
        return status;

    pd_ctx = ppu_v1_ctx.pd_ctx_table + fwk_id_get_element_idx(pd_id);

    return get_state(pd_ctx->ppu, state);
}

static int ppu_v1_pd_reset(fwk_id_t pd_id)
{
    int status;
    struct ppu_v1_pd_ctx *pd_ctx;

    status = fwk_module_check_call(pd_id);
    if (status != FWK_SUCCESS)
        return status;

    pd_ctx = ppu_v1_ctx.pd_ctx_table + fwk_id_get_element_idx(pd_id);

    /* Model does not support warm reset at the moment. Using OFF instead. */
    status = ppu_v1_set_power_mode(pd_ctx->ppu, MOD_PPU_V1_MODE_OFF);
    if (status == FWK_SUCCESS)
        status = ppu_v1_set_power_mode(pd_ctx->ppu, MOD_PPU_V1_MODE_ON);

    return status;
}

static const struct mod_pd_driver_api pd_driver = {
    .set_state = ppu_v1_pd_set_state,
    .get_state = ppu_v1_pd_get_state,
    .reset = ppu_v1_pd_reset,
};

/*
 * Functions specific to threads
 */
static bool cluster_on(struct ppu_v1_pd_ctx *core_pd_ctx);
static void core_on(struct ppu_v1_pd_ctx *pd_ctx);

static int ppu_v1_thread_set_state(fwk_id_t thread_id, unsigned int state)
{
    int status;
    struct ppu_v1_pd_ctx *pd_ctx;
    struct core_pd_specific_ctx *core_pd_specific_ctx;
    struct ppu_v1_reg *ppu;
    unsigned int thread_idx;
    unsigned int thread_mask;
    struct thread_ctx *thread_ctx;
    enum ppu_v1_op_devactive op_devactive;
    enum ppu_v1_opmode operating_mode;

    status = fwk_module_check_call(thread_id);
    if (status != FWK_SUCCESS)
        return status;

    pd_ctx = ppu_v1_ctx.pd_ctx_table + fwk_id_get_element_idx(thread_id);
    core_pd_specific_ctx = pd_ctx->specific.core;
    ppu = pd_ctx->ppu;
    thread_idx = fwk_id_get_sub_element_idx(thread_id);
    thread_mask = 1 << thread_idx;
    thread_ctx = core_pd_specific_ctx->thread_ctx_table + thread_idx;
    op_devactive = PPU_V1_OP_DEVACTIVE_0 + thread_idx;

    switch (state) {
    case MOD_PD_STATE_OFF:
        thread_ctx->off_power_state_requested = true;
        thread_ctx->off_power_mode_power_state = MOD_PD_STATE_OFF;
        ppu_v1_set_op_active_edge_sensitivity(
                ppu, op_devactive, PPU_V1_EDGE_SENSITIVITY_MASKED);
        ppu_v1_interrupt_mask(ppu, PPU_V1_IMR_STA_POLICY_TRN_IRQ_MASK);

        /*
         * Disable interrupts as the core operating mode is shared between
         * threads and could be modified by the handler of OP_ACTIVE_EDGE_IRQ
         * asserted for another thread.
         */
        fwk_interrupt_global_disable();
        while (ppu_v1_is_op_devactive_high(ppu, op_devactive))
            continue;
        operating_mode = ppu_v1_get_operating_mode(ppu);
        if (operating_mode & thread_mask) {
            ppu_v1_dynamic_disable(ppu);
            ppu_v1_set_operating_mode(ppu,operating_mode & (~(1<<thread_idx)));
        } else {
            operating_mode = ppu_v1_get_operating_mode(ppu);
            if (!(operating_mode & thread_mask)) {
                status =
                    pd_ctx->pd_driver_input_api->report_power_state_transition(
                        thread_ctx->bound_id, MOD_PD_STATE_OFF);
                assert(status == FWK_SUCCESS);
            }
        }
        fwk_interrupt_global_enable();
        break;

    case MOD_PD_STATE_ON:
        thread_ctx->off_power_state_requested = false;
        thread_ctx->off_power_mode_power_state = MOD_PD_STATE_SLEEP;

        ppu_v1_set_op_active_edge_sensitivity(
            ppu, op_devactive, PPU_V1_EDGE_SENSITIVITY_MASKED);

        fwk_interrupt_global_disable();
        operating_mode = ppu_v1_get_operating_mode(ppu);
        ppu_v1_request_operating_mode(ppu, operating_mode | thread_mask);
        fwk_interrupt_global_enable();

        if (cluster_on(pd_ctx))
            core_on(pd_ctx);
        break;

    case MOD_PD_STATE_SLEEP:
        if (thread_ctx->off_power_state_requested) {

            thread_ctx->off_power_state_requested = false;
            thread_ctx->off_power_mode_power_state = MOD_PD_STATE_SLEEP;

            if (ppu_v1_is_op_devactive_high(ppu, op_devactive)) {
                fwk_interrupt_global_disable();
                operating_mode = ppu_v1_get_programmed_operating_mode(ppu);
                ppu_v1_request_operating_mode(
                    ppu, operating_mode | thread_mask);
                fwk_interrupt_global_enable();
            }
        }
        break;

    default:
        ppu_v1_ctx.log_api->log(MOD_LOG_GROUP_ERROR,
            "[PPU_V1] Requested thread power state (%i) is not supported!\n",
            state);
        return FWK_E_PARAM;
    }

    return FWK_SUCCESS;
}

static int ppu_v1_thread_get_state(fwk_id_t thread_id, unsigned int *state)
{
    int status;
    struct ppu_v1_pd_ctx *pd_ctx;
    struct ppu_v1_reg *ppu;
    unsigned int thread_idx;
    unsigned int thread_mask;
    struct thread_ctx *thread_ctx;

    status = fwk_module_check_call(thread_id);
    if (status != FWK_SUCCESS)
        return status;

    pd_ctx = ppu_v1_ctx.pd_ctx_table + fwk_id_get_element_idx(thread_id);
    ppu = pd_ctx->ppu;
    thread_idx = fwk_id_get_sub_element_idx(thread_id);
    thread_mask = 1 << thread_idx;
    thread_ctx = pd_ctx->specific.core->thread_ctx_table + thread_idx;

    if (ppu_v1_get_programmed_operating_mode(ppu) & thread_mask)
        *state = MOD_PD_STATE_ON;
    else
        *state = thread_ctx->off_power_mode_power_state;

    return FWK_SUCCESS;
}

static int ppu_v1_thread_reset(fwk_id_t thread_id)
{
    int status;
    struct ppu_v1_pd_ctx *pd_ctx;
    struct ppu_v1_reg *ppu;
    unsigned int thread_idx;

    status = fwk_module_check_call(thread_id);
    if (status != FWK_SUCCESS)
        return status;

    pd_ctx = ppu_v1_ctx.pd_ctx_table + fwk_id_get_element_idx(thread_id);
    ppu = pd_ctx->ppu;
    thread_idx = fwk_id_get_sub_element_idx(thread_id);

    ppu_v1_request_operating_mode(ppu,
       ppu_v1_get_operating_mode(ppu) & (~(1 << thread_idx)));

/* TODO */

    return FWK_SUCCESS;
}

static void thread_op_active_edge_interrupt_handler(
    struct ppu_v1_pd_ctx *core_pd_ctx,
    unsigned int thread_idx,
    struct thread_ctx *thread_ctx)
{
    int status;
    struct ppu_v1_reg *ppu;
    enum ppu_v1_op_devactive op_devactive;
    enum ppu_v1_opmode operating_mode;

    assert(core_pd_ctx != NULL);
    assert(thread_idx < PPU_V1_OP_DEVACTIVE_INDEPENDENT_COUNT);
    assert(thread_ctx != NULL);

    ppu = core_pd_ctx->ppu;
    op_devactive = PPU_V1_OP_DEVACTIVE_0 + thread_idx;
    if (!ppu_v1_is_op_active_edge_interrupt(ppu, op_devactive))
        return;

    ppu_v1_ack_op_active_edge_interrupt(ppu, op_devactive);
    operating_mode = ppu_v1_get_programmed_operating_mode(ppu);

    if (ppu_v1_get_op_active_edge_sensitivity(ppu, op_devactive) ==
        PPU_V1_EDGE_SENSITIVITY_FALLING_EDGE) {

        operating_mode &= ~(1 << thread_idx);
        ppu_v1_request_operating_mode(ppu, operating_mode);

        status =
            core_pd_ctx->pd_driver_input_api->report_power_state_transition(
                thread_ctx->bound_id, thread_ctx->off_power_mode_power_state);
        assert(status == FWK_SUCCESS);
        (void)status;

        if (thread_ctx->off_power_state_requested) {
            ppu_v1_set_op_active_edge_sensitivity(
                ppu, op_devactive, PPU_V1_EDGE_SENSITIVITY_MASKED);
            return;
        }

        ppu_v1_set_op_active_edge_sensitivity(
            ppu, op_devactive, PPU_V1_EDGE_SENSITIVITY_RISING_EDGE);

        if (!ppu_v1_is_op_devactive_high(ppu, op_devactive))
            return;
    }

    /*
     * The OP_DEVACTIVE signal of the thread is high and the thread has not
     * been put in the OFF power state, activate it.
     */
    ppu_v1_set_op_active_edge_sensitivity(
        ppu, op_devactive, PPU_V1_EDGE_SENSITIVITY_FALLING_EDGE);
    ppu_v1_request_operating_mode(ppu, operating_mode | (1 << thread_idx));

    if (cluster_on(core_pd_ctx))
        core_on(core_pd_ctx);
}

static void thread_report_active_threads(struct ppu_v1_pd_ctx *core_pd_ctx)
{
    int status;
    enum ppu_v1_opmode operating_mode;
    unsigned int thread_count;
    struct thread_ctx *thread_ctx_table, *thread_ctx;
    unsigned int thread_idx;

    assert(core_pd_ctx != NULL);

    operating_mode = ppu_v1_get_operating_mode(core_pd_ctx->ppu);
    thread_count = core_pd_ctx->specific.core->thread_count;
    thread_ctx_table = core_pd_ctx->specific.core->thread_ctx_table;

    for (thread_idx = 0; thread_idx < thread_count; thread_idx++) {
        if (!(operating_mode & (1 << thread_idx)))
            continue;

        thread_ctx = &thread_ctx_table[thread_idx];

        status =
            core_pd_ctx->pd_driver_input_api->report_power_state_transition(
                thread_ctx->bound_id, MOD_PD_STATE_ON);
        assert(status == FWK_SUCCESS);
        (void)status;
    }
}

static void thread_interrupt_handler(struct ppu_v1_pd_ctx *core_pd_ctx)
{
    struct ppu_v1_reg *ppu;
    unsigned int thread_count;
    unsigned int thread_idx;
    struct thread_ctx *thread_ctx_table, *thread_ctx;

    assert(core_pd_ctx != NULL);

    ppu = core_pd_ctx->ppu;
    thread_count = core_pd_ctx->specific.core->thread_count;
    thread_ctx_table = core_pd_ctx->specific.core->thread_ctx_table;

    if (ppu_v1_is_interrupt_pending(ppu, PPU_V1_ISR_OP_ACTIVE_EDGE_IRQ_MASK)) {
        for (thread_idx = 0, thread_ctx = thread_ctx_table;
             thread_idx < thread_count; thread_idx++, thread_ctx++)
            thread_op_active_edge_interrupt_handler(
                core_pd_ctx, thread_idx, thread_ctx);
    }
}

static const struct mod_pd_driver_api thread_driver = {
    .set_state = ppu_v1_thread_set_state,
    .get_state = ppu_v1_thread_get_state,
    .reset = ppu_v1_thread_reset,
};

/*
 * Functions specific to core power domains
 */

static void core_on(struct ppu_v1_pd_ctx *pd_ctx)
{
    struct ppu_v1_reg *ppu = pd_ctx->ppu;

    ppu_v1_additional_interrupt_mask(ppu, PPU_V1_AIMR_DYN_ACCEPT_IRQ_MASK);
    ppu_v1_interrupt_unmask(ppu, PPU_V1_IMR_STA_POLICY_TRN_IRQ_MASK);
    ppu_v1_set_input_edge_sensitivity(
        ppu, MOD_PPU_V1_MODE_ON, PPU_V1_EDGE_SENSITIVITY_MASKED);
    ppu_v1_request_power_mode(ppu, MOD_PPU_V1_MODE_ON);

    /* Just make sure the cluster is not locked in the OFF power mode */
    ppu_v1_off_unlock(pd_ctx->specific.core->cluster_pd_ctx->ppu);
}



static int ppu_v1_core_pd_init(struct ppu_v1_pd_ctx *pd_ctx)
{
    struct core_pd_specific_ctx *core_pd_specific_ctx;
    struct ppu_v1_reg *ppu;
    unsigned int num_opmode;
    enum ppu_v1_opmode operating_mode;
    unsigned int thread_idx;
    struct thread_ctx *thread_ctx;

    core_pd_specific_ctx = pd_ctx->specific.core;
    ppu = pd_ctx->ppu;

    ppu_v1_init(ppu);

    num_opmode = ppu_v1_get_num_opmode(ppu);
    assert(core_pd_specific_ctx->thread_count ==
           (unsigned int)fwk_math_log2(num_opmode));
    (void)num_opmode;

    core_pd_specific_ctx->off_power_state_requested =
        (ppu_v1_get_programmed_power_mode(ppu) == MOD_PPU_V1_MODE_OFF) &&
        (!ppu_v1_is_dynamic_enabled(ppu));
    core_pd_specific_ctx->off_power_mode_power_state =
        core_pd_specific_ctx->off_power_state_requested ?
        MOD_PD_STATE_OFF : MOD_PD_STATE_SLEEP;

    operating_mode = ppu_v1_get_programmed_operating_mode(ppu);
    for (thread_idx = 0;
         thread_idx < core_pd_specific_ctx->thread_count;
         thread_idx++) {
        thread_ctx = &core_pd_specific_ctx->thread_ctx_table[thread_idx];

        thread_ctx->off_power_state_requested =
            (operating_mode & (1 << thread_idx)) == 0;
        thread_ctx->off_power_mode_power_state =
            thread_ctx->off_power_state_requested ?
            MOD_PD_STATE_OFF : MOD_PD_STATE_SLEEP;
    }

    ppu_v1_dynamic_enable(ppu, MOD_PPU_V1_MODE_OFF);
    ppu_v1_interrupt_unmask(ppu, PPU_V1_IMR_LOCKED_IRQ_MASK);

    return FWK_SUCCESS;
}

static int ppu_v1_core_pd_set_state(fwk_id_t core_pd_id, unsigned int state)
{
    int status;
    struct ppu_v1_pd_ctx *pd_ctx;
    struct core_pd_specific_ctx *core_pd_specific_ctx;
    struct ppu_v1_reg *ppu;

    status = fwk_module_check_call(core_pd_id);
    if (status != FWK_SUCCESS)
        return status;

    pd_ctx = ppu_v1_ctx.pd_ctx_table + fwk_id_get_element_idx(core_pd_id);
    core_pd_specific_ctx = pd_ctx->specific.core;
    ppu = pd_ctx->ppu;

    switch (state) {
    case MOD_PD_STATE_OFF:
        /*
         * Disable the wake-up interrupt and update the context variables used
         * by the LOCKED_IRQ handler for the context to be well defined if the
         * LOCKED_IRQ is asserted while doing the setting.
         */
        fwk_interrupt_global_disable();
        core_pd_specific_ctx->off_power_state_requested = true;
        core_pd_specific_ctx->off_power_mode_power_state = MOD_PD_STATE_OFF;
        ppu_v1_set_input_edge_sensitivity(
            ppu, MOD_PPU_V1_MODE_ON, PPU_V1_EDGE_SENSITIVITY_MASKED);
        fwk_interrupt_global_enable();

        /*
         * Unlock the core to retrigger a locked interrupt in case the core is
         * already locked in the OFF power mode.
         */
        ppu_v1_off_unlock(ppu);
        ppu_v1_dynamic_enable(ppu, MOD_PPU_V1_MODE_OFF);
        break;

    case MOD_PD_STATE_ON:
        core_pd_specific_ctx->off_power_state_requested = false;
        core_pd_specific_ctx->off_power_mode_power_state = MOD_PD_STATE_SLEEP;

        ppu_v1_set_input_edge_sensitivity(
            ppu, MOD_PPU_V1_MODE_ON, PPU_V1_EDGE_SENSITIVITY_MASKED);

        if (cluster_on(pd_ctx))
            core_on(pd_ctx);
        break;

    case MOD_PD_STATE_SLEEP:
        /* OFF to SLEEP power state transition. */
        if (core_pd_specific_ctx->off_power_state_requested) {

            core_pd_specific_ctx->off_power_state_requested = false;
            core_pd_specific_ctx->off_power_mode_power_state =
                MOD_PD_STATE_SLEEP;
        }

        /*
         * Unlock the core to retrigger a locked interrupt in case the core
         * is already locked in the OFF power mode.
         */
        ppu_v1_off_unlock(ppu);
        ppu_v1_dynamic_enable(ppu, MOD_PPU_V1_MODE_OFF);
        break;

    default:
        ppu_v1_ctx.log_api->log(MOD_LOG_GROUP_ERROR,
            "[PPU_V1] Requested CPU power state (%i) is not supported!\n",
            state);
        return FWK_E_PARAM;
    }

    return FWK_SUCCESS;
}

static int ppu_v1_core_pd_reset(fwk_id_t core_pd_id)
{
    int status;

    status = ppu_v1_core_pd_set_state(core_pd_id, MOD_PD_STATE_OFF);
    if (status == FWK_SUCCESS)
        status = ppu_v1_core_pd_set_state(core_pd_id, MOD_PD_STATE_ON);

    return status;
}

static void core_pd_sta_policy_trn_interrupt_handler(
    struct ppu_v1_pd_ctx *pd_ctx)
{
    int status;
    struct ppu_v1_reg *ppu;

    assert(pd_ctx != NULL);
    ppu = pd_ctx->ppu;

    ppu_v1_ack_interrupt(ppu, PPU_V1_ISR_STA_POLICY_TRN_IRQ);

    /*
     * This interrupt is used only to detect when a core has been manually
     * powered on, its power policy set to the static ON power mode. If the
     * ON power mode has not been reached yet, leave for now, another interrupt
     * will be asserted when the ON power mode is reached.
     */
    if (ppu_v1_get_power_mode(ppu) != MOD_PPU_V1_MODE_ON)
        return;

    ppu_v1_interrupt_mask(ppu, PPU_V1_IMR_STA_POLICY_TRN_IRQ_MASK);

    status = pd_ctx->pd_driver_input_api->report_power_state_transition(
        pd_ctx->bound_id, MOD_PD_STATE_ON);
    assert(status == FWK_SUCCESS);
    (void)status;

    if (pd_ctx->specific.core->thread_count > 0)
        thread_report_active_threads(pd_ctx);

    ppu_v1_dynamic_enable(ppu, MOD_PPU_V1_MODE_OFF);
}

static void core_pd_dyn_accept_interrupt_handler(
    struct ppu_v1_pd_ctx *core_pd_ctx)
{
    int status;
    struct ppu_v1_reg *ppu;

    assert(core_pd_ctx != NULL);
    ppu = core_pd_ctx->ppu;

    ppu_v1_ack_additional_interrupt(ppu, PPU_V1_AISR_DYN_ACCEPT_IRQ);

    /*
     * This interrupt is used only to detect when a core has been powered on
     * dynamically. If the ON power mode has not been reached yet, leave for
     * now, another interrupt will be asserted when the ON power mode is
     * reached.
     */
    if (ppu_v1_get_power_mode(ppu) != MOD_PPU_V1_MODE_ON)
        return;

    ppu_v1_additional_interrupt_mask(ppu, PPU_V1_AIMR_DYN_ACCEPT_IRQ_MASK);

    status = core_pd_ctx->pd_driver_input_api->report_power_state_transition(
        core_pd_ctx->bound_id, MOD_PD_STATE_ON);
    assert(status == FWK_SUCCESS);
    (void)status;
}

static void core_pd_on_rising_edge_interrupt_handler(
    struct ppu_v1_pd_ctx *pd_ctx)
{
    struct ppu_v1_reg *ppu;

    assert(pd_ctx != NULL);
    ppu = pd_ctx->ppu;

    ppu_v1_ack_power_active_edge_interrupt(ppu, MOD_PPU_V1_MODE_ON);
    ppu_v1_set_input_edge_sensitivity(
        ppu, MOD_PPU_V1_MODE_ON, PPU_V1_EDGE_SENSITIVITY_MASKED);

    if (!cluster_on(pd_ctx))
        return;

    ppu_v1_additional_interrupt_unmask(ppu, PPU_V1_AIMR_DYN_ACCEPT_IRQ_MASK);
    ppu_v1_off_unlock(ppu);
}

static void core_pd_ppu_interrupt_handler(struct ppu_v1_pd_ctx *pd_ctx)
{
    int status;
    struct core_pd_specific_ctx *core_pd_specific_ctx;
    struct ppu_v1_reg *ppu;

    assert(pd_ctx != NULL);
    ppu = pd_ctx->ppu;

    thread_interrupt_handler(pd_ctx);

    /* Core manually powered on */
    if (ppu_v1_is_interrupt_pending(ppu, PPU_V1_ISR_STA_POLICY_TRN_IRQ))
        core_pd_sta_policy_trn_interrupt_handler(pd_ctx);

    /* Core dynamically powered on */
    if (ppu_v1_is_additional_interrupt_pending(ppu, PPU_V1_AISR_DYN_ACCEPT_IRQ))
        core_pd_dyn_accept_interrupt_handler(pd_ctx);

    /* ON request */
    if (ppu_v1_is_power_active_edge_interrupt(ppu, MOD_PPU_V1_MODE_ON))
        core_pd_on_rising_edge_interrupt_handler(pd_ctx);

    /* Core locked in the MEM_RET or OFF power mode */
    else if (ppu_v1_is_interrupt_pending(ppu, PPU_V1_ISR_LOCKED_IRQ)) {
        ppu_v1_ack_interrupt(ppu, PPU_V1_ISR_LOCKED_IRQ);

        if (ppu_v1_get_power_mode(ppu) == MOD_PPU_V1_MODE_MEM_RET) {
            ppu_v1_off_unlock(ppu);
            return;
        }

        core_pd_specific_ctx = pd_ctx->specific.core;

        status = pd_ctx->pd_driver_input_api->report_power_state_transition(
            pd_ctx->bound_id,
            core_pd_specific_ctx->off_power_mode_power_state);
        assert(status == FWK_SUCCESS);
        (void)status;

        if (core_pd_specific_ctx->off_power_state_requested)
            return;

        /*
         * Enable the core PACTIVE ON signal rising edge interrupt then check if
         * the PACTIVE ON signal is high. If it is high, we may have missed the
         * transition from low to high. In that case, power on the core
         * immediately.
         */
        ppu_v1_set_input_edge_sensitivity(
            ppu, MOD_PPU_V1_MODE_ON, PPU_V1_EDGE_SENSITIVITY_RISING_EDGE);
        if (ppu_v1_is_power_devactive_high(ppu, MOD_PPU_V1_MODE_ON))
            core_pd_on_rising_edge_interrupt_handler(pd_ctx);
    }
}

static const struct mod_pd_driver_api core_pd_driver = {
    .set_state = ppu_v1_core_pd_set_state,
    .get_state = ppu_v1_pd_get_state,
    .reset = ppu_v1_core_pd_reset,
};

/*
 * Functions specific to cluster power domains
 */

static bool cluster_on(struct ppu_v1_pd_ctx *core_pd_ctx)
{
    struct ppu_v1_reg *ppu;
    struct ppu_v1_pd_ctx *cluster_pd_ctx;

    assert(core_pd_ctx != NULL);
    cluster_pd_ctx = core_pd_ctx->specific.core->cluster_pd_ctx;
    ppu = cluster_pd_ctx->ppu;

    /*
     * First, prevent the core's cluster to transit beyond the minimum power
     * mode compatible with the core being powered on.
     */
    ppu_v1_set_input_edge_sensitivity(ppu,
                                      ppu_v1_ctx.cluster_on_min_mode,
                                      PPU_V1_EDGE_SENSITIVITY_FALLING_EDGE);

    if (ppu_v1_ctx.cluster_on_min_mode == MOD_PPU_V1_MODE_OFF) {
        ppu_v1_off_unlock(ppu);
        return true;
    }

    if (ppu_v1_get_programmed_power_mode(ppu) == ppu_v1_ctx.cluster_on_min_mode)
        return true;

    /*
     * The cluster may have transitionned to a power mode lower than the minimum
     * power mode compatible with the core being powered on. The cluster must
     * first be powered on. Once powered on, the core will be powered on in
     * turn.
     */

    fwk_interrupt_global_disable();
    cluster_pd_ctx->specific.cluster->pending_on_core_mask |=
        1 << core_pd_ctx->specific.core->core_pd_ctx_idx;
    fwk_interrupt_global_enable();

    ppu_v1_additional_interrupt_mask(ppu, PPU_V1_AIMR_DYN_ACCEPT_IRQ_MASK);
    ppu_v1_additional_interrupt_unmask(
        ppu, PPU_V1_AIMR_STA_POLICY_PWR_IRQ_MASK);
    ppu_v1_set_input_edge_sensitivity(
        ppu, MOD_PPU_V1_MODE_ON, PPU_V1_EDGE_SENSITIVITY_MASKED);
    ppu_v1_request_power_mode(ppu, MOD_PPU_V1_MODE_ON);

    return false;
}

static int ppu_v1_cluster_pd_init(struct ppu_v1_pd_ctx *pd_ctx)
{
    struct cluster_pd_specific_ctx *cluster_pd_specific_ctx;
    struct ppu_v1_reg *ppu;

    cluster_pd_specific_ctx = pd_ctx->specific.cluster;
    ppu = pd_ctx->ppu;

    ppu_v1_init(ppu);

    cluster_pd_specific_ctx->off_power_state_requested =
        (ppu_v1_get_programmed_power_mode(ppu) == MOD_PPU_V1_MODE_OFF) &&
        (!ppu_v1_is_dynamic_enabled(ppu));
    cluster_pd_specific_ctx->off_power_mode_power_state =
        cluster_pd_specific_ctx->off_power_state_requested ?
        MOD_PD_STATE_OFF : MOD_PD_STATE_SLEEP;

    ppu_v1_lock_off_enable(ppu);
    ppu_v1_dynamic_enable(ppu, MOD_PPU_V1_MODE_OFF);
    ppu_v1_interrupt_unmask(ppu, PPU_V1_IMR_LOCKED_IRQ_MASK);

    /* For clusters with operating mode support, enable the dynamic support */
    if (ppu_v1_get_num_opmode(ppu) > 1)
        ppu_v1_opmode_dynamic_enable(ppu, PPU_V1_OPMODE_00);

    return FWK_SUCCESS;
}

static int ppu_v1_cluster_pd_set_state(fwk_id_t cluster_pd_id,
                                       unsigned int state)
{
    int status;
    struct ppu_v1_pd_ctx *pd_ctx;
    struct cluster_pd_specific_ctx *cluster_pd_specific_ctx;
    struct ppu_v1_reg *ppu;

    status = fwk_module_check_call(cluster_pd_id);
    if (status != FWK_SUCCESS)
        return status;

    pd_ctx = ppu_v1_ctx.pd_ctx_table + fwk_id_get_element_idx(cluster_pd_id);
    cluster_pd_specific_ctx = pd_ctx->specific.cluster;
    ppu = pd_ctx->ppu;

    switch (state) {
    case MOD_PD_STATE_OFF:
        /*
         * Disable the wake-up interrupt and update the context variables used
         * by the LOCKED_IRQ handler for the context to be well defined if the
         * LOCKED_IRQ is asserted while doing the setting.
         */
        fwk_interrupt_global_disable();
        ppu_v1_set_input_edge_sensitivity(
           ppu, MOD_PPU_V1_MODE_ON, PPU_V1_EDGE_SENSITIVITY_MASKED);
        cluster_pd_specific_ctx->off_power_state_requested = true;
        cluster_pd_specific_ctx->off_power_mode_power_state = MOD_PD_STATE_OFF;
        fwk_interrupt_global_enable();

        /*
         * Unlock the cluster to retrigger a locked interrupt in case the
         * cluster already locked in the OFF power mode.
         */
        ppu_v1_off_unlock(ppu);
        ppu_v1_dynamic_enable(ppu, MOD_PPU_V1_MODE_OFF);
        break;

    case MOD_PD_STATE_ON:
        cluster_pd_specific_ctx->off_power_state_requested = false;
        cluster_pd_specific_ctx->off_power_mode_power_state =
            MOD_PD_STATE_SLEEP;

        ppu_v1_additional_interrupt_unmask(
            ppu, PPU_V1_AIMR_STA_POLICY_PWR_IRQ_MASK);
        ppu_v1_request_power_mode(ppu, MOD_PPU_V1_MODE_ON);
        break;

    default:
        ppu_v1_ctx.log_api->log(MOD_LOG_GROUP_ERROR,
            "[PPU_V1] Requested cluster power state (%i) is not supported!\n",
            state);
        return FWK_E_PARAM;
    }

    return FWK_SUCCESS;
}

static void cluster_pd_sta_policy_pwr_interrupt_handler(
    struct ppu_v1_pd_ctx *cluster_pd_ctx)
{
    int status;
    struct cluster_pd_specific_ctx *cluster_pd_specific_ctx;
    struct ppu_v1_reg *ppu;
    unsigned int core_pd_ctx_idx;

    assert(cluster_pd_ctx != NULL);
    cluster_pd_specific_ctx = cluster_pd_ctx->specific.cluster;
    ppu = cluster_pd_ctx->ppu;

    ppu_v1_ack_additional_interrupt(ppu, PPU_V1_AISR_STA_POLICY_PWR_IRQ);

    /*
     * This interrupt is used only to detect when a cluster has been manually
     * powered on, its power policy set to static ON power mode. If the
     * ON power mode has not been reached yet, leave for now, another interrupt
     * will be asserted when the ON power mode is reached.
     */
    if (ppu_v1_get_power_mode(ppu) != MOD_PPU_V1_MODE_ON)
        return;

    ppu_v1_additional_interrupt_mask(ppu, PPU_V1_AIMR_STA_POLICY_PWR_IRQ_MASK);

    status = cluster_pd_ctx->pd_driver_input_api->report_power_state_transition(
        cluster_pd_ctx->bound_id, MOD_PD_STATE_ON);
    assert(status == FWK_SUCCESS);
    (void)status;

    if (cluster_pd_specific_ctx->observer_api != NULL) {
        cluster_pd_specific_ctx->observer_api->post_ppu_on(
            cluster_pd_ctx->config->post_ppu_on_param);
    }

    while (cluster_pd_specific_ctx->pending_on_core_mask) {
        core_pd_ctx_idx = __builtin_ctz(
            cluster_pd_specific_ctx->pending_on_core_mask);
        cluster_pd_specific_ctx->pending_on_core_mask &=
            ~(1 << core_pd_ctx_idx);
        core_on(cluster_pd_specific_ctx->core_pd_ctx_table[core_pd_ctx_idx]);
    }

    ppu_v1_set_input_edge_sensitivity(ppu,
                                      ppu_v1_ctx.cluster_on_min_mode,
                                      PPU_V1_EDGE_SENSITIVITY_FALLING_EDGE);
    ppu_v1_dynamic_enable(ppu, ppu_v1_ctx.cluster_on_min_mode);
}

static void cluster_pd_dyn_accept_interrupt_handler(
    struct ppu_v1_pd_ctx *cluster_pd_ctx)
{
    int status;
    struct ppu_v1_reg *ppu;

    assert(cluster_pd_ctx != NULL);
    ppu = cluster_pd_ctx->ppu;

    ppu_v1_ack_additional_interrupt(ppu, PPU_V1_AISR_DYN_ACCEPT_IRQ);

    /*
     * This interrupt is used only to detect when a cluster has been powered on
     * dynamically. If the ON power mode has not been reached yet, leave for
     * now, another interrupt will be asserted when the ON power mode is
     * reached.
     */
    if (ppu_v1_get_power_mode(ppu) != MOD_PPU_V1_MODE_ON)
        return;

    ppu_v1_additional_interrupt_mask(ppu, PPU_V1_AIMR_DYN_ACCEPT_IRQ_MASK);

    status = cluster_pd_ctx->pd_driver_input_api->report_power_state_transition(
        cluster_pd_ctx->bound_id, MOD_PD_STATE_ON);
    assert(status == FWK_SUCCESS);
    (void)status;

    ppu_v1_set_input_edge_sensitivity(ppu,
                                      ppu_v1_ctx.cluster_on_min_mode,
                                      PPU_V1_EDGE_SENSITIVITY_FALLING_EDGE);
    ppu_v1_dynamic_enable(ppu, ppu_v1_ctx.cluster_on_min_mode);
}

static void cluster_pd_on_rising_edge_interrupt_handler(
    struct ppu_v1_pd_ctx *pd_ctx) {
    struct ppu_v1_reg *ppu;

    assert(pd_ctx != NULL);
    ppu = pd_ctx->ppu;

    ppu_v1_ack_power_active_edge_interrupt(ppu, MOD_PPU_V1_MODE_ON);
    ppu_v1_set_input_edge_sensitivity(
        ppu, MOD_PPU_V1_MODE_ON, PPU_V1_EDGE_SENSITIVITY_MASKED);
    ppu_v1_additional_interrupt_unmask(ppu, PPU_V1_AIMR_DYN_ACCEPT_IRQ_MASK);
    ppu_v1_off_unlock(ppu);
}

static void cluster_pd_ppu_interrupt_handler(struct ppu_v1_pd_ctx *pd_ctx)
{
    int status;
    struct cluster_pd_specific_ctx *cluster_pd_specific_ctx;
    struct ppu_v1_reg *ppu;

    assert(pd_ctx != NULL);

    cluster_pd_specific_ctx = pd_ctx->specific.cluster;
    ppu = pd_ctx->ppu;

    /* Cluster manually powered on */
    if (ppu_v1_is_additional_interrupt_pending(ppu,
                                               PPU_V1_AISR_STA_POLICY_PWR_IRQ))
        cluster_pd_sta_policy_pwr_interrupt_handler(pd_ctx);

    /* Cluster dynamically powered on */
    if (ppu_v1_is_additional_interrupt_pending(ppu, PPU_V1_AISR_DYN_ACCEPT_IRQ))
        cluster_pd_dyn_accept_interrupt_handler(pd_ctx);

    /* ON request */
    if (ppu_v1_is_power_active_edge_interrupt(ppu, MOD_PPU_V1_MODE_ON) &&
        (ppu_v1_get_input_edge_sensitivity(ppu, MOD_PPU_V1_MODE_ON) ==
         PPU_V1_EDGE_SENSITIVITY_RISING_EDGE))
        cluster_pd_on_rising_edge_interrupt_handler(pd_ctx);

    /*
     * Cluster can transit to modes deeper than ppu_v1_ctx.cluster_on_min_mode
     */
    else if (ppu_v1_is_power_active_edge_interrupt(ppu,
                 ppu_v1_ctx.cluster_on_min_mode)) {

        ppu_v1_ack_power_active_edge_interrupt(ppu,
                                               ppu_v1_ctx.cluster_on_min_mode);
        ppu_v1_set_input_edge_sensitivity(pd_ctx->ppu,
                                          ppu_v1_ctx.cluster_on_min_mode,
                                          PPU_V1_EDGE_SENSITIVITY_MASKED);
        ppu_v1_dynamic_enable(ppu, MOD_PPU_V1_MODE_OFF);

        /*
         * Enable the cluster PACTIVE ON signal rising edge interrupt then check
         * if the PACTIVE ON signal is high. If it is high, we may have missed
         * the transition from low to high. In that case, power on the cluster
         * immediately.
         */
        ppu_v1_set_input_edge_sensitivity(
            ppu, MOD_PPU_V1_MODE_ON, PPU_V1_EDGE_SENSITIVITY_RISING_EDGE);
        if (ppu_v1_is_power_devactive_high(ppu, MOD_PPU_V1_MODE_ON))
            cluster_pd_on_rising_edge_interrupt_handler(pd_ctx);

    /* Cluster locked in the MEM_RET or OFF power mode */
    } else if (ppu_v1_is_interrupt_pending(ppu, PPU_V1_ISR_LOCKED_IRQ)) {
        ppu_v1_ack_interrupt(ppu, PPU_V1_ISR_LOCKED_IRQ);

        if (ppu_v1_get_power_mode(ppu) == MOD_PPU_V1_MODE_MEM_RET) {
            ppu_v1_off_unlock(ppu);
            return;
        }

        status = pd_ctx->pd_driver_input_api->report_power_state_transition(
            pd_ctx->bound_id,
            cluster_pd_specific_ctx->off_power_mode_power_state);
        assert(status == FWK_SUCCESS);
        (void)status;

        if (cluster_pd_specific_ctx->off_power_state_requested)
            return;

        /*
         * Enable the core PACTIVE ON signal rising edge interrupt then check if
         * the PACTIVE ON signal is high. If it is high, we may have missed the
         * transition from low to high. In that case, power on the cluster
         * immediately.
         */
        ppu_v1_set_input_edge_sensitivity(
            ppu, MOD_PPU_V1_MODE_ON, PPU_V1_EDGE_SENSITIVITY_RISING_EDGE);
        if (ppu_v1_is_power_devactive_high(ppu, MOD_PPU_V1_MODE_ON))
            cluster_pd_on_rising_edge_interrupt_handler(pd_ctx);
    }
}

static const struct mod_pd_driver_api cluster_pd_driver = {
    .set_state = ppu_v1_cluster_pd_set_state,
    .get_state = ppu_v1_pd_get_state,
    .reset = ppu_v1_pd_reset,
};

static void ppu_interrupt_handler(uintptr_t pd_ctx_param)
{
    struct ppu_v1_pd_ctx *pd_ctx = (struct ppu_v1_pd_ctx *)pd_ctx_param;

    assert(pd_ctx != NULL);

    if (pd_ctx->config->pd_type == MOD_PD_TYPE_CORE)
        core_pd_ppu_interrupt_handler(pd_ctx);
    else
        cluster_pd_ppu_interrupt_handler(pd_ctx);
}

static void ppu_isr_api_interrupt_handler(fwk_id_t pd_id)
{
    int status;
    struct ppu_v1_pd_ctx *pd_ctx;

    status = fwk_module_check_call(pd_id);
    if (status != FWK_SUCCESS)
        return;

    if (!fwk_id_is_type(pd_id, FWK_ID_TYPE_ELEMENT))
        return;

    pd_ctx = ppu_v1_ctx.pd_ctx_table + fwk_id_get_element_idx(pd_id);
    ppu_interrupt_handler((uintptr_t)pd_ctx);
}

static const struct ppu_v1_isr_api isr_api = {
    .ppu_interrupt_handler = ppu_isr_api_interrupt_handler,
};

static int ppu_power_mode_on(fwk_id_t pd_id)
{
    int status;
    struct ppu_v1_pd_ctx *pd_ctx;

    status = fwk_module_check_call(pd_id);
    if (status != FWK_SUCCESS)
        return status;

    if (!fwk_id_is_type(pd_id, FWK_ID_TYPE_ELEMENT))
        return FWK_E_PARAM;

    pd_ctx = ppu_v1_ctx.pd_ctx_table + fwk_id_get_element_idx(pd_id);

    return ppu_v1_set_power_mode(pd_ctx->ppu, MOD_PPU_V1_MODE_ON);
}

static const struct ppu_v1_boot_api boot_api = {
    .power_mode_on = ppu_power_mode_on,
};

/*
 * Framework handlers
 */

static int ppu_v1_mod_init(fwk_id_t module_id, unsigned int pd_count,
                           const void *config)
{
    const struct mod_ppu_v1_config *module_config = config;

    ppu_v1_ctx.pd_ctx_table = fwk_mm_calloc(pd_count,
                                            sizeof(struct ppu_v1_pd_ctx));
    if (ppu_v1_ctx.pd_ctx_table == NULL)
        return FWK_E_NOMEM;

    ppu_v1_ctx.pd_ctx_table_size = pd_count;
    ppu_v1_ctx.cluster_on_min_mode = module_config->cluster_on_min_mode;

    return FWK_SUCCESS;
}

static int ppu_v1_pd_init(fwk_id_t pd_id, unsigned int sub_element_count,
                          const void *data)
{
    const struct mod_ppu_v1_pd_config *config = data;
    struct ppu_v1_pd_ctx *pd_ctx;

    if (config->pd_type >= MOD_PD_TYPE_COUNT)
        return FWK_E_DATA;

    pd_ctx = ppu_v1_ctx.pd_ctx_table + fwk_id_get_element_idx(pd_id);
    pd_ctx->config = config;
    pd_ctx->ppu = (struct ppu_v1_reg *)(config->ppu.reg_base);
    pd_ctx->bound_id = FWK_ID_NONE;

    if (config->ppu.irq != FWK_INTERRUPT_NONE) {
        fwk_interrupt_set_isr_param(config->ppu.irq,
                                    ppu_interrupt_handler,
                                    (uintptr_t)pd_ctx);
    }

    switch (config->pd_type) {
    case MOD_PD_TYPE_CORE:
        pd_ctx->specific.core =
            fwk_mm_calloc(1, sizeof(struct core_pd_specific_ctx));
        if (pd_ctx->specific.core == NULL)
            return FWK_E_NOMEM;
        pd_ctx->specific.core->thread_count = sub_element_count;

        if (sub_element_count != 0) {
            pd_ctx->specific.core->thread_ctx_table =
                fwk_mm_calloc(sub_element_count, sizeof(struct thread_ctx));
            if (pd_ctx->specific.core->thread_ctx_table == NULL)
                return FWK_E_NOMEM;
        }
        break;

    case MOD_PD_TYPE_CLUSTER:
        if (sub_element_count != 0)
            return FWK_E_DATA;
        pd_ctx->specific.cluster =
            fwk_mm_calloc(1, sizeof(struct cluster_pd_specific_ctx));
        if (pd_ctx->specific.cluster == NULL)
            return FWK_E_NOMEM;
        break;

    default:
        if (sub_element_count != 0)
            return FWK_E_DATA;
        break;
    }

    if (config->default_power_on) {
        switch (config->pd_type) {
        case MOD_PD_TYPE_DEVICE:
            /* Fall through */
        case MOD_PD_TYPE_DEVICE_DEBUG:
            /* Fall through */
        case MOD_PD_TYPE_SYSTEM:
            ppu_v1_init(pd_ctx->ppu);
            return ppu_v1_set_power_mode(pd_ctx->ppu, MOD_PPU_V1_MODE_ON);

        default:
            assert(false);
            return FWK_E_SUPPORT;
        }
    }

    return FWK_SUCCESS;
}

static int ppu_v1_post_init(fwk_id_t module_id)
{
    unsigned int pd_idx;
    struct ppu_v1_pd_ctx *pd_ctx, *cluster_pd_ctx;
    const struct mod_ppu_v1_pd_config *config;
    fwk_id_t cluster_id;
    struct core_pd_specific_ctx *core_pd_specific_ctx;
    struct cluster_pd_specific_ctx *cluster_pd_specific_ctx;

    for (pd_idx = 0; pd_idx < ppu_v1_ctx.pd_ctx_table_size; pd_idx++) {
        pd_ctx = &ppu_v1_ctx.pd_ctx_table[pd_idx];
        core_pd_specific_ctx = pd_ctx->specific.core;
        config = pd_ctx->config;
        if (config->pd_type != MOD_PD_TYPE_CORE)
            continue;

        cluster_id = config->cluster_id;

        if ((!fwk_module_is_valid_element_id(cluster_id)) ||
            (fwk_id_get_module_idx(cluster_id) != FWK_MODULE_IDX_PPU_V1))
            return FWK_E_PARAM;

        cluster_pd_ctx = &ppu_v1_ctx.pd_ctx_table[
            fwk_id_get_element_idx(cluster_id)];
        cluster_pd_specific_ctx = cluster_pd_ctx->specific.cluster;

       if (cluster_pd_specific_ctx->core_count >= CORE_PER_CLUSTER_COUNT_MAX)
           return FWK_E_NOMEM;

       cluster_pd_specific_ctx->core_pd_ctx_table[
           cluster_pd_specific_ctx->core_count] = pd_ctx;

       core_pd_specific_ctx->cluster_pd_ctx = cluster_pd_ctx;
       core_pd_specific_ctx->core_pd_ctx_idx =
           cluster_pd_specific_ctx->core_count;

       cluster_pd_specific_ctx->core_count++;
    }

    return FWK_SUCCESS;
}

static int ppu_v1_bind(fwk_id_t id, unsigned int round)
{
    int status = FWK_SUCCESS;
    struct ppu_v1_pd_ctx *pd_ctx;

    /* Nothing to do during the first round of calls where the power module
       will bind to the power domains of this module. */
    if (round == 0)
        return FWK_SUCCESS;

    /* In the case of the module, bind to the log component */
    if (fwk_id_is_type(id, FWK_ID_TYPE_MODULE)) {
        status = fwk_module_bind(FWK_ID_MODULE(FWK_MODULE_IDX_LOG),
                                 FWK_ID_API(FWK_MODULE_IDX_LOG, 0),
                                 &ppu_v1_ctx.log_api);
        return status;
    }

    pd_ctx = ppu_v1_ctx.pd_ctx_table + fwk_id_get_element_idx(id);

    if (!fwk_id_is_equal(pd_ctx->config->observer_id, FWK_ID_NONE)) {
        if (pd_ctx->config->pd_type != MOD_PD_TYPE_CLUSTER) {
            /* State observation only supported for clusters */
            assert(false);
            return FWK_E_SUPPORT;
        }

        status = fwk_module_bind(pd_ctx->config->observer_id,
                                 pd_ctx->config->observer_api,
                                 &pd_ctx->specific.cluster->observer_api);
        if (status != FWK_SUCCESS)
            return status;
    }

    if (fwk_id_is_equal(pd_ctx->bound_id, FWK_ID_NONE))
        return FWK_SUCCESS;

    switch (fwk_id_get_module_idx(pd_ctx->bound_id)) {
    #if BUILD_HAS_MOD_POWER_DOMAIN
    case FWK_MODULE_IDX_POWER_DOMAIN:
        return fwk_module_bind(pd_ctx->bound_id,
                               mod_pd_api_id_driver_input,
                               &pd_ctx->pd_driver_input_api);
        break;
    #endif

    #if BUILD_HAS_MOD_SYSTEM_POWER
    case FWK_MODULE_IDX_SYSTEM_POWER:
        return fwk_module_bind(pd_ctx->bound_id,
                               mod_system_power_api_id_pd_driver_input,
                               &pd_ctx->pd_driver_input_api);
        break;
    #endif

    default:
        assert(false);
        return FWK_E_SUPPORT;
    }
}

static int ppu_v1_process_bind_request(fwk_id_t source_id,
                                       fwk_id_t target_id, fwk_id_t api_id,
                                       const void **api)
{
    struct ppu_v1_pd_ctx *pd_ctx;
    unsigned int api_idx;
    bool is_power_domain_module = false;
    bool is_system_power_module = false;
    unsigned int thread_idx;

    api_idx = fwk_id_get_api_idx(api_id);

    if (api_idx == MOD_PPU_V1_API_IDX_ISR) {
        if (!fwk_id_is_type(target_id, FWK_ID_TYPE_MODULE))
            return FWK_E_SUPPORT;

        *api = &isr_api;
        return FWK_SUCCESS;
    }

    if (api_idx == MOD_PPU_V1_API_IDX_BOOT) {
        *api = &boot_api;
        return FWK_SUCCESS;
    }

    if (api_idx != MOD_PPU_V1_API_IDX_POWER_DOMAIN_DRIVER)
        return FWK_E_SUPPORT;

    if (!fwk_module_is_valid_element_id(target_id) &&
        !fwk_module_is_valid_sub_element_id(target_id))
        return FWK_E_PARAM;

    pd_ctx = ppu_v1_ctx.pd_ctx_table + fwk_id_get_element_idx(target_id);

    /* Allow multiple binding only for device power domain for now */
    if ((pd_ctx->config->pd_type != MOD_PD_TYPE_DEVICE) &&
        (!fwk_id_is_equal(pd_ctx->bound_id, FWK_ID_NONE))) {
        assert(false);
        return FWK_E_ACCESS;
    }

    #if BUILD_HAS_MOD_POWER_DOMAIN
    is_power_domain_module = (fwk_id_get_module_idx(source_id) ==
        FWK_MODULE_IDX_POWER_DOMAIN);
    #endif
    #if BUILD_HAS_MOD_SYSTEM_POWER
    is_system_power_module = (fwk_id_get_module_idx(source_id) ==
        FWK_MODULE_IDX_SYSTEM_POWER);
    #endif

    switch (pd_ctx->config->pd_type) {
    case MOD_PD_TYPE_CORE:
        if (!is_power_domain_module)
            break;

        if (fwk_module_is_valid_sub_element_id(target_id)) {
            thread_idx = fwk_id_get_sub_element_idx(target_id);
            *api = &thread_driver;
            pd_ctx->specific.core->thread_ctx_table[thread_idx].bound_id =
                source_id;
        } else {
            *api = &core_pd_driver;
            pd_ctx->bound_id = source_id;
        }
        return FWK_SUCCESS;

    case MOD_PD_TYPE_CLUSTER:
        if (is_power_domain_module) {
            *api = &cluster_pd_driver;
            pd_ctx->bound_id = source_id;
            return FWK_SUCCESS;
        }
        break;

    case MOD_PD_TYPE_SYSTEM:
        if (is_power_domain_module || is_system_power_module) {
            *api = &pd_driver;
            pd_ctx->bound_id = source_id;
            return FWK_SUCCESS;
        }
        break;

    default:
        if (is_power_domain_module)
            pd_ctx->bound_id = source_id;
        *api = &pd_driver;
        return FWK_SUCCESS;
    }

    pd_ctx->bound_id = FWK_ID_NONE;
    return FWK_E_ACCESS;
}

static int ppu_v1_start(fwk_id_t id)
{
    int status;
    struct ppu_v1_pd_ctx *pd_ctx;
    const struct mod_ppu_v1_config *module_config;

    if (!fwk_id_is_type(id, FWK_ID_TYPE_ELEMENT))
        return FWK_SUCCESS;

    pd_ctx = ppu_v1_ctx.pd_ctx_table + fwk_id_get_element_idx(id);
    module_config = fwk_module_get_data(fwk_id_build_module_id(id));
    assert(module_config != NULL);

    /* Register for power domain transition notifications */
    status = fwk_notification_subscribe(
        module_config->pd_notification_id,
        module_config->pd_source_id,
        id);
    if (status != FWK_SUCCESS)
        return status;

    switch (pd_ctx->config->pd_type) {
    case MOD_PD_TYPE_CORE:
    case MOD_PD_TYPE_CLUSTER:
        fwk_interrupt_clear_pending(pd_ctx->config->ppu.irq);
        fwk_interrupt_enable(pd_ctx->config->ppu.irq);
        break;
    default:
        /* Nothing to be done for other types */
        break;
    }

    return FWK_SUCCESS;
}

static int ppu_v1_process_notification(
    const struct fwk_event *event,
    struct fwk_event *resp_event)
{
    const struct mod_ppu_v1_config *module_config;
    struct ppu_v1_pd_ctx *pd_ctx;
    struct mod_pd_power_state_transition_notification_params *params;

    assert(fwk_id_is_type(event->target_id, FWK_ID_TYPE_ELEMENT));
    module_config =
        fwk_module_get_data(fwk_id_build_module_id(event->target_id));
    assert(
        fwk_id_is_equal(
            event->id,
            module_config->pd_notification_id));
    (void)module_config;

    params = (struct mod_pd_power_state_transition_notification_params *)
        event->params;

    if (params->state != MOD_PD_STATE_ON)
        return FWK_SUCCESS;

    pd_ctx = ppu_v1_ctx.pd_ctx_table + fwk_id_get_element_idx(event->target_id);

    switch (pd_ctx->config->pd_type) {
    case MOD_PD_TYPE_CORE:
        return ppu_v1_core_pd_init(pd_ctx);

    case MOD_PD_TYPE_CLUSTER:
        return ppu_v1_cluster_pd_init(pd_ctx);

    default:
        ppu_v1_init(pd_ctx->ppu);
        return FWK_SUCCESS;
    }
}

const struct fwk_module module_ppu_v1 = {
    .name = "PPU_V1",
    .type = FWK_MODULE_TYPE_DRIVER,
    .api_count = MOD_PPU_V1_API_IDX_COUNT,
    .init = ppu_v1_mod_init,
    .element_init = ppu_v1_pd_init,
    .post_init = ppu_v1_post_init,
    .bind = ppu_v1_bind,
    .start = ppu_v1_start,
    .process_bind_request = ppu_v1_process_bind_request,
    .process_notification = ppu_v1_process_notification,
};