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2020-10-02docs: Replace `\ref` with `::`Chris Kay
The code-base is currently fairly inconsistent with its usage of the `::` prefix and the `\ref`. This commit replaces any instances of `\ref` with `::`. Change-Id: I02c1b6e2caf0f333388f44ac51ede060aa0568c3 Signed-off-by: Chris Kay <chris.kay@arm.com>
2020-10-02docs: Normalize Doxygen paragraph indentationChris Kay
Doxygen continutation line intendation across the code-base is currently inconsistent in spite of the code-style documentation specifying a two-tab indent on continuation lines. Change-Id: I0944d749042972797bde1997f02afd98d4028c1a Signed-off-by: Chris Kay <chris.kay@arm.com>
2020-10-02docs: Prefer `\` to `@` in Doxygen commentsChris Kay
This commit replaces any instances of `@`-style Doxygen commands with their `\`-style equivalents. This is done for consistency across the codebase. The `\sa` Doxygen command has been added to the Clang-Format configuration to prevent it from reflowing see-also comments, which often exceed the column limit due to referring to long URLs. Change-Id: Ia4ebe8bd310293da9e2af55fe253f0762807e88a Signed-off-by: Chris Kay <chris.kay@arm.com>
2020-10-02docs: Ensure Doxygen return values use referencesChris Kay
At present a lot of the code-base uses `\retval` commands to framework status codes but does not explicitly link to them. In some cases it's necessary to explicitly link to these status codes to have Doxygen generate a link to the relevant enumeration, and we can do this by prefixing the name with `::`. This style is already used in much of the code-base, so should not conflict with any existing styles. Change-Id: Ifc78eb425981bee3a01c791757a41a61c20e636c Signed-off-by: Chris Kay <chris.kay@arm.com>
2020-06-15cmn600: Fix incorrect cache group count calculationChris Kay
The CMN-600 module currently incorrectly calculates the HN-F cache group count for HN-F counts less than the number of HN-F entries per HN-F cache group. Change-Id: If840a78b8b70b1eb8b2b77768f4e95c0d8c369b3 Signed-off-by: Chris Kay <chris.kay@arm.com>
2020-06-09misc: Replace `fwk_assert(false)` with `fwk_unexpected()`Chris Kay
This commit replaces any calls to `fwk_assert(false)` with a call to `fwk_unexpected()`. Forced assertions are used for two different scenarios: - Unreachable code, which should use `fwk_unreachable()` - Code that should trap only in debug mode, which should use `fwk_unexpected()` `fwk_unexpected()` is the only one of these options with no side effects that did not already occur in the original code, so these assertions have been transformed to expectations. Some of these may, and should, be transformed later to unreachable code. Change-Id: I8325259b41a03a096b62a420bd0c7d52b025fcf4 Signed-off-by: Chris Kay <chris.kay@arm.com>
2020-06-09misc: Replace `assert()` calls with `fwk_assert()`Chris Kay
This commit replaces any call to `assert()` outside of the framework with a call to `fwk_assert()`. Change-Id: I83325af5892ac6b8b6b66a6586345d0988ca725e Signed-off-by: Chris Kay <chris.kay@arm.com>
2020-04-23cmn600: fix formatting of 64-bit valuesManoj Kumar
This patch fixes the formatting of 64-bit values to be printed as two 32-bit values as GCC PRIX64 modifier has issues printing 64-bit values. Change-Id: I77af00b2b4330254b2d71f3649646ae26da4a390 Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com>
2020-04-15cmn600: fix cal mode register programmingVijayenthiran Subramaniam
The RNSAM_SYS_CACHE_GRP_CAL_MODE register can be configured to setup the CAL mode for multiple System Cache Groups (SCG). But this register is inadvertently overwritten when programming CAL mode for a SCG region resulting in losing the CAL mode programming for other SCG regions. Fix this by ensuring that previously programmed values are not lost. Change-Id: I8087d16dc111e53c8c0f23c69a5537d4bddb9f50 Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
2020-03-24fwk: Integrate logging functionality into the frameworkChris Kay
This commit moves the message logging functionality, previously only available through the logging module, into the framework as a free-function interface. A number of improvements to this interface have been made, owing to the tighter integration this new interface has with the framework and its scheduler: - Simplistic synchronous logging can be enabled before the framework has fully initialized - Message logging may be filtered at preprocessing-time to reduce the size of the code and read-only data sections in the firmware binary - Logging is deprioritized at runtime to reduce response latency caused by logging to output devices Change-Id: I5112df359df8a304a176e68994e2408d91f6ac89 Signed-off-by: Chris Kay <chris.kay@arm.com>
2020-03-24fwk: Filter log messages by levelChris Kay
This commit introduces the ability to filter logs based on their criticality. Log messages that do not exceed the configured criticality are removed at preprocessing time. This, in turn, allows us to remove logging calls that do not meet the criticality requirement, reducing the size of the executable image and increasing the performance of release images. Change-Id: I56e14175b67a3e4e68fd03b8e457a802192898d1 Signed-off-by: Chris Kay <chris.kay@arm.com>
2020-03-24misc: Clean up include directivesChris Kay
This commit cleans up include directives across the project to reduce the number of implicit transitive dependencies in preparation for mass header changes in the logging patches later on. These changes were made using two tools: clang-include-fixer and include-what-you-use, which identify and remove headers that are unnecessary, and insert headers which are used but not referenced. Some manual tweaking was involved to handle special cases, like #ifdef'd includes. Includes have also been reordered and categorized according to their project locality, and non-module includes now use quotes rather than angle brackets. Change-Id: Id39dc473f44b73cb98f3b8949f9e768fd2ace6cd Signed-off-by: Chris Kay <chris.kay@arm.com>
2020-03-12fwk/fwk_mm_alloc: panic if memory allocation failedJim Quigley
Currently the framework will return NULL if the memory allocation fails. As the system will ultimately fail on receiving the error we could just panic instead, saving the memory used for the NULL checks. Change-Id: I731b87b7acb19d30df84936b07c76cbfe0d0726e Signed-off-by: Jim Quigley <jim.quigley@arm.com>
2020-03-12cmn600: fix host ha countVijayenthiran Subramaniam
Host HA count in the CCIX Host configuration data will be passed to the next stage of bootloader (typically UEFI) to help the CCIX configuration driver to start assigning the Remote AgentIDs. While calculating the RN-F count, Host HA count is incorrectly incremented resulting in wrong assignment of Remote AgentIDs. Due to this Remote RA to Remote HA memory test failed. Fix this by removing the incorrect increment of Host HA count while calculating RN-F count. While at it, remove a redundant comma when displaying the number of nodes discovered. Change-Id: I2a02035617ed4e0576fb05e41534edbf8e42b0a1 Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
2020-03-11ccix: change to CCUVChandni Cherukuri
Change the CCIX_VENDER_ID to a CCUV value. Change-Id: I061f7f980c5c1f7f81f484d087ff6d81136b466a Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
2020-02-27cmn600: use system info module to retrieve chip informationVijayenthiran Subramaniam
Commit 7acbd4d8fb4d ("cmn600: expose API to read chip information from platforms") introduced an api to obtain chip information in the cmn600 module. As the system info module provides a reusable and scalable interface to obtain system information, rework the cmn600 module to use the system_info module to obtain the chip id and multi-chip information and remove the chip info api in cmn600 and its implementation from the n1sdp system module. Change-Id: I2cfa45ba9bf4632f73bc021f4779f6bc2c96d93b Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
2020-01-28cmn600: ccix: add check for alignment of region base of CXRA SAMVijayenthiran Subramaniam
The region base of the CXRA SAM should be naturally aligned to the region size. Add assertion to verify this. Change-Id: I583edbe518b9f7f2370ebdd4021fe7867ede014a Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
2020-01-28cmn600: add check to validate the size of SAM configurationVijayenthiran Subramaniam
The size of the RN SAM, HN-F SAM and RA SAM should be a power of two. Add assertion to verify this. Change-Id: I1e54bab38bb5c2cb9b1ba94e44c63787085ff579 Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
2020-01-28cmn600: ccix: add support for smp modeVijayenthiran Subramaniam
Add support to verify if the CMN-600 hardware supports SMP mode (in case of revision r2p0) or enable SMP mode (in case of revision r3p0 and above). Change-Id: Id4975a0aa4febb7544670ed06422f2a58d30400e Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
2020-01-28cmn600: add support for HN-F with CALVijayenthiran Subramaniam
CMN-600 supports upto 64 HN-Fs from r2p0. This is enabled by pairing two HN-Fs at a crosspoint using CAL, supporting upto 32 CAL instances in a mesh. This patch adds support to enable or disable the use of HN-F CAL mode in RN-SAM programming. Change-Id: I606c2a54c50e12bfb195298e675ae1eb286544b2 Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
2020-01-28cmn600: add support to get revision numberVijayenthiran Subramaniam
CMN-600 supports several revisions ranging from r1p0 to r3p1 and each revision adds new features. CMN-600 has peripheral id register to retrieve the revision number. In order to enable features depending upon the revision, add support to retrieve the revision number from peripheral id register. Change-Id: I9f8647d3f5ee21a4b67ac9836f88ffbe600774f4 Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
2020-01-28cmn600: fix hased memory region calculation in sam programmingVijayenthiran Subramaniam
In SAM programming sequence, region count for the SYS_CACHE_GRP_REGION registers are not incremented. Having a second entry for SYS_CACHE_GRP_REGION register in config data might overwrite the existing entry or get programmed in a wrong region. To avoid this, use `region_sys_count` as counter for the entries going to SYS_CACHE_GRP_REGION register. This patch also adds bounds checking for the region count of hashed and non-hased memory regions. Change-Id: I32d0daf20790a91929c14285a42a03094a2eff6e Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
2020-01-28cmn600: ccix: improve agent_id and remote_agent_id calculationVijayenthiran Subramaniam
Improve agent_id's offset_id and remote_agent_id calculation to make it more generic for multi-chip scenario. Change-Id: I69347761d5e61a8c785e33dd0d32d5243bd98ca1 Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
2020-01-28cmn600: ccix: use name `rnf` for caching request agentsVijayenthiran Subramaniam
Currently remote caching request agent counts is named as `remote_ra_count`. To make it more explicit that it is a caching agent, rename as `remote_rnf_count`. Change-Id: I6dbbc9cd2ed2884d68fb1068cc031af98f0600f0 Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
2020-01-28cmn600: add rnf count to cmn600 contextVijayenthiran Subramaniam
Currently the RN-F count is considered equal to the total external RN-SAM count. This is done with an assumption that all the RN-F nodes in the mesh has no built-in SAM (RN-F ESAM type). If a mesh contains RN-F nodes with built-in SAM, then the RN-SAM corresponding to the RN-F will be discovered as internal RN-SAM. Add RN-F count as part of cmn600 context and use it in place of the external RN-SAM count. Change-Id: I9257e11b95b865eaf864ec8d9ba804c02e1ff2eb Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
2020-01-28cmn600: increase max ranage of HN-F, RN-D, RN-IVijayenthiran Subramaniam
CMN-600 controller with revision upto r1p3 supports a maximum of 32 HN-F, RN-D and RN-I. This patch fixes the maximum count of these components. Change-Id: Idd92a7f017beb05b1c58ab61f9c058dcf726ebe9 Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
2020-01-28cmn600: rename unique_ha_ldid_value to unique_remote_rnf_ldid_valueVijayenthiran Subramaniam
The cmn600 context member variable unique_ha_ldid_value is used to keep track of the unique LDID value of the remote caching agent (RN-F). Rename it to unique_remote_rnf_ldid_value to align with the purpose of the variable. This patch also removes the variable from the cmn600 context structure since it is been used only within the ccix_setup function. Change-Id: Ib44cad5671e9717469148cf1d9213ca3118cde1d Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
2020-01-28cmn600: improve cxla discovery logicVijayenthiran Subramaniam
There are two improvements that can be made to the existing CXLA node discovery procedure. First, the CXLA node id need not be passed through the config data. This was initially necessitated to avoid accessing the external CXLA node when it is not powered up. This can be improved by using the device type information from the cross point's (XP) port connect info register and skip over it during the discovery process and avoid having to provide the CXLA node id from the config data. Second, with the improved discovery logic, the external RN-SAM count is incremented only for the external child nodes which are discovered as RN-SAM device. With this, RN-F and host RA count need not be decreased by one. Change-Id: Ia870ac69045957215c7c2fdbce774a230e6fda00 Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
2020-01-28cmn600: ccix: remove rnsam setup for cxg_ra registerVijayenthiran Subramaniam
At the beginning of the ccix setup, RN-SAM setup function is called with the CXG-RA register. This is not required and doing so breaks the FVP platforms. This patch removes this function call. Change-Id: I98d1ced1c9e9ccdc93d23659ef002a7932c3c1bd Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
2020-01-28cmn600: include encoding bits while calculation x and y positionVijayenthiran Subramaniam
Depending upon the mesh size (X and Y dimensions), CMN-600 supports two different width for encoding the X and Y positions in the node id value. If both X and Y size of the mesh is equal or less than 4, 2 bits are used to encode the X and Y position in the node id. If X and Y size are between 5 and 8 included, 3 bits are used to encode. This is not considered while calculating the X and Y position from the node info value which leads to wrong values if the encoding bits are of size 3. This patch fixes the X and Y position calculation to include the encoding bits. Change-Id: I74ef3c39c4907f2a45aaf1023c981576f02c6539 Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
2020-01-22n1sdp: configure OptimizedTLP and Message PackingChandni Cherukuri
Presently, in the EndPoint device the Optimized TLP and message packing is set to TRUE always. This patch lets the host pass it's optimized TLP and message packing capability to the remote node. Change-Id: I33df32748c43659b5e93780f813dba1fd4fc61c5 Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
2020-01-22n1sdp: configure MaxPacketSize after negotiationChandni Cherukuri
Presently, the maxpacketsize in CMN-600 is hard-coded to 512. This patch lets the host send the maxpacketsize capability to the EndPoint device which decides the value after comparing the capabilities and passes that value to the Host. Host then uses this value to configure the maxpacketsize. Change-Id: I18705a482238631fa892bf014097febf5d7f04b1 Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
2020-01-22n1sdp: populate maximum credit send information in get_configChandni Cherukuri
This patch sends the maximum credit send capability of Host's memory request, snoop and data credits to the remote node which is required for configuring credits in the End Point device. Change-Id: Ic76363a80edcf18dc9ee126824c422df51c3155d Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
2020-01-06misc: Restore copyright start dateChris Kay
The previous commit lost the start date of some of the copyright headers, so this commit restores them. Change-Id: Id3d87ddaf382d3151118a1c2ba51c56fdfdc00ea Signed-off-by: Chris Kay <chris.kay@arm.com>
2020-01-03scp: Update copyright to 2020Nicola Mazzucato
All the relevant headers in files have been updated to 2020. Change-Id: I8ef14a4c87b65c87933ef79697dcb5fc5dda87d4 Signed-off-by: Nicola Mazzucato <nicola.mazzucato@arm.com>
2019-12-02modules: Remove calls to fwk_module_check_callTarek El-Sherbiny
This change is to reduce memory footprint. Change-Id: I1d10681b3cdf28520b45a698ed607cca4df39b65 Signed-off-by: Tarek El-Sherbiny <tarek.el-sherbiny@arm.com>
2019-11-21n1sdp: fix host_ra_count which gets passed to End PointChandni Cherukuri
Number of Host RA has been modified to include RN-D's as also Requesting Agents. Modify the host_ra_count to pass the correct information for Endpoint programming. Also, there can be topologies where external RNSAM count is 0. So remove the check for external_rnsam_count. Change-Id: I1ddcb39391e095ca1e2445d9ebea32437091fcb5 Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
2019-11-13misc: Correct undefined behavior on bitshift errorRaphael Gault
While running cppcheck static analysis on the code base, two undefined behaviour errors were detected due to bitshift. This patch corrects them. Change-Id: I5cba7e0293a97c56be38e9cc3def35c9dfa67bb2 Signed-off-by: Raphael Gault <raphael.gault@arm.com>
2019-10-18cmn600: update RN-SAM programming based on chip IDManoj Kumar
This patch makes all RN-SAM and HN-F SAM programming base addresses based on chip ID value. Change-Id: I750bb0dfa615294a24813bfd6c3ca76a7af72969 Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com>
2019-10-18cmn600: fix CCIX programming to support multichip use caseManoj Kumar
The CCIX programming sequence currently supports only CCIX accelerator use case configuration. This patch adds support for configuring multichip use case along with accelerator. Change-Id: Ied410f191d777c7218281a23f87159ba1b6b14f2 Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com>
2019-10-18cmn600: add DVM domain entry API for multichip use caseManoj Kumar
DVM domain entry in CXRA is required for SMP boot on multichip using CMN-600. This patch adds support for DVM domain entry API. Change-Id: I1e4469e725f4915a61f41bbd561e0953f8ed4c15 Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com>
2019-10-18cmn600: expose API to read chip information from platformsManoj Kumar
CMN-600 supports multichip operation and for configuring the routing tables it requires the chip ID information from the platform as routing differs based on chip ID. This patch exposes a common API type which can be implemented in platform modules to retrieve the information. The module ID and API ID where the API is implemented is passed as config parameter to CMN-600. For N1SDP platform it implements the API in n1sdp_system module for getting the chip ID. For SGI575 & RDN1E1 platforms it leaves the module ID and API ID as FWK_ID_NONE in config_cmn600.c in respective platforms so that the API can be implemented in platform specific way. Change-Id: I96867c6cd18621fbc9ea4eccddcce0ace535d2c2 Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com>
2019-09-24build: enhance entry guards in internal header filesEtienne Carriere
Add prefix INTERNAL_ to defined macro for internal header file. This change prevents an internal/foo.h from obscuring generic foo.h because former and later both guards from #ifndef FOO_H #define FOO_H (...) #endif /*FOO_H*/ As internal/*.h are included with #include <internal/*.h>, INTERNAL_ looks a generic enough prefix. Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2019-09-12fwk: Rename fwk_errno.h to fwk_status.hNicola Mazzucato
This patch renames the header file for the return values to fwk_status.h. This is to reflect the recent addition of positive values that do not fall into the error category. Change-Id: I283b945c39d3ad31702db0dc7687dbe99e81ed19 Signed-off-by: Nicola Mazzucato <nicola.mazzucato@arm.com>
2019-09-04cmn600: add non-hash region to be programmed in SYSCACHE registersManoj Kumar
This patch adds a new memory region called 'System Cache Non-Hash' which is a non-hashed memory region to be programmed in SYSCACHE region registers. Change-Id: I7acf9d2a6c3eeba241ce3e281a80815bd4e5abaa Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com>
2019-09-04cmn600: fix HN-F, RN-D & RN-I offset storing logicManoj Kumar
HN-F, RN-D, RN-I count variables are incremented during MAX check stage which is incorrect as the offsets will be stored in the second index and last node's offset will never be stored. This patch fixes the increment/offset storage logic. Change-Id: I4b80da57aecb7653da7e70ce0e042ae6d17925d2 Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com>
2019-07-16cmn600: Add the ccix programming for cmn600Deepak Pandey
The patch introduces the ccix programming so that host could communicate with the CCIX complaint endpoint. Currently it is being verified with the Xilinx Alveo-U280 production card Change-Id: I07ed1f7eb1c8ae6eb58b1c168b9ee144c1a7020a Signed-off-by: Deepak Pandey <Deepak.Pandey@arm.com>
2019-07-02Doxygen : remove \param for non-existent parameterBrett Warren
Change-Id: I75351f0fe30e9e7e1189c92dd217f261587f0894 Signed-off-by: Brett Warren <brett.warren@arm.com>
2019-07-02Doxygen : Expand Doxygen use of \param [out]Brett Warren
All \param tags in scp_v2/module, scp_v2/framework, and scp_v2/product have been checked to add [out] where suitable Change-Id: I3bd2a0973746ced6a331765e4ad73205cef1a8e1 Signed-off-by: Brett Warren <brett.warren@arm.com>
2019-03-08cmn600: Stop checking type of external nodesChris Kay
Registers belonging to external nodes cannot be accessed if the power domain that the node belongs to is not on. We therefore need to avoid calling `get_node_type()` on external nodes, as doing so will fail. Change-Id: Iac405c9f4c7095018cfec79185e6b84dece81e73 Signed-off-by: Chris Kay <chris.kay@arm.com>
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