diff options
| author | Usama Arif <usama.arif@arm.com> | 2020-04-28 17:24:35 +0100 |
|---|---|---|
| committer | jimqui01 <54316584+jimqui01@users.noreply.github.com> | 2020-05-26 16:02:19 +0100 |
| commit | 2d21f13a39daa6053beb7773b40c90efff8a456e (patch) | |
| tree | 94507a950591f5d5fa9e31822251cfb639ded155 /product/tc0/include/scp_soc_mmap.h | |
| parent | deb6138c6ece4e2275f80cf85a0ff068cd6fd389 (diff) | |
product/tc0: add clock entries for DPU
This involves defining the css, pik and system_pll clock entries
for DPU, PIXEL_0 and PIXEL_1 as well as DPU pik register definitions
used by those clocks.
Change-Id: Id836c5e25eaf9816ed27d10eb51cff9d9580bb15
Signed-off-by: Usama Arif <usama.arif@arm.com>
Diffstat (limited to 'product/tc0/include/scp_soc_mmap.h')
| -rw-r--r-- | product/tc0/include/scp_soc_mmap.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/product/tc0/include/scp_soc_mmap.h b/product/tc0/include/scp_soc_mmap.h index 9cf53d53..e59924c3 100644 --- a/product/tc0/include/scp_soc_mmap.h +++ b/product/tc0/include/scp_soc_mmap.h @@ -13,6 +13,9 @@ #define SCP_PLL_BASE (SCP_SOC_EXPANSION3_BASE + 0x03000000) #define SCP_PLL_SYSPLL (SCP_PLL_BASE + 0x00000000) +#define SCP_PLL_DISPLAY (SCP_PLL_BASE + 0x00000014) +#define SCP_PLL_PIX0 (SCP_PLL_BASE + 0x00000018) +#define SCP_PLL_PIX1 (SCP_PLL_BASE + 0x0000001C) #define SCP_PLL_INTERCONNECT (SCP_PLL_BASE + 0x00000020) #define SCP_PLL_CPU0 (SCP_PLL_BASE + 0x00000100) |