sds: Add support for having multiple SDS regions

Update the SDS internal functions to use more than one region (e.g. when
creating or accessing an SDS structure) while keeping this multi-region
layer invisible to the calling code (which relies on SDS structure IDs,
exclusively).

Update the module configuration code (incl. configuration data
structures and types and handlers for the framework API).

Update the platform-specific SDS configuration code to comply with the
changes described above.

Change-Id: Ic5669000e3f44797f373e94dd143bf2d87564b51
Signed-off-by: Pierre-Clément Tosi <pierre-clement.tosi@arm.com>
Signed-off-by: Girish Pathak <girish.pathak@arm.com>

4 files changed, 52 insertions, 14 deletions

diff --git a/product/sgm775/include/sgm775_sds.h b/product/sgm775/include/sgm775_sds.h
index 07eab286..e21cc07c 100644
--- a/product/sgm775/include/sgm775_sds.h
+++ b/product/sgm775/include/sgm775_sds.h
@@ -25,6 +25,11 @@ enum sgm775_sds_struct_id {
     SGM775_SDS_BOOTLOADER =           9 | (1 << MOD_SDS_ID_VERSION_MAJOR_POS),
 };
 
+enum sgm775_sds_region_idx {
+    SGM775_SDS_REGION_SECURE,
+    SGM775_SDS_REGION_COUNT,
+};
+
 /*
  * Structure sizes.
  */
diff --git a/product/sgm775/include/software_mmap.h b/product/sgm775/include/software_mmap.h
index 0c21ec8e..9f79c53e 100644
--- a/product/sgm775/include/software_mmap.h
+++ b/product/sgm775/include/software_mmap.h
@@ -64,8 +64,8 @@
 #define SHARED_SECURE_SIZE (4 * FWK_KIB)
 
 /* SDS Memory Region */
-#define SDS_MEM_BASE (SHARED_SECURE_BASE)
-#define SDS_MEM_SIZE (3520)
+#define SDS_SECURE_BASE (SHARED_SECURE_BASE)
+#define SDS_SECURE_SIZE (3520)
 
 /* AP Context Area */
 #define AP_CONTEXT_BASE (SHARED_SECURE_BASE + SHARED_SECURE_SIZE - \
@@ -74,7 +74,7 @@
 
 /* SCMI Secure Payload Areas */
 #define SCMI_PAYLOAD_SIZE       (128)
-#define SCMI_PAYLOAD_S_A2P_BASE (SDS_MEM_BASE + SDS_MEM_SIZE)
+#define SCMI_PAYLOAD_S_A2P_BASE (SDS_SECURE_BASE + SDS_SECURE_SIZE)
 #define SCMI_PAYLOAD_S_P2A_BASE (SCMI_PAYLOAD_S_A2P_BASE + SCMI_PAYLOAD_SIZE)
 
 /*
diff --git a/product/sgm775/scp_ramfw/config_sds.c b/product/sgm775/scp_ramfw/config_sds.c
index fdb294bb..440db253 100644
--- a/product/sgm775/scp_ramfw/config_sds.c
+++ b/product/sgm775/scp_ramfw/config_sds.c
@@ -8,6 +8,7 @@
 #include "clock_devices.h"
 #include "sgm775_mmap.h"
 #include "sgm775_sds.h"
+#include "software_mmap.h"
 
 #include <mod_sds.h>
 
@@ -24,12 +25,22 @@
 static const uint32_t feature_flags = 0x00000000;
 static const uint32_t version_packed = FWK_BUILD_VERSION;
 
-const struct mod_sds_config sds_module_config = {
-    .region_base_address = TRUSTED_RAM_BASE,
-    .region_size = 3520,
-    .clock_id = FWK_ID_ELEMENT_INIT(
-                    FWK_MODULE_IDX_CLOCK,
-                    CLOCK_DEV_IDX_FCMCLK),
+static const struct mod_sds_region_desc sds_module_regions[] = {
+    [SGM775_SDS_REGION_SECURE] = {
+        .base = (void*)SDS_SECURE_BASE,
+        .size = SDS_SECURE_SIZE,
+    },
+};
+
+static_assert(FWK_ARRAY_SIZE(sds_module_regions) == SGM775_SDS_REGION_COUNT,
+              "Mismatch between number of SDS regions and number of regions "
+              "provided by the SDS configuration.");
+
+static const struct mod_sds_config sds_module_config = {
+    .regions = sds_module_regions,
+    .region_count = SGM775_SDS_REGION_COUNT,
+    .clock_id = FWK_ID_ELEMENT_INIT(FWK_MODULE_IDX_CLOCK,
+                                    CLOCK_DEV_IDX_FCMCLK),
 };
 
 static const struct fwk_element sds_element_table[] = {
@@ -39,6 +50,7 @@ static const struct fwk_element sds_element_table[] = {
             .id = SGM775_SDS_RAM_VERSION,
             .size = SGM775_SDS_RAM_VERSION_SIZE,
             .payload = &version_packed,
+            .region_id = SGM775_SDS_REGION_SECURE,
             .finalize = true,
         }),
     },
@@ -48,6 +60,7 @@ static const struct fwk_element sds_element_table[] = {
             .id = SGM775_SDS_FEATURE_AVAILABILITY,
             .size = sizeof(feature_flags),
             .payload = &feature_flags,
+            .region_id = SGM775_SDS_REGION_SECURE,
             .finalize = false,
         }),
     },
diff --git a/product/sgm775/scp_romfw/config_sds.c b/product/sgm775/scp_romfw/config_sds.c
index 1a822bad..1c85bb2c 100644
--- a/product/sgm775/scp_romfw/config_sds.c
+++ b/product/sgm775/scp_romfw/config_sds.c
@@ -12,6 +12,7 @@
 #include "sgm775_sds.h"
 #include "sgm775_ssc.h"
 #include "system_mmap.h"
+#include "software_mmap.h"
 
 #include <mod_sds.h>
 
@@ -25,13 +26,24 @@
 #include <stdbool.h>
 #include <stdint.h>
 
+static const struct mod_sds_region_desc sds_module_regions[] = {
+    [SGM775_SDS_REGION_SECURE] = {
+        .base = (void*)SDS_SECURE_BASE,
+        .size = SDS_SECURE_SIZE,
+    },
+};
+
+static_assert(FWK_ARRAY_SIZE(sds_module_regions) == SGM775_SDS_REGION_COUNT,
+              "Mismatch between number of SDS regions and number of regions "
+              "provided by the SDS configuration.");
+
 static const struct mod_sds_config sds_module_config = {
-    .region_base_address = TRUSTED_RAM_BASE,
-    .region_size = 3520,
-    .clock_id = FWK_ID_ELEMENT_INIT(
-                    FWK_MODULE_IDX_CLOCK,
-                    CLOCK_DEV_IDX_SYS_FCMCLK),
+    .regions = sds_module_regions,
+    .region_count = SGM775_SDS_REGION_COUNT,
+    .clock_id = FWK_ID_ELEMENT_INIT(FWK_MODULE_IDX_CLOCK,
+                                    CLOCK_DEV_IDX_SYS_FCMCLK),
 };
+
 static const uint32_t version_packed = FWK_BUILD_VERSION;
 static struct sgm775_sds_platid platid;
 
@@ -41,6 +53,7 @@ static const struct fwk_element sds_element_table[] = {
         .data = &((struct mod_sds_structure_desc) {
             .id = SGM775_SDS_CPU_INFO,
             .size = SGM775_SDS_CPU_INFO_SIZE,
+            .region_id = SGM775_SDS_REGION_SECURE,
             .finalize = true,
         }),
     },
@@ -50,6 +63,7 @@ static const struct fwk_element sds_element_table[] = {
             .id = SGM775_SDS_ROM_VERSION,
             .size = SGM775_SDS_ROM_VERSION_SIZE,
             .payload = &version_packed,
+            .region_id = SGM775_SDS_REGION_SECURE,
             .finalize = true,
         }),
     },
@@ -59,6 +73,7 @@ static const struct fwk_element sds_element_table[] = {
             .id = SGM775_SDS_PLATFORM_ID,
             .size = SGM775_SDS_PLATFORM_ID_SIZE,
             .payload = &platid,
+            .region_id = SGM775_SDS_REGION_SECURE,
             .finalize = true,
         }),
     },
@@ -68,6 +83,7 @@ static const struct fwk_element sds_element_table[] = {
             .id = SGM775_SDS_RESET_SYNDROME,
             .size = SGM775_SDS_RESET_SYNDROME_SIZE,
             .payload = (void *)(&PIK_SCP->RESET_SYNDROME),
+            .region_id = SGM775_SDS_REGION_SECURE,
             .finalize = true,
         }),
     },
@@ -76,6 +92,7 @@ static const struct fwk_element sds_element_table[] = {
         .data = &((struct mod_sds_structure_desc) {
             .id = SGM775_SDS_BOOTLOADER,
             .size = SGM775_SDS_BOOTLOADER_SIZE,
+            .region_id = SGM775_SDS_REGION_SECURE,
             .finalize = true,
         }),
     },
@@ -84,6 +101,7 @@ static const struct fwk_element sds_element_table[] = {
         .data = &((struct mod_sds_structure_desc) {
             .id = SGM775_SDS_FEATURE_AVAILABILITY,
             .size = SGM775_SDS_FEATURE_AVAILABILITY_SIZE,
+            .region_id = SGM775_SDS_REGION_SECURE,
             .finalize = true,
         }),
     },
@@ -93,6 +111,7 @@ static const struct fwk_element sds_element_table[] = {
         .data = &((struct mod_sds_structure_desc) {
             .id = SGM775_SDS_CPU_BOOTCTR,
             .size = SGM775_SDS_CPU_BOOTCTR_SIZE,
+            .region_id = SGM775_SDS_REGION_SECURE,
             .finalize = true,
         }),
     },
@@ -101,6 +120,7 @@ static const struct fwk_element sds_element_table[] = {
         .data = &((struct mod_sds_structure_desc) {
             .id = SGM775_SDS_CPU_FLAGS,
             .size = SGM775_SDS_CPU_FLAGS_SIZE,
+            .region_id = SGM775_SDS_REGION_SECURE,
             .finalize = true,
         }),
     },