diff options
| author | Chris Kay <chris.kay@arm.com> | 2020-01-10 14:55:16 +0000 |
|---|---|---|
| committer | jimqui01 <54316584+jimqui01@users.noreply.github.com> | 2020-03-24 17:44:33 +0000 |
| commit | 2045eb2c129f173b4ab5c36ca37ae5109e92c007 (patch) | |
| tree | f08350c9c603dfd1568bc0956cbb1177e5b8427d /product/rdn1e1 | |
| parent | fad4a67f28baa733de80434f1414b8129217ec1d (diff) | |
fwk: Enable thread stack size configurability
This commit increases the default stack size for threads to 1KiB and
allows it to be overridden by the firmware through the
`FIRMWARE_STACK_SIZE` definition.
Some firmware configurations did already configure this definition, but
it was a no-op before this commit.
Change-Id: Iaf11a2a3222e7db9e1014ea6dc3e734df40b6582
Signed-off-by: Chris Kay <chris.kay@arm.com>
Diffstat (limited to 'product/rdn1e1')
| -rw-r--r-- | product/rdn1e1/mcp_romfw/fmw_memory.h | 2 | ||||
| -rw-r--r-- | product/rdn1e1/scp_ramfw/fmw_memory.h | 2 | ||||
| -rw-r--r-- | product/rdn1e1/scp_romfw/fmw_memory.h | 2 |
3 files changed, 0 insertions, 6 deletions
diff --git a/product/rdn1e1/mcp_romfw/fmw_memory.h b/product/rdn1e1/mcp_romfw/fmw_memory.h index 54f71402..674840ac 100644 --- a/product/rdn1e1/mcp_romfw/fmw_memory.h +++ b/product/rdn1e1/mcp_romfw/fmw_memory.h @@ -27,6 +27,4 @@ #define FIRMWARE_MEM1_SIZE MCP_RAM1_SIZE #define FIRMWARE_MEM1_BASE MCP_RAM1_BASE -#define FIRMWARE_STACK_SIZE (1 * 1024) - #endif /* FMW_MEMORY_H */ diff --git a/product/rdn1e1/scp_ramfw/fmw_memory.h b/product/rdn1e1/scp_ramfw/fmw_memory.h index 73d2e047..c2394e4d 100644 --- a/product/rdn1e1/scp_ramfw/fmw_memory.h +++ b/product/rdn1e1/scp_ramfw/fmw_memory.h @@ -27,6 +27,4 @@ #define FIRMWARE_MEM1_SIZE SCP_RAM1_SIZE #define FIRMWARE_MEM1_BASE SCP_RAM1_BASE -#define FIRMWARE_STACK_SIZE (1 * 1024) - #endif /* FMW_MEMORY_H */ diff --git a/product/rdn1e1/scp_romfw/fmw_memory.h b/product/rdn1e1/scp_romfw/fmw_memory.h index 246b8d9e..d9e0c405 100644 --- a/product/rdn1e1/scp_romfw/fmw_memory.h +++ b/product/rdn1e1/scp_romfw/fmw_memory.h @@ -27,6 +27,4 @@ #define FIRMWARE_MEM1_SIZE SCP_RAM1_SIZE #define FIRMWARE_MEM1_BASE SCP_RAM1_BASE -#define FIRMWARE_STACK_SIZE (1 * 1024) - #endif /* FMW_MEMORY_H */ |