diff options
| author | Aditya Angadi <aditya.angadi@arm.com> | 2020-01-27 09:29:46 +0530 |
|---|---|---|
| committer | jimqui01 <54316584+jimqui01@users.noreply.github.com> | 2020-02-05 18:37:04 +0000 |
| commit | 2d55839b78cf347397c91acae82262cde2f7d428 (patch) | |
| tree | e9de85ce79953cf6a5e26ed935d9c93629271679 /product/rddaniel | |
| parent | b5172235dffdf4610e8f283186b7620f43854d07 (diff) | |
product/rddaniel: add build support for scp ram firmware
Add the makefile to build the RAM firmware and the corresponding linker
script.
Change-Id: I4da44d511d23269f38494553b1b86d2a93b446d5
Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
Diffstat (limited to 'product/rddaniel')
| -rw-r--r-- | product/rddaniel/include/scp_software_mmap.h | 1 | ||||
| -rw-r--r-- | product/rddaniel/scp_ramfw/firmware.mk | 61 | ||||
| -rw-r--r-- | product/rddaniel/scp_ramfw/fmw_memory.ld.S | 33 |
3 files changed, 95 insertions, 0 deletions
diff --git a/product/rddaniel/include/scp_software_mmap.h b/product/rddaniel/include/scp_software_mmap.h index 33a1c357..08c00bba 100644 --- a/product/rddaniel/include/scp_software_mmap.h +++ b/product/rddaniel/include/scp_software_mmap.h @@ -14,6 +14,7 @@ /* SCP ROM and RAM firmware size loaded on main memory */ #define SCP_BOOT_ROM_SIZE (64 * 1024) #define SCP_DTC_RAM_SIZE (256 * 1024) +#define SCP_ITC_RAM_SIZE (256 * 1024) /* SCP RAM firmware base and size on the flash */ #define SCP_RAMFW_IMAGE_FLASH_BASE (SCP_NOR0_FLASH_BASE + 0x03D80000) diff --git a/product/rddaniel/scp_ramfw/firmware.mk b/product/rddaniel/scp_ramfw/firmware.mk new file mode 100644 index 00000000..ec666025 --- /dev/null +++ b/product/rddaniel/scp_ramfw/firmware.mk @@ -0,0 +1,61 @@ +# +# Arm SCP/MCP Software +# Copyright (c) 2020, Arm Limited and Contributors. All rights reserved. +# +# SPDX-License-Identifier: BSD-3-Clause +# + +BS_FIRMWARE_CPU := cortex-m7 +BS_FIRMWARE_HAS_MULTITHREADING := yes +BS_FIRMWARE_HAS_NOTIFICATION := yes +BS_FIRMWARE_NOTIFICATION_COUNT := 128 + +BS_FIRMWARE_MODULES := \ + armv7m_mpu \ + sid \ + pcid \ + pl011 \ + log \ + ppu_v1 \ + system_power \ + mhu2 \ + smt \ + scmi \ + sds \ + system_pll \ + pik_clock \ + css_clock \ + clock \ + gtimer \ + timer \ + apcontext \ + power_domain \ + scmi_power_domain \ + scmi_system_power \ + cmn_rhodes \ + rddaniel_system + +BS_FIRMWARE_SOURCES := \ + config_system_power.c \ + config_sid.c \ + rtx_config.c \ + config_armv7m_mpu.c \ + config_pl011.c \ + config_log.c \ + config_power_domain.c \ + config_ppu_v1.c \ + config_mhu2.c \ + config_smt.c \ + config_scmi.c \ + config_sds.c \ + config_timer.c \ + config_gtimer.c \ + config_cmn_rhodes.c \ + config_scmi_system_power.c \ + config_system_pll.c \ + config_pik_clock.c \ + config_css_clock.c \ + config_clock.c \ + config_apcontext.c + +include $(BS_DIR)/firmware.mk diff --git a/product/rddaniel/scp_ramfw/fmw_memory.ld.S b/product/rddaniel/scp_ramfw/fmw_memory.ld.S new file mode 100644 index 00000000..5c4568c9 --- /dev/null +++ b/product/rddaniel/scp_ramfw/fmw_memory.ld.S @@ -0,0 +1,33 @@ +/* + * Arm SCP/MCP Software + * Copyright (c) 2020, Arm Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + * + * Description: + * RAM firmware memory layout for the linker script. + */ + +#ifndef FMW_MEMORY_LD_S +#define FMW_MEMORY_LD_S + +#include <scp_mmap.h> +#include <scp_software_mmap.h> + +#define FIRMWARE_MEM_MODE FWK_MEM_MODE_DUAL_REGION_RELOCATION + +/* + * RAM instruction memory + */ +#define FIRMWARE_MEM0_SIZE SCP_ITC_RAM_SIZE +#define FIRMWARE_MEM0_BASE SCP_ITC_RAM_BASE + +/* + * RAM data memory + */ +#define FIRMWARE_MEM1_SIZE SCP_DTC_RAM_SIZE +#define FIRMWARE_MEM1_BASE SCP_DTC_RAM_BASE + +#define FIRMWARE_STACK_SIZE (1 * 1024) + +#endif /* FMW_MEMORY_LD_S */ |