product/rddaniel: add support for MCP firmware in rddaniel

MCP ROM and RAM firmware, does not provide any specific functionality
yet. MCP ROM firmware loads the MCP RAM firmware which then executes
a WFI to enter idle state.

Change-Id: I569b7e06c8bb66f24fb1f16e6ae2f1fb63dcf306
Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>

7 files changed, 184 insertions, 0 deletions

diff --git a/product/rddaniel/include/mcp_rddaniel_mmap.h b/product/rddaniel/include/mcp_rddaniel_mmap.h
new file mode 100644
index 00000000..efe56732
--- /dev/null
+++ b/product/rddaniel/include/mcp_rddaniel_mmap.h
@@ -0,0 +1,23 @@
+/*
+ * Arm SCP/MCP Software
+ * Copyright (c) 2020, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef MCP_RDDANIEL_MMAP_H
+#define MCP_RDDANIEL_MMAP_H
+
+#include <stdint.h>
+
+/*
+ * Top-level base addresses
+ */
+#define MCP_PERIPH_BASE               UINT32_C(0x4C000000)
+
+/*
+ * Peripherals
+ */
+#define MCP_UART0_BASE                (MCP_PERIPH_BASE + 0x2000)
+
+#endif /* MCP_RDDANIEL_MMAP_H */
diff --git a/product/rddaniel/include/mcp_software_mmap.h b/product/rddaniel/include/mcp_software_mmap.h
new file mode 100644
index 00000000..4b2a070f
--- /dev/null
+++ b/product/rddaniel/include/mcp_software_mmap.h
@@ -0,0 +1,19 @@
+/*
+ * Arm SCP/MCP Software
+ * Copyright (c) 2020, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef MCP_RDDANIEL_MMAP_MCP_H
+#define MCP_RDDANIEL_MMAP_MCP_H
+
+#define MCP_ROM_BASE            0x00000000
+#define MCP_RAM0_BASE           0x00800000
+#define MCP_RAM1_BASE           0x20000000
+
+#define MCP_ROM_SIZE            (64 * 1024)
+#define MCP_RAM0_SIZE           (64 * 1024)
+#define MCP_RAM1_SIZE           (64 * 1024)
+
+#endif /* MCP_RDDANIEL_MMAP_MCP_H */
diff --git a/product/rddaniel/mcp_romfw/config_clock.c b/product/rddaniel/mcp_romfw/config_clock.c
new file mode 100644
index 00000000..4afc1846
--- /dev/null
+++ b/product/rddaniel/mcp_romfw/config_clock.c
@@ -0,0 +1,10 @@
+/*
+ * Arm SCP/MCP Software
+ * Copyright (c) 2020, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <fwk_module.h>
+
+const struct fwk_module_config config_clock = { 0 };
diff --git a/product/rddaniel/mcp_romfw/config_log.c b/product/rddaniel/mcp_romfw/config_log.c
new file mode 100644
index 00000000..4c9ed6a5
--- /dev/null
+++ b/product/rddaniel/mcp_romfw/config_log.c
@@ -0,0 +1,58 @@
+/*
+ * Arm SCP/MCP Software
+ * Copyright (c) 2020, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <fwk_banner.h>
+#include <fwk_macros.h>
+#include <fwk_module.h>
+#include <fwk_module_idx.h>
+#include <mod_log.h>
+#include <mod_pl011.h>
+#include <mcp_rddaniel_mmap.h>
+
+/*
+ * PL011 module
+ */
+static const struct fwk_element pl011_element_desc_table[] = {
+    [0] = {
+        .name = "uart0",
+        .data = &((struct mod_pl011_device_config) {
+            .reg_base = MCP_UART0_BASE,
+            .baud_rate_bps = 115200,
+            .clock_rate_hz = 24 * FWK_MHZ,
+            .clock_id = FWK_ID_NONE_INIT,
+            }),
+    },
+    [1] = { 0 },
+};
+
+static const struct fwk_element *get_pl011_table(fwk_id_t module_id)
+{
+    return pl011_element_desc_table;
+}
+
+struct fwk_module_config config_pl011 = {
+    .get_element_table = get_pl011_table,
+};
+
+/*
+ * Log module
+ */
+static const struct mod_log_config log_data = {
+    .device_id = FWK_ID_ELEMENT_INIT(FWK_MODULE_IDX_PL011, 0),
+    .api_id = FWK_ID_API_INIT(FWK_MODULE_IDX_PL011, 0),
+    .log_groups = MOD_LOG_GROUP_ERROR |
+                  MOD_LOG_GROUP_INFO |
+                  MOD_LOG_GROUP_WARNING |
+                  MOD_LOG_GROUP_DEBUG,
+    .banner = FWK_BANNER_MCP
+              FWK_BANNER_ROM_FIRMWARE
+              BUILD_VERSION_DESCRIBE_STRING "\n",
+};
+
+struct fwk_module_config config_log = {
+    .data = &log_data,
+};
diff --git a/product/rddaniel/mcp_romfw/config_rddaniel_rom.c b/product/rddaniel/mcp_romfw/config_rddaniel_rom.c
new file mode 100644
index 00000000..80114de2
--- /dev/null
+++ b/product/rddaniel/mcp_romfw/config_rddaniel_rom.c
@@ -0,0 +1,17 @@
+/*
+ * Arm SCP/MCP Software
+ * Copyright (c) 2020, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <fwk_module.h>
+#include <mod_mscp_rom.h>
+#include <mcp_software_mmap.h>
+
+const struct fwk_module_config config_mscp_rom = {
+    .data = &((struct mscp_rom_config) {
+        .ramfw_ram_base = MCP_RAM0_BASE,
+        .ramfw_flash_size = 0,
+    })
+};
diff --git a/product/rddaniel/mcp_romfw/firmware.mk b/product/rddaniel/mcp_romfw/firmware.mk
new file mode 100644
index 00000000..33f74f4a
--- /dev/null
+++ b/product/rddaniel/mcp_romfw/firmware.mk
@@ -0,0 +1,25 @@
+#
+# Arm SCP/MCP Software
+# Copyright (c) 2020, Arm Limited and Contributors. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
+BS_FIRMWARE_CPU := cortex-m7
+BS_FIRMWARE_HAS_MULTITHREADING := no
+BS_FIRMWARE_HAS_NOTIFICATION := yes
+BS_FIRMWARE_MODULE_HEADERS_ONLY := \
+    power_domain
+
+BS_FIRMWARE_MODULES := \
+    pl011 \
+    log \
+    clock \
+    mscp_rom
+
+BS_FIRMWARE_SOURCES := \
+    config_log.c \
+    config_clock.c \
+    config_rddaniel_rom.c
+
+include $(BS_DIR)/firmware.mk
diff --git a/product/rddaniel/mcp_romfw/fmw_memory.ld.S b/product/rddaniel/mcp_romfw/fmw_memory.ld.S
new file mode 100644
index 00000000..5d32c41e
--- /dev/null
+++ b/product/rddaniel/mcp_romfw/fmw_memory.ld.S
@@ -0,0 +1,32 @@
+/*
+ * Arm SCP/MCP Software
+ * Copyright (c) 2020, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Description:
+ *     ROM firmware memory layout for the linker script.
+ */
+
+#ifndef FMW_MEMORY_LD_S
+#define FMW_MEMORY_LD_S
+
+#include <mcp_software_mmap.h>
+
+#define FIRMWARE_MEM_MODE FWK_MEM_MODE_DUAL_REGION_RELOCATION
+
+/*
+ * ROM memory
+ */
+#define FIRMWARE_MEM0_SIZE  MCP_ROM_SIZE
+#define FIRMWARE_MEM0_BASE  MCP_ROM_BASE
+
+/*
+ * RAM memory
+ */
+#define FIRMWARE_MEM1_SIZE  MCP_RAM1_SIZE
+#define FIRMWARE_MEM1_BASE  MCP_RAM1_BASE
+
+#define FIRMWARE_STACK_SIZE (1 * 1024)
+
+#endif /* FMW_MEMORY_LD_S */