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authorAnurag Koul <anurag.koul@arm.com>2020-06-09 18:48:43 +0100
committerjimqui01 <54316584+jimqui01@users.noreply.github.com>2020-09-15 17:03:53 +0100
commit95c692690cb068391aede84bea094b93c2ebb6d6 (patch)
tree6b29f603f93b885209ca5e0c79661be9c892d188 /product/morello
parenta4fb7879fe37934f35eac269b58a1a53c8787c0e (diff)
morello/module: add morello_rom module
This module performs first level of firmware capsule image parsing - fetches the RAM firmware, copies it to the appropriate memory locations, and passes on the control to it. Change-Id: I8c7828a46ac11f77ec207743bd03bf8e2287b777 Signed-off-by: Anurag Koul <anurag.koul@arm.com> Co-authored-by: Manoj Kumar <manoj.kumar3@arm.com>
Diffstat (limited to 'product/morello')
-rw-r--r--product/morello/module/morello_rom/include/mod_morello_rom.h44
-rw-r--r--product/morello/module/morello_rom/src/Makefile11
-rw-r--r--product/morello/module/morello_rom/src/mod_morello_rom.c162
-rw-r--r--product/morello/scp_romfw/config_morello_rom.c20
4 files changed, 237 insertions, 0 deletions
diff --git a/product/morello/module/morello_rom/include/mod_morello_rom.h b/product/morello/module/morello_rom/include/mod_morello_rom.h
new file mode 100644
index 00000000..03f2692b
--- /dev/null
+++ b/product/morello/module/morello_rom/include/mod_morello_rom.h
@@ -0,0 +1,44 @@
+/*
+ * Arm SCP/MCP Software
+ * Copyright (c) 2020, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef MOD_MORELLO_ROM_H
+#define MOD_MORELLO_ROM_H
+
+#include <mod_fip.h>
+
+#include <stdint.h>
+
+/*!
+ * \addtogroup GroupMORELLOModule MORELLO Product Modules
+ * @{
+ */
+
+/*!
+ * \defgroup GroupMORELLORom MORELLO SCP ROM Support
+ * @{
+ */
+
+/*!
+ * \brief Module configuration data.
+ */
+struct morello_rom_config {
+ /*! Base address of the RAM to which SCP BL2 will be copied to */
+ const uintptr_t ramfw_base;
+
+ /*! Type of RAM Firmware to load */
+ enum mod_fip_toc_entry_type image_type;
+};
+
+/*!
+ * @}
+ */
+
+/*!
+ * @}
+ */
+
+#endif /* MOD_MORELLO_ROM_H */
diff --git a/product/morello/module/morello_rom/src/Makefile b/product/morello/module/morello_rom/src/Makefile
new file mode 100644
index 00000000..cc370557
--- /dev/null
+++ b/product/morello/module/morello_rom/src/Makefile
@@ -0,0 +1,11 @@
+#
+# Arm SCP/MCP Software
+# Copyright (c) 2020, Arm Limited and Contributors. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
+BS_LIB_NAME := MORELLO ROM
+BS_LIB_SOURCES := mod_morello_rom.c
+
+include $(BS_DIR)/lib.mk
diff --git a/product/morello/module/morello_rom/src/mod_morello_rom.c b/product/morello/module/morello_rom/src/mod_morello_rom.c
new file mode 100644
index 00000000..526eb22b
--- /dev/null
+++ b/product/morello/module/morello_rom/src/mod_morello_rom.c
@@ -0,0 +1,162 @@
+/*
+ * Arm SCP/MCP Software
+ * Copyright (c) 2020, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <mod_fip.h>
+#include <mod_morello_rom.h>
+
+#include <fwk_event.h>
+#include <fwk_id.h>
+#include <fwk_interrupt.h>
+#include <fwk_log.h>
+#include <fwk_module.h>
+#include <fwk_module_idx.h>
+#include <fwk_status.h>
+#include <fwk_thread.h>
+
+#include <fmw_cmsis.h>
+
+#include <inttypes.h>
+#include <stdint.h>
+#include <string.h>
+
+/*
+ * Module context
+ */
+struct mod_morello_rom_ctx {
+ /* ROM configuration structure */
+ const struct morello_rom_config *rom_config;
+
+ /* Pointer to FIP API */
+ struct mod_fip_api *fip_api;
+};
+
+enum rom_event { ROM_EVENT_RUN, ROM_EVENT_COUNT };
+
+static struct mod_morello_rom_ctx morello_rom_ctx;
+
+static void jump_to_ramfw(void)
+{
+ uintptr_t ramfw_base = morello_rom_ctx.rom_config->ramfw_base;
+ uintptr_t const *reset_base = (uintptr_t *)(ramfw_base + 0x4);
+ void (*ramfw_reset_handler)(void);
+
+ /*
+ * Disable interrupts for the duration of the ROM firmware to RAM firmware
+ * transition.
+ */
+ fwk_interrupt_global_disable();
+
+ ramfw_reset_handler = (void (*)(void)) * reset_base;
+
+ SCB->VTOR = ramfw_base;
+
+ /*
+ * Execute the RAM firmware's reset handler to pass control from ROM
+ * firmware to the RAM firmware.
+ */
+ ramfw_reset_handler();
+}
+
+/*
+ * Framework handlers
+ */
+static int morello_rom_init(
+ fwk_id_t module_id,
+ unsigned int element_count,
+ const void *data)
+{
+ if ((data == NULL) || (element_count > 0))
+ return FWK_E_PANIC;
+
+ morello_rom_ctx.rom_config = data;
+
+ return FWK_SUCCESS;
+}
+
+static int morello_rom_bind(fwk_id_t id, unsigned int round)
+{
+ int status;
+
+ /* Use second round only (round numbering is zero-indexed) */
+ if (round == 1) {
+ /* Bind to the fip parser module */
+ status = fwk_module_bind(
+ FWK_ID_MODULE(FWK_MODULE_IDX_FIP),
+ FWK_ID_API(FWK_MODULE_IDX_FIP, 0),
+ &morello_rom_ctx.fip_api);
+ if (status != FWK_SUCCESS)
+ return FWK_E_PANIC;
+ }
+
+ return FWK_SUCCESS;
+}
+
+static int morello_rom_start(fwk_id_t id)
+{
+ struct fwk_event event = {
+ .source_id = FWK_ID_MODULE(FWK_MODULE_IDX_MORELLO_ROM),
+ .target_id = FWK_ID_MODULE(FWK_MODULE_IDX_MORELLO_ROM),
+ .id = FWK_ID_EVENT(FWK_MODULE_IDX_MORELLO_ROM, ROM_EVENT_RUN),
+ };
+
+ return fwk_thread_put_event(&event);
+}
+
+static const char *get_image_type_str(enum mod_fip_toc_entry_type type)
+{
+ if (type == MOD_FIP_TOC_ENTRY_MCP_BL2)
+ return "MCP";
+ if (type == MOD_FIP_TOC_ENTRY_SCP_BL2)
+ return "SCP";
+ return "???";
+}
+
+static int morello_rom_process_event(
+ const struct fwk_event *event,
+ struct fwk_event *resp)
+{
+ struct mod_fip_entry_data entry;
+ int status = morello_rom_ctx.fip_api->get_entry(
+ morello_rom_ctx.rom_config->image_type, &entry);
+ const char *image_type =
+ get_image_type_str(morello_rom_ctx.rom_config->image_type);
+
+ if (status != FWK_SUCCESS) {
+ FWK_LOG_INFO(
+ "[ROM] Failed to locate %s_BL2, error: %d\n", image_type, status);
+ return status;
+ }
+
+ FWK_LOG_INFO("[ROM] Located %s_BL2:\n", image_type);
+ FWK_LOG_INFO("[ROM] address: %p\n", entry.base);
+ FWK_LOG_INFO("[ROM] size : %u\n", entry.size);
+ FWK_LOG_INFO(
+ "[ROM] flags : 0x%08" PRIX32 "%08" PRIX32 "\n",
+ (uint32_t)(entry.flags >> 32),
+ (uint32_t)entry.flags);
+ FWK_LOG_INFO("[ROM] Copying %s_BL2 to ITCRAM...!\n", image_type);
+
+ memcpy(
+ (void *)morello_rom_ctx.rom_config->ramfw_base, entry.base, entry.size);
+ FWK_LOG_INFO("[ROM] Done!");
+
+ FWK_LOG_INFO("[ROM] Jumping to %s_BL2\n", image_type);
+ jump_to_ramfw();
+
+ return FWK_SUCCESS;
+}
+
+/* Module descriptor */
+const struct fwk_module module_morello_rom = {
+ .name = "MORELLO SCP ROM",
+ .type = FWK_MODULE_TYPE_SERVICE,
+ .event_count = ROM_EVENT_COUNT,
+ .init = morello_rom_init,
+ .bind = morello_rom_bind,
+ .start = morello_rom_start,
+ .process_event = morello_rom_process_event,
+};
diff --git a/product/morello/scp_romfw/config_morello_rom.c b/product/morello/scp_romfw/config_morello_rom.c
new file mode 100644
index 00000000..bbec997f
--- /dev/null
+++ b/product/morello/scp_romfw/config_morello_rom.c
@@ -0,0 +1,20 @@
+/*
+ * Arm SCP/MCP Software
+ * Copyright (c) 2020, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include "morello_scp_system_mmap.h"
+
+#include <mod_fip.h>
+#include <mod_morello_rom.h>
+
+#include <fwk_module.h>
+
+const struct fwk_module_config config_morello_rom = {
+ .data = &((struct morello_rom_config){
+ .ramfw_base = SCP_RAM0_BASE,
+ .image_type = MOD_FIP_TOC_ENTRY_SCP_BL2,
+ })
+};