diff options
| author | Anurag Koul <anurag.koul@arm.com> | 2020-06-08 16:28:50 +0100 |
|---|---|---|
| committer | jimqui01 <54316584+jimqui01@users.noreply.github.com> | 2020-09-15 17:03:53 +0100 |
| commit | 61a34b9a3f971a1659de2a786cc1d05264837ae0 (patch) | |
| tree | d9e4b725b4b163d514c08db3eef786d8a064047c /product/morello | |
| parent | 13922efb70e195c2b6d92c1f64b1f31ced3bfcc9 (diff) | |
morello/scp_ramfw_fvp: enable scp ramfw image build
Change-Id: I9943ab41335083a930cbab7e7ed9fdcd62cac73f
Signed-off-by: Anurag Koul <anurag.koul@arm.com>
Co-authored-by: Manoj Kumar <manoj.kumar3@arm.com>
Diffstat (limited to 'product/morello')
| -rw-r--r-- | product/morello/product.mk | 9 | ||||
| -rw-r--r-- | product/morello/scp_ramfw_fvp/firmware.mk | 70 | ||||
| -rw-r--r-- | product/morello/scp_ramfw_fvp/fmw_memory.h | 30 |
3 files changed, 109 insertions, 0 deletions
diff --git a/product/morello/product.mk b/product/morello/product.mk new file mode 100644 index 00000000..5de830aa --- /dev/null +++ b/product/morello/product.mk @@ -0,0 +1,9 @@ +# +# Arm SCP/MCP Software +# Copyright (c) 2020, Arm Limited and Contributors. All rights reserved. +# +# SPDX-License-Identifier: BSD-3-Clause +# + +BS_PRODUCT_NAME := morello +BS_FIRMWARE_LIST := scp_ramfw_fvp diff --git a/product/morello/scp_ramfw_fvp/firmware.mk b/product/morello/scp_ramfw_fvp/firmware.mk new file mode 100644 index 00000000..754226f3 --- /dev/null +++ b/product/morello/scp_ramfw_fvp/firmware.mk @@ -0,0 +1,70 @@ +# +# Arm SCP/MCP Software +# Copyright (c) 2020, Arm Limited and Contributors. All rights reserved. +# +# SPDX-License-Identifier: BSD-3-Clause +# +# The order of the modules in the BS_FIRMWARE_MODULES list is the order in which +# the modules are initialized, bound, started during the pre-runtime phase. +# + +BS_FIRMWARE_CPU := cortex-m7 +BS_FIRMWARE_HAS_MULTITHREADING := yes +BS_FIRMWARE_HAS_NOTIFICATION := yes +BS_FIRMWARE_MODULE_HEADERS_ONLY := \ + +BS_FIRMWARE_MODULES := \ + armv7m_mpu \ + pl011 \ + cmn_skeena \ + apcontext \ + power_domain \ + ppu_v1 \ + ppu_v0 \ + system_power \ + morello_pll \ + dmc_bing \ + mhu \ + smt \ + scmi \ + sds \ + pik_clock \ + css_clock \ + clock \ + gtimer \ + timer \ + scmi_power_domain \ + scmi_system_power \ + fip \ + ssc \ + system_info \ + morello_system + +BS_FIRMWARE_SOURCES := \ + rtx_config.c \ + morello_core.c \ + config_armv7m_mpu.c \ + config_ssc.c \ + config_system_info.c \ + config_power_domain.c \ + config_ppu_v0.c \ + config_ppu_v1.c \ + config_dmc_bing.c \ + config_system_power.c \ + config_mhu.c \ + config_smt.c \ + config_scmi.c \ + config_sds.c \ + config_timer.c \ + config_cmn_skeena.c \ + config_scmi_system_power.c \ + config_scmi_power_domain.c \ + config_pl011.c \ + config_morello_pll.c \ + config_pik_clock.c \ + config_css_clock.c \ + config_clock.c \ + config_fip.c \ + config_apcontext.c + +include $(BS_DIR)/firmware.mk diff --git a/product/morello/scp_ramfw_fvp/fmw_memory.h b/product/morello/scp_ramfw_fvp/fmw_memory.h new file mode 100644 index 00000000..21c1755c --- /dev/null +++ b/product/morello/scp_ramfw_fvp/fmw_memory.h @@ -0,0 +1,30 @@ +/* + * Arm SCP/MCP Software + * Copyright (c) 2018-2020, Arm Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + * + * Description: + * RAM firmware memory layout for the linker script. + */ + +#ifndef FMW_MEMORY_H +#define FMW_MEMORY_H + +#include "morello_scp_system_mmap.h" + +#define FMW_MEM_MODE ARCH_MEM_MODE_DUAL_REGION_RELOCATION + +/* + * RAM instruction memory + */ +#define FMW_MEM0_SIZE SCP_RAM0_SIZE +#define FMW_MEM0_BASE SCP_RAM0_BASE + +/* + * RAM data memory + */ +#define FMW_MEM1_SIZE SCP_RAM1_SIZE +#define FMW_MEM1_BASE SCP_RAM1_BASE + +#endif /* FMW_MEMORY_H */ |