morello/scp_ramfw_fvp: add cmsis rtx support

Change-Id: I03e170883fdc3e79a55bceb7b5c1cb9b31656eb6
Signed-off-by: Anurag Koul <anurag.koul@arm.com>

3 files changed, 126 insertions, 0 deletions

diff --git a/product/morello/scp_ramfw_fvp/RTX_Config.h b/product/morello/scp_ramfw_fvp/RTX_Config.h
new file mode 100644
index 00000000..d3dc1e19
--- /dev/null
+++ b/product/morello/scp_ramfw_fvp/RTX_Config.h
@@ -0,0 +1,56 @@
+/*
+ * Arm SCP/MCP Software
+ * Copyright (c) 2020, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Description:
+ *      RTX2 v5 configuration file.
+ *      The file must be called RTX_Config.h as it is included by an RTX
+ *      file in order to create an object file containing the configuration.
+ */
+
+#ifndef RTX_CONFIG_H_
+#define RTX_CONFIG_H_
+
+/* System */
+#define OS_DYNAMIC_MEM_SIZE 0
+#define OS_TICK_FREQ 1000 /* Hz */
+#define OS_ROBIN_ENABLE 0
+#define OS_ROBIN_TIMEOUT 0
+#define OS_ISR_FIFO_QUEUE 16
+
+/* Thread */
+#define OS_THREAD_OBJ_MEM 0
+#define OS_THREAD_NUM 1
+#define OS_THREAD_DEF_STACK_NUM 0
+#define OS_THREAD_USER_STACK_SIZE 0
+#define OS_STACK_SIZE 200
+#define OS_IDLE_THREAD_STACK_SIZE 200
+#define OS_STACK_CHECK 1
+#define OS_STACK_WATERMARK 0
+#define OS_PRIVILEGE_MODE 1
+
+/* Timer */
+#define OS_TIMER_OBJ_MEM 0
+#define OS_TIMER_NUM 1
+#define OS_TIMER_THREAD_PRIO 40
+#define OS_TIMER_THREAD_STACK_SIZE 200
+#define OS_TIMER_CB_QUEUE 4
+
+/* Event flags */
+#define OS_EVFLAGS_OBJ_MEM 0
+#define OS_EVFLAGS_NUM 1
+
+#define OS_MUTEX_OBJ_MEM 0
+#define OS_MUTEX_NUM 1
+#define OS_SEMAPHORE_OBJ_MEM 0
+#define OS_SEMAPHORE_NUM 1
+#define OS_MEMPOOL_OBJ_MEM 0
+#define OS_MEMPOOL_NUM 1
+#define OS_MEMPOOL_DATA_SIZE 0
+#define OS_MSGQUEUE_OBJ_MEM 0
+#define OS_MSGQUEUE_NUM 1
+#define OS_MSGQUEUE_DATA_SIZE 0
+
+#endif /* RTX_CONFIG_H_ */
diff --git a/product/morello/scp_ramfw_fvp/fmw_cmsis.h b/product/morello/scp_ramfw_fvp/fmw_cmsis.h
new file mode 100644
index 00000000..691120c1
--- /dev/null
+++ b/product/morello/scp_ramfw_fvp/fmw_cmsis.h
@@ -0,0 +1,13 @@
+/*
+ * Arm SCP/MCP Software
+ * Copyright (c) 2020, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef FMW_CMSIS_H
+#define FMW_CMSIS_H
+
+#include <fmw_cmsis_scp.h>
+
+#endif /* FMW_CMSIS_H */
diff --git a/product/morello/scp_ramfw_fvp/rtx_config.c b/product/morello/scp_ramfw_fvp/rtx_config.c
new file mode 100644
index 00000000..c95f62eb
--- /dev/null
+++ b/product/morello/scp_ramfw_fvp/rtx_config.c
@@ -0,0 +1,57 @@
+/*
+ * Arm SCP/MCP Software
+ * Copyright (c) 2020, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include "morello_system_clock.h"
+
+#include <rtx_lib.c>
+#include <rtx_os.h>
+
+#include <fwk_mm.h>
+
+#include <fmw_cmsis.h>
+
+#include <stdbool.h>
+#include <stdint.h>
+
+/*
+ * Required by RTX to configure the SysTick timer.
+ */
+uint32_t SystemCoreClock = CLOCK_RATE_REFCLK;
+
+/*
+ * Idle thread
+ */
+__NO_RETURN void osRtxIdleThread(void *argument)
+{
+    while (true)
+        __WFI();
+}
+
+/*
+ * OS error handler
+ */
+uint32_t osRtxErrorNotify(uint32_t code, void *object_id)
+{
+    osRtxIdleThread(object_id);
+}
+
+uint32_t osRtxMemoryInit(void *mem, uint32_t size)
+{
+    return 1;
+}
+
+void *osRtxMemoryAlloc(void *mem, uint32_t size, uint32_t type)
+{
+    return fwk_mm_alloc(1, size);
+}
+
+uint32_t osRtxMemoryFree(void *mem, void *block)
+{
+    fwk_mm_free(block);
+
+    return 1;
+}