diff options
| author | Manoj Kumar <manoj.kumar3@arm.com> | 2020-11-05 10:47:59 +0000 |
|---|---|---|
| committer | nicola-mazzucato-arm <42373140+nicola-mazzucato-arm@users.noreply.github.com> | 2020-11-10 11:11:31 +0000 |
| commit | 5ebacc4ba7f194f8598071febd8e60edf0beb2a0 (patch) | |
| tree | f697b4cb84d8ebf43c5f5636994bc1ce8eaf180d | |
| parent | e7326fba8338b292316e5f68e83fa05af9c6411c (diff) | |
morello: use SCC BOOT_GPR2/3 registers for AP RVBAR
This patch updates morello_system module such that SCC BOOT_GPR2 and
BOOT_GPR3 register values are used to set the AP core RVBAR register.
If both BOOT_GPR2 & BOOT_GPR3 registers are set to 0 then a default
Trusted SRAM based is used for RVBAR.
Change-Id: I37620a6733ee02a163dbdb98f51f0e4fc8e9bec7
Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com>
| -rw-r--r-- | product/morello/module/morello_system/src/mod_morello_system.c | 26 |
1 files changed, 22 insertions, 4 deletions
diff --git a/product/morello/module/morello_system/src/mod_morello_system.c b/product/morello/module/morello_system/src/mod_morello_system.c index d38d7e7a..b5906c68 100644 --- a/product/morello/module/morello_system/src/mod_morello_system.c +++ b/product/morello/module/morello_system/src/mod_morello_system.c @@ -331,12 +331,29 @@ static int morello_system_init_primary_core(void) unsigned int core_idx; unsigned int cluster_idx; unsigned int cluster_count; + uint32_t rvbar_low; + uint32_t rvbar_high; uintptr_t fip_base; size_t fip_size; + /* + * SCC BOOT_GPR2 & BOOT_GPR3 registers are used to set user specific + * RVBAR addresses. If both registers are set to 0 then a fixed trusted + * SRAM based is used. + */ + if ((SCC->BOOT_GPR2 == 0) && (SCC->BOOT_GPR3 == 0)) { + rvbar_low = (AP_CORE_RESET_ADDR - AP_SCP_SRAM_OFFSET); + rvbar_high = 0; + } else { + rvbar_low = SCC->BOOT_GPR2; + rvbar_high = SCC->BOOT_GPR3; + } + FWK_LOG_INFO( - "[MORELLO SYSTEM] Setting AP Reset Address to 0x%08" PRIX32, - (AP_CORE_RESET_ADDR - AP_SCP_SRAM_OFFSET)); + "[MORELLO SYSTEM] Setting AP Reset Address to 0x%08" PRIX32 + "%08" PRIX32, + rvbar_high, + rvbar_low); cluster_count = morello_core_get_cluster_count(); for (cluster_idx = 0; cluster_idx < cluster_count; cluster_idx++) { @@ -344,8 +361,9 @@ static int morello_system_init_primary_core(void) core_idx < morello_core_get_core_per_cluster_count(cluster_idx); core_idx++) { PIK_CLUSTER(cluster_idx)->STATIC_CONFIG[core_idx].RVBARADDR_LW = - (AP_CORE_RESET_ADDR - AP_SCP_SRAM_OFFSET); - PIK_CLUSTER(cluster_idx)->STATIC_CONFIG[core_idx].RVBARADDR_UP = 0; + rvbar_low; + PIK_CLUSTER(cluster_idx)->STATIC_CONFIG[core_idx].RVBARADDR_UP = + rvbar_high; } } |