diff options
author | Aditya Angadi <aditya.angadi@arm.com> | 2020-11-04 14:12:10 +0530 |
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committer | Thomas Abraham <thomas.abraham@arm.com> | 2020-11-28 01:48:28 +0530 |
commit | 11d30407a17919deb6aec54c8443b18772e6dc40 (patch) | |
tree | 5af30c1219efadd89ad77328ea549c009291b0ca | |
parent | a8a36e93cbed9e75761b12c16252bbfccbac5957 (diff) |
product/rdn2: add platform specific definitions for rtx
Add platform specific definitions for callback functions for cmsis rtx.
Change-Id: Iaaa9b3e6887696932d23ed6a42b2f224819f7a54
Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
-rw-r--r-- | product/rdn2/include/clock_soc.h | 15 | ||||
-rw-r--r-- | product/rdn2/scp_ramfw/RTX_Config.h | 56 | ||||
-rw-r--r-- | product/rdn2/scp_ramfw/rtx_config.c | 57 |
3 files changed, 128 insertions, 0 deletions
diff --git a/product/rdn2/include/clock_soc.h b/product/rdn2/include/clock_soc.h new file mode 100644 index 00000000..6f7848c2 --- /dev/null +++ b/product/rdn2/include/clock_soc.h @@ -0,0 +1,15 @@ +/* + * Arm SCP/MCP Software + * Copyright (c) 2020, Arm Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef CLOCK_SOC_H +#define CLOCK_SOC_H + +#include <fwk_macros.h> + +#define CLOCK_RATE_REFCLK (100UL * FWK_MHZ) + +#endif /* CLOCK_SOC_H */ diff --git a/product/rdn2/scp_ramfw/RTX_Config.h b/product/rdn2/scp_ramfw/RTX_Config.h new file mode 100644 index 00000000..35ce37d1 --- /dev/null +++ b/product/rdn2/scp_ramfw/RTX_Config.h @@ -0,0 +1,56 @@ +/* + * Arm SCP/MCP Software + * Copyright (c) 2020, Arm Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + * + * Description: + * RTX2 v5 configuration file. + * The file must be called RTX_Config.h as it is included by the an RTX + * file in order to create a object file containing the configuration. + */ + +#ifndef RTX_CONFIG_H_ +#define RTX_CONFIG_H_ + +/* System */ +#define OS_DYNAMIC_MEM_SIZE 0 +#define OS_TICK_FREQ 1000 /* Hz */ +#define OS_ROBIN_ENABLE 0 +#define OS_ROBIN_TIMEOUT 0 +#define OS_ISR_FIFO_QUEUE 16 + +/* Thread */ +#define OS_THREAD_OBJ_MEM 0 +#define OS_THREAD_NUM 1 +#define OS_THREAD_DEF_STACK_NUM 0 +#define OS_THREAD_USER_STACK_SIZE 0 +#define OS_STACK_SIZE 200 +#define OS_IDLE_THREAD_STACK_SIZE 200 +#define OS_STACK_CHECK 1 +#define OS_STACK_WATERMARK 0 +#define OS_PRIVILEGE_MODE 1 + +/* Timer */ +#define OS_TIMER_OBJ_MEM 0 +#define OS_TIMER_NUM 1 +#define OS_TIMER_THREAD_PRIO 40 +#define OS_TIMER_THREAD_STACK_SIZE 200 +#define OS_TIMER_CB_QUEUE 4 + +/* Event flags */ +#define OS_EVFLAGS_OBJ_MEM 0 +#define OS_EVFLAGS_NUM 1 + +#define OS_MUTEX_OBJ_MEM 0 +#define OS_MUTEX_NUM 1 +#define OS_SEMAPHORE_OBJ_MEM 0 +#define OS_SEMAPHORE_NUM 1 +#define OS_MEMPOOL_OBJ_MEM 0 +#define OS_MEMPOOL_NUM 1 +#define OS_MEMPOOL_DATA_SIZE 0 +#define OS_MSGQUEUE_OBJ_MEM 0 +#define OS_MSGQUEUE_NUM 1 +#define OS_MSGQUEUE_DATA_SIZE 0 + +#endif /* RTX_CONFIG_H_ */ diff --git a/product/rdn2/scp_ramfw/rtx_config.c b/product/rdn2/scp_ramfw/rtx_config.c new file mode 100644 index 00000000..ce88d98f --- /dev/null +++ b/product/rdn2/scp_ramfw/rtx_config.c @@ -0,0 +1,57 @@ +/* + * Arm SCP/MCP Software + * Copyright (c) 2020, Arm Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include "clock_soc.h" + +#include <rtx_lib.c> +#include <rtx_os.h> + +#include <fwk_mm.h> + +#include <fmw_cmsis.h> + +#include <stdbool.h> +#include <stdint.h> + +/* + * Required by RTX to configure the SysTick timer. + */ +uint32_t SystemCoreClock = CLOCK_RATE_REFCLK; + +/* + * Idle thread + */ +__NO_RETURN void osRtxIdleThread(void *argument) +{ + while (true) + __WFI(); +} + +/* + * OS error handler + */ +uint32_t osRtxErrorNotify(uint32_t code, void *object_id) +{ + osRtxIdleThread(object_id); +} + +uint32_t osRtxMemoryInit(void *mem, uint32_t size) +{ + return 1; +} + +void *osRtxMemoryAlloc(void *mem, uint32_t size, uint32_t type) +{ + return fwk_mm_alloc(1, size); +} + +uint32_t osRtxMemoryFree(void *mem, void *block) +{ + fwk_mm_free(block); + + return 1; +} |