diff options
| author | Jeremy Linton <jeremy.linton@arm.com> | 2015-11-03 11:11:22 +0000 |
|---|---|---|
| committer | leiflindholm <leiflindholm@Edk2> | 2015-11-03 11:11:22 +0000 |
| commit | efcc052bdf1fe143f40dd87d98f176de4de82084 (patch) | |
| tree | 56cfee74d16c0ef73b38c96e31d6991c6e48d902 /ArmPlatformPkg/ArmJunoPkg/AcpiTables | |
| parent | fad21b7c57336bbf0ae363d56e35cbccca67ff3b (diff) | |
ArmPlatformPkg: Juno - add correct SPI interrupt numbers for MSI
The JunoR1 has a GICv2m which is a GICv2 with a little piece of hardware
that has some memory mapped locations that can trigger traditional SPI
interrupts. This allows some basic PCIe MSI capabilities.
Setup the SPI range that is mapped by the MSI window. This range is
described in the JunoR1 SoC TRM, table 3-3. Under Interrupt ID 244-351 is
described as "GICv2m PCI Express MSI". In the future when these tables
are generated programmatically the information may be found in the
MSI_TYPER register as well.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18723 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPlatformPkg/ArmJunoPkg/AcpiTables')
| -rw-r--r-- | ArmPlatformPkg/ArmJunoPkg/AcpiTables/Madt.aslc | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Madt.aslc b/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Madt.aslc index d63a19b390..0a167d3ac0 100644 --- a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Madt.aslc +++ b/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Madt.aslc @@ -119,7 +119,8 @@ 0x2C06F000, 0x2C04F000, 25, 0 /* GicRBase */),
},
EFI_ACPI_5_0_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet32 (PcdGicDistributorBase), 0),
- EFI_ACPI_6_0_GIC_MSI_FRAME_INIT(0, ARM_JUNO_GIV2M_MSI_BASE, 0, 0, 0)
+ // Format: EFI_ACPI_6_0_GIC_MSI_FRAME_INIT(GicMsiFrameId, PhysicalBaseAddress, Flags, SPICount, SPIBase)
+ EFI_ACPI_6_0_GIC_MSI_FRAME_INIT(0, ARM_JUNO_GIV2M_MSI_BASE, 0, ARM_JUNO_GIV2M_MSI_SPI_COUNT, ARM_JUNO_GIV2M_MSI_SPI_BASE)
};
#endif
|