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/** @file
* Multiple APIC Description Table (MADT)
*
* Copyright (c) 2020, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
**/
#include "SgiPlatform.h"
#include "SgiAcpiHeader.h"
#include <Library/AcpiLib.h>
#include <Library/ArmLib.h>
#include <Library/PcdLib.h>
#include <IndustryStandard/Acpi.h>
#define CORE_CNT (FixedPcdGet32 (PcdClusterCount) * \
FixedPcdGet32 (PcdCoreCount))
#define CHIP_CNT FixedPcdGet32 (PcdChipCount)
// Multiple APIC Description Table
#pragma pack (1)
typedef struct {
EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
EFI_ACPI_6_2_GIC_STRUCTURE GicInterfaces[CORE_CNT * CHIP_CNT];
EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE GicDistributor;
EFI_ACPI_6_2_GICR_STRUCTURE GicRedistributor[CHIP_CNT];
EFI_ACPI_6_2_GIC_ITS_STRUCTURE GicIts[4];
} EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE;
#pragma pack ()
STATIC EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
{
ARM_ACPI_HEADER (
EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE,
EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE,
EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION
),
// MADT specific fields
0, // LocalApicAddress
0 // Flags
},
{
// Format: EFI_ACPI_6_2_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr, Flags,
// PmuIrq, GicBase, GicVBase,
// GicHBase, GsivId, GicRBase,
// Efficiency)
// Note: The GIC Structure of the primary CPU must be the first entry
// (see note in 5.2.12.14 GICC Structure of ACPI v6.2).
//Chip 0
EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core0
0, 0, GET_MPID(0x0, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
FixedPcdGet32 (PcdGicDistributorBase),
0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core1
0, 1, GET_MPID(0x100, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
FixedPcdGet32 (PcdGicDistributorBase),
0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core2
0, 2, GET_MPID(0x200, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
FixedPcdGet32 (PcdGicDistributorBase),
0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core3
0, 3, GET_MPID(0x300, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
FixedPcdGet32 (PcdGicDistributorBase),
0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
// Chip 1
EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core0
0, 0, GET_MPID(0x01000000ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
FixedPcdGet32 (PcdGicDistributorBase),
0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core1
0, 1, GET_MPID(0x01000100ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
FixedPcdGet32 (PcdGicDistributorBase),
0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core2
0, 2, GET_MPID(0x01000200ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
FixedPcdGet32 (PcdGicDistributorBase),
0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core3
0, 3, GET_MPID(0x01000300ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
FixedPcdGet32 (PcdGicDistributorBase),
0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
// Chip 2
EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core0
0, 0, GET_MPID(0x02000000ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
FixedPcdGet32 (PcdGicDistributorBase),
0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core1
0, 1, GET_MPID(0x02000100ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
FixedPcdGet32 (PcdGicDistributorBase),
0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core2
0, 2, GET_MPID(0x02000200ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
FixedPcdGet32 (PcdGicDistributorBase),
0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core3
0, 3, GET_MPID(0x02000300ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
FixedPcdGet32 (PcdGicDistributorBase),
0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
// Chip 3
EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core0
0, 0, GET_MPID(0x03000000ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
FixedPcdGet32 (PcdGicDistributorBase),
0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core1
0, 1, GET_MPID(0x03000100ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
FixedPcdGet32 (PcdGicDistributorBase),
0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core2
0, 2, GET_MPID(0x03000200ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
FixedPcdGet32 (PcdGicDistributorBase),
0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core3
0, 3, GET_MPID(0x03000300ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,
FixedPcdGet32 (PcdGicDistributorBase),
0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
},
// GIC Distributor Entry
EFI_ACPI_6_2_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet32 (PcdGicDistributorBase),
0, 3),
{
// GIC Redistributor
EFI_ACPI_6_2_GIC_REDISTRIBUTOR_INIT(FixedPcdGet32 (PcdGicRedistributorsBase) +
SGI_REMOTE_CHIP_MEM_OFFSET(0), SIZE_16MB),
EFI_ACPI_6_2_GIC_REDISTRIBUTOR_INIT(FixedPcdGet32 (PcdGicRedistributorsBase) +
SGI_REMOTE_CHIP_MEM_OFFSET(1), SIZE_16MB),
EFI_ACPI_6_2_GIC_REDISTRIBUTOR_INIT(FixedPcdGet32 (PcdGicRedistributorsBase) +
SGI_REMOTE_CHIP_MEM_OFFSET(2), SIZE_16MB),
EFI_ACPI_6_2_GIC_REDISTRIBUTOR_INIT(FixedPcdGet32 (PcdGicRedistributorsBase) +
SGI_REMOTE_CHIP_MEM_OFFSET(3), SIZE_16MB)
},
// GIC ITS
{
EFI_ACPI_6_2_GIC_ITS_INIT(0, 0x30040000),
EFI_ACPI_6_2_GIC_ITS_INIT(1, 0x30080000),
EFI_ACPI_6_2_GIC_ITS_INIT(2, 0x300C0000),
EFI_ACPI_6_2_GIC_ITS_INIT(3, 0x30100000),
},
};
//
// Reference the table being generated to prevent the optimizer from removing
// the data structure from the executable
//
VOID* CONST ReferenceAcpiTable = &Madt;
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