From db6c1a057d82c24c00b179346637a5853ab9e505 Mon Sep 17 00:00:00 2001 From: Marcin Wojtas Date: Thu, 15 Aug 2019 04:19:59 +0200 Subject: Marvell/Armada7k8k: Fix 32-bit compilation It turned out, that the recently added features broke ARM compilation. Fix all issues: * Update signatures types in structures (UINTN -> UINT64) * Use fixed type for address in ICU * Limit memory for ARM build to 1GB and stop using non-existent PCD Signed-off-by: Marcin Wojtas Reviewed-by: Leif Lindholm --- .../Armada7k8k/Library/Armada7k8kLib/ARM/ArmPlatformHelper.S | 11 ----------- .../Armada7k8k/Library/Armada7k8kLib/Armada7k8kLibMem.c | 8 ++++++++ Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.h | 2 +- Silicon/Marvell/Drivers/Gpio/MvGpioDxe/MvGpioDxe.h | 2 +- Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h | 4 ++-- 5 files changed, 12 insertions(+), 15 deletions(-) diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/ARM/ArmPlatformHelper.S b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/ARM/ArmPlatformHelper.S index 44161630..db43b0f3 100644 --- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/ARM/ArmPlatformHelper.S +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/ARM/ArmPlatformHelper.S @@ -28,17 +28,6 @@ ASM_FUNC(ArmPlatformPeiBootAction) .err PcdSystemMemoryBase should be 0x0 on this platform! .endif - .if FixedPcdGet64 (PcdSystemMemorySize) > FixedPcdGet32 (PcdDramRemapTarget) - // - // Use the low range for UEFI itself. The remaining memory will be mapped - // and added to the GCD map later. - // - ADRL (r0, mSystemMemoryEnd) - MOV32 (r2, FixedPcdGet32 (PcdDramRemapTarget) - 1) - mov r3, #0 - strd r2, r3, [r0] - .endif - bx lr //UINTN diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLibMem.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLibMem.c index a735fe59..cc19694d 100644 --- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLibMem.c +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLibMem.c @@ -36,6 +36,7 @@ GetDramSize ( IN OUT UINT64 *MemSize ) { +#if defined(MDE_CPU_AARCH64) ARM_SMC_ARGS SmcRegs = {0}; EFI_STATUS Status; @@ -48,6 +49,13 @@ GetDramSize ( ArmCallSmc (&SmcRegs); *MemSize = SmcRegs.Arg0; +#else + // + // Use fixed value, as currently there is no support + // in Armada early firmware for 32-bit SMC + // + *MemSize = FixedPcdGet64 (PcdSystemMemorySize); +#endif return EFI_SUCCESS; } diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.h b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.h index a6f551b0..3b5a28cb 100644 --- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.h +++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.h @@ -22,7 +22,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent typedef struct { MARVELL_BOARD_DESC_PROTOCOL BoardDescProtocol; - UINTN Signature; + UINT64 Signature; EFI_HANDLE Handle; EFI_LOCK Lock; } MV_BOARD_DESC; diff --git a/Silicon/Marvell/Drivers/Gpio/MvGpioDxe/MvGpioDxe.h b/Silicon/Marvell/Drivers/Gpio/MvGpioDxe/MvGpioDxe.h index 1cb006a0..ce683e76 100644 --- a/Silicon/Marvell/Drivers/Gpio/MvGpioDxe/MvGpioDxe.h +++ b/Silicon/Marvell/Drivers/Gpio/MvGpioDxe/MvGpioDxe.h @@ -36,7 +36,7 @@ typedef struct { EMBEDDED_GPIO GpioProtocol; GPIO_CONTROLLER *SoCGpio; UINTN GpioDeviceCount; - UINTN Signature; + UINT64 Signature; EFI_HANDLE Handle; } MV_GPIO; diff --git a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h index 64329165..da7a41ee 100644 --- a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h +++ b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h @@ -109,8 +109,8 @@ typedef enum { typedef struct { ICU_GROUP Group; - UINTN SetSpiAddr; - UINTN ClrSpiAddr; + EFI_PHYSICAL_ADDRESS SetSpiAddr; + EFI_PHYSICAL_ADDRESS ClrSpiAddr; } ICU_MSI; typedef struct { -- cgit v1.2.3