From 327e14208451f1f97932b3e9e8a44fcc1c9ea8f8 Mon Sep 17 00:00:00 2001 From: Leif Lindholm Date: Thu, 8 Feb 2018 19:21:23 +0000 Subject: Platform/(AMD|LeMaker|SoftIron), Silicon/AMD: drop unused PcdCacheEnabled PcdCacheEnabled was never useful for these platforms, but they copied it over from other platforms used as templates. Delete it here to keep the platforms building once the Pcd is removed from EmbeddedPkg. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Leif Lindholm Reviewed-by: Ard Biesheuvel --- Platform/AMD/OverdriveBoard/OverdriveBoard.dsc | 3 --- Platform/LeMaker/CelloBoard/CelloBoard.dsc | 3 --- Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc | 3 --- Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLib.inf | 3 --- Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLibSec.inf | 3 --- Silicon/AMD/Styx/Library/AmdStyxLib/StyxMem.c | 6 +----- 6 files changed, 1 insertion(+), 20 deletions(-) diff --git a/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc b/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc index 21edcc87..48018abc 100644 --- a/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc +++ b/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc @@ -282,9 +282,6 @@ DEFINE DO_CAPSULE = FALSE ################################################################################ [PcdsFeatureFlag.common] - # All pages are cached by default - gEmbeddedTokenSpaceGuid.PcdCacheEnable|TRUE - # Use the Vector Table location in CpuDxe. We will not copy the Vector Table at PcdCpuVectorBaseAddress gArmTokenSpaceGuid.PcdRelocateVectorTable|FALSE diff --git a/Platform/LeMaker/CelloBoard/CelloBoard.dsc b/Platform/LeMaker/CelloBoard/CelloBoard.dsc index cf3df865..2468583c 100644 --- a/Platform/LeMaker/CelloBoard/CelloBoard.dsc +++ b/Platform/LeMaker/CelloBoard/CelloBoard.dsc @@ -270,9 +270,6 @@ DEFINE DO_FLASHER = FALSE ################################################################################ [PcdsFeatureFlag.common] - # All pages are cached by default - gEmbeddedTokenSpaceGuid.PcdCacheEnable|TRUE - # Use the Vector Table location in CpuDxe. We will not copy the Vector Table at PcdCpuVectorBaseAddress gArmTokenSpaceGuid.PcdRelocateVectorTable|FALSE diff --git a/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc b/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc index 0abec812..f0a7e979 100644 --- a/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc +++ b/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc @@ -272,9 +272,6 @@ DEFINE DO_FLASHER = FALSE ################################################################################ [PcdsFeatureFlag.common] - # All pages are cached by default - gEmbeddedTokenSpaceGuid.PcdCacheEnable|TRUE - # Use the Vector Table location in CpuDxe. We will not copy the Vector Table at PcdCpuVectorBaseAddress gArmTokenSpaceGuid.PcdRelocateVectorTable|FALSE diff --git a/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLib.inf b/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLib.inf index 6b7481ec..3a38f294 100644 --- a/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLib.inf +++ b/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLib.inf @@ -53,9 +53,6 @@ [Ppis] gArmMpCoreInfoPpiGuid -[FeaturePcd] - gEmbeddedTokenSpaceGuid.PcdCacheEnable - [Pcd] gArmTokenSpaceGuid.PcdSystemMemoryBase gArmTokenSpaceGuid.PcdSystemMemorySize diff --git a/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLibSec.inf b/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLibSec.inf index b313d4ba..b24ffd46 100644 --- a/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLibSec.inf +++ b/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLibSec.inf @@ -49,9 +49,6 @@ [Guids] gAmdStyxMpCoreInfoGuid ## CONSUMER -[FeaturePcd] - gEmbeddedTokenSpaceGuid.PcdCacheEnable - [Ppis] gArmMpCoreInfoPpiGuid diff --git a/Silicon/AMD/Styx/Library/AmdStyxLib/StyxMem.c b/Silicon/AMD/Styx/Library/AmdStyxLib/StyxMem.c index 3b82132d..479a4062 100644 --- a/Silicon/AMD/Styx/Library/AmdStyxLib/StyxMem.c +++ b/Silicon/AMD/Styx/Library/AmdStyxLib/StyxMem.c @@ -78,11 +78,7 @@ ArmPlatformGetVirtualMemoryMap ( return; } - if (FeaturePcdGet(PcdCacheEnable) == TRUE) { - CacheAttributes = DDR_ATTRIBUTES_CACHED; - } else { - CacheAttributes = DDR_ATTRIBUTES_UNCACHED; - } + CacheAttributes = DDR_ATTRIBUTES_CACHED; DEBUG ((EFI_D_ERROR, " Memory Map\n------------------------------------------------------------------------\n")); DEBUG ((EFI_D_ERROR, "Description : START - END [ SIZE ] { ATTR }\n")); -- cgit v1.2.3