diff options
| author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2018-12-18 17:46:21 +0100 |
|---|---|---|
| committer | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2018-12-20 12:07:55 +0100 |
| commit | 88e5de1a234660572558db529330fc906d00ea72 (patch) | |
| tree | 829bc14329f6a3d7389266c316dd37a9267825cc /Platform | |
| parent | dc6b5ef8a6c27ece500ab4bbcc3d40b8da56ffc3 (diff) | |
Platform/FVP-AArch64: switch to the SBSA watchdog
On the FVP Foundation model, the SP805 watchdog appears to be 'wired'
incorrectly, resulting in a watchdog counter that decrements at the
APB clock rate of 24 MHz instead of the usual 32 kHz. Since the
timer start value is only 32-bits wide, this makes the watchdog
unusable in UEFI, since the default timeout set by the DXE core is
5 minutes, which is not representable in 32-bit at this clock rate.
So switch to the SBSA watchdog instead, which is wired up to the
generic timer, and ticks at the correct rate.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Diffstat (limited to 'Platform')
4 files changed, 14 insertions, 5 deletions
diff --git a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc index 7094e57e..5d6078c5 100644 --- a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc +++ b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc @@ -133,9 +133,10 @@ gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x1C170000
## SBSA Watchdog Count
-!ifndef DISABLE_SBSA_WATCHDOG
gArmPlatformTokenSpaceGuid.PcdWatchdogCount|1
-!endif
+ gArmTokenSpaceGuid.PcdGenericWatchdogControlBase|0x2a440000
+ gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase|0x2a450000
+ gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum|59
!ifdef EDK2_ENABLE_PL111
## PL111 Versatile Express Motherboard controller
@@ -262,7 +263,7 @@ !ifdef EDK2_ENABLE_PL111
ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.inf
!endif
- ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
+ ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
# SMBIOS Support
diff --git a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf index 239029d0..c3e573e1 100644 --- a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf +++ b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf @@ -116,7 +116,7 @@ FvNameGuid = 87940482-fc81-41c3-87e6-399cf85ac8a0 !ifdef EDK2_ENABLE_PL111
INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.inf
!endif
- INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
+ INF ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
#
# Semi-hosting filesystem
diff --git a/Platform/ARM/VExpressPkg/Include/Platform/RTSM/ArmPlatform.h b/Platform/ARM/VExpressPkg/Include/Platform/RTSM/ArmPlatform.h index d856b6da..e267912e 100644 --- a/Platform/ARM/VExpressPkg/Include/Platform/RTSM/ArmPlatform.h +++ b/Platform/ARM/VExpressPkg/Include/Platform/RTSM/ArmPlatform.h @@ -76,4 +76,7 @@ #define PL111_CLCD_MOTHERBOARD_VIDEO_MODE_OSC_ID 1
#define PL111_CLCD_CORE_TILE_VIDEO_MODE_OSC_ID 1
+#define SBSA_WATCHDOG_BASE 0x2a440000
+#define SBSA_WATCHDOG_SIZE (2 * SIZE_64KB)
+
#endif
diff --git a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c index c8eefa0c..eb8f6a48 100644 --- a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c +++ b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c @@ -23,7 +23,7 @@ #define DP_BASE_DESCRIPTOR ((FixedPcdGet64 (PcdArmMaliDpBase) != 0) ? 1 : 0)
// Number of Virtual Memory Map Descriptors
-#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS (9 + DP_BASE_DESCRIPTOR)
+#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS (10 + DP_BASE_DESCRIPTOR)
// DDR attributes
#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK
@@ -175,6 +175,11 @@ ArmPlatformGetVirtualMemoryMap ( VirtualMemoryTable[Index].Attributes = CacheAttributes;
}
+ VirtualMemoryTable[++Index].PhysicalBase = SBSA_WATCHDOG_BASE;
+ VirtualMemoryTable[Index].VirtualBase = SBSA_WATCHDOG_BASE;
+ VirtualMemoryTable[Index].Length = SBSA_WATCHDOG_SIZE;
+ VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
+
// End of Table
VirtualMemoryTable[++Index].PhysicalBase = 0;
VirtualMemoryTable[Index].VirtualBase = 0;
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