Platform/dual-clark: add srat table and disable APEI driver

Change-Id: I39b805c8150bfe2f7c96e2c31a9f0d990c217703
Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>

10 files changed, 288 insertions, 25 deletions

diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Dsdt.asl b/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Dsdt.asl
index 45316d50..2fa7c704 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Dsdt.asl
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Dsdt.asl
@@ -62,6 +62,54 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 1, "ARMLTD", "ARMSGI",
       Name (_STA, 0xF)

     }

 

+    Device (CP08) { // Neoverse-N1: Cluster 0, Cpu 0, Chip 1

+      Name (_HID, "ACPI0007")

+      Name (_UID, 8)

+      Name (_STA, 0xF)

+    }

+

+    Device (CP09) { // Neoverse-N1: Cluster 0, Cpu 1, Chip 1

+      Name (_HID, "ACPI0007")

+      Name (_UID, 9)

+      Name (_STA, 0xF)

+    }

+

+    Device (CP10) { // Neoverse-N1: Cluster 0, Cpu 2, Chip 1

+      Name (_HID, "ACPI0007")

+      Name (_UID, 10)

+      Name (_STA, 0xF)

+    }

+

+    Device (CP11) { // Neoverse-N1: Cluster 0, Cpu 3, Chip 1

+      Name (_HID, "ACPI0007")

+      Name (_UID, 11)

+      Name (_STA, 0xF)

+    }

+

+    Device (CP12) { // Neoverse-N1: Cluster 1, Cpu 0, Chip 1

+      Name (_HID, "ACPI0007")

+      Name (_UID, 12)

+      Name (_STA, 0xF)

+    }

+

+    Device (CP13) { // Neoverse-N1: Cluster 1, Cpu 1, Chip 1

+      Name (_HID, "ACPI0007")

+      Name (_UID, 13)

+      Name (_STA, 0xF)

+    }

+

+    Device (CP14) { // Neoverse-N1: Cluster 1, Cpu 2, Chip 1

+      Name (_HID, "ACPI0007")

+      Name (_UID, 14)

+      Name (_STA, 0xF)

+    }

+

+    Device (CP15) { // Neoverse-N1: Cluster 1, Cpu 3, Chip 1

+      Name (_HID, "ACPI0007")

+      Name (_UID, 15)

+      Name (_STA, 0xF)

+    }

+

     // UART PL011

     Device (COM0) {

       Name (_HID, "ARMH0011")

diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Madt.aslc b/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Madt.aslc
index aea0a4b4..52d40e1e 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Madt.aslc
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Madt.aslc
@@ -90,9 +90,10 @@
 

 typedef struct {

   EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER   Header;

-  EFI_ACPI_6_2_GIC_STRUCTURE                            GicInterfaces[CORE_CNT]; // + 1 to add one cpu on second chip

+  EFI_ACPI_6_2_GIC_STRUCTURE                            GicInterfaces[CORE_CNT + CORE_CNT]; // + 1 to add one cpu on second chip

   EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE                GicDistributor;

-  EFI_ACPI_6_2_GICR_STRUCTURE                           GicRedistributor;

+  EFI_ACPI_6_2_GICR_STRUCTURE                           GicRedistributor_1;

+  EFI_ACPI_6_2_GICR_STRUCTURE                           GicRedistributor_2;

 #if 0

   EFI_ACPI_6_2_GIC_ITS_STRUCTURE                        GicIts;

 #endif

@@ -135,12 +136,16 @@ STATIC EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
       FixedPcdGet32 (PcdGicDistributorBase),

       0x2c020000, 0x2c010000, 25, 0x30120000 /* GicRBase */, 0 /* Efficiency */),

 

+    //   EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Neoverse-N1-4

+    //     0, 4, GET_MPID(0x01000100ULL, 0x00ULL), EFI_ACPI_6_2_GIC_ENABLED, 23,

+    //     // 0, 4, GET_MPID(0x00000100ULL, 0x00ULL), EFI_ACPI_6_2_GIC_ENABLED, 23,

+    //     FixedPcdGet32 (PcdGicDistributorBase),

+    //     //0x40030000000ULL,

+    //     0x2c020000, 0x2c010000, 25, 0x40030140000ULL /* GicRBase */, 0 /* Efficiency */),

     EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Neoverse-N1-4

-      0, 4, GET_MPID(0x01000100ULL, 0x00ULL), EFI_ACPI_6_2_GIC_ENABLED, 23,

-      // 0, 4, GET_MPID(0x00000100ULL, 0x00ULL), EFI_ACPI_6_2_GIC_ENABLED, 23,

-      // FixedPcdGet32 (PcdGicDistributorBase),

-      0x40030000000ULL,

-      0x2c020000, 0x2c010000, 25, 0x400300C0000ULL /* GicRBase */, 0 /* Efficiency */),

+      0, 4, GET_MPID(0x00000100ULL, 0x00ULL), EFI_ACPI_6_2_GIC_ENABLED, 23,

+      FixedPcdGet32 (PcdGicDistributorBase),

+      0x2c020000, 0x2c010000, 25, 0x30140000ULL /* GicRBase */, 0 /* Efficiency */),

     EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Neoverse-N1-5

       0, 5, GET_MPID(0x100, 0x100), EFI_ACPI_6_2_GIC_ENABLED, 23,

       FixedPcdGet32 (PcdGicDistributorBase),

@@ -152,13 +157,47 @@ STATIC EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
     EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Neoverse-N1-7

       0, 7, GET_MPID(0x100, 0x300), EFI_ACPI_6_2_GIC_ENABLED, 23,

       FixedPcdGet32 (PcdGicDistributorBase),

-      0x2c020000, 0x2c010000, 25, 0x301A0000 /* GicRBase */, 0 /* Efficiency */)

+      0x2c020000, 0x2c010000, 25, 0x301A0000 /* GicRBase */, 0 /* Efficiency */),

 

    // // Chip - 1 CPUs

    // EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Neoverse-N1-8

    //   0, 8, GET_MPID(0x01000000ULL, 0x000ULL), EFI_ACPI_6_2_GIC_ENABLED, 23,

    //   FixedPcdGet32 (PcdGicDistributorBase),

    //   0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */)

+

+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Neoverse-N1-0

+      0, 8, GET_MPID(0x01000000ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,

+      FixedPcdGet32 (PcdGicDistributorBase),

+      0x2c020000, 0x2c010000, 25, 0x400300C0000ULL /* GicRBase */, 0 /* Efficiency */),

+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Neoverse-N1-1

+      0, 9, GET_MPID(0x01000000ULL, 0x100), EFI_ACPI_6_2_GIC_ENABLED, 23,

+      FixedPcdGet32 (PcdGicDistributorBase),

+      0x2c020000, 0x2c010000, 25, 0x400300e0000ULL /* GicRBase */, 0 /* Efficiency */),

+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Neoverse-N1-2

+      0, 10, GET_MPID(0x01000000ULL, 0x200), EFI_ACPI_6_2_GIC_ENABLED, 23,

+      FixedPcdGet32 (PcdGicDistributorBase),

+      0x2c020000, 0x2c010000, 25, 0x40030100000ULL /* GicRBase */, 0 /* Efficiency */),

+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Neoverse-N1-3

+      0, 11, GET_MPID(0x01000000ULL, 0x300), EFI_ACPI_6_2_GIC_ENABLED, 23,

+      FixedPcdGet32 (PcdGicDistributorBase),

+      0x2c020000, 0x2c010000, 25, 0x40030120000ULL /* GicRBase */, 0 /* Efficiency */),

+

+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Neoverse-N1-4

+      0, 12, GET_MPID(0x01000100ULL, 0x00ULL), EFI_ACPI_6_2_GIC_ENABLED, 23,

+      FixedPcdGet32 (PcdGicDistributorBase),

+      0x2c020000, 0x2c010000, 25, 0x40030140000ULL /* GicRBase */, 0 /* Efficiency */),

+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Neoverse-N1-5

+      0, 13, GET_MPID(0x01000100ULL, 0x100), EFI_ACPI_6_2_GIC_ENABLED, 23,

+      FixedPcdGet32 (PcdGicDistributorBase),

+      0x2c020000, 0x2c010000, 25, 0x40030160000ULL /* GicRBase */, 0 /* Efficiency */),

+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Neoverse-N1-6

+      0, 14, GET_MPID(0x01000100ULL, 0x200), EFI_ACPI_6_2_GIC_ENABLED, 23,

+      FixedPcdGet32 (PcdGicDistributorBase),

+      0x2c020000, 0x2c010000, 25, 0x40030180000ULL /* GicRBase */, 0 /* Efficiency */),

+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Neoverse-N1-7

+      0, 15, GET_MPID(0x01000100ULL, 0x300), EFI_ACPI_6_2_GIC_ENABLED, 23,

+      FixedPcdGet32 (PcdGicDistributorBase),

+      0x2c020000, 0x2c010000, 25, 0x400301A0000ULL /* GicRBase */, 0 /* Efficiency */),

   },

 

   // GIC Distributor Entry

@@ -167,6 +206,8 @@ STATIC EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
   // GIC Redistributor

   EFI_ACPI_6_2_GIC_REDISTRIBUTOR_INIT(FixedPcdGet32 (PcdGicRedistributorsBase),

                                       SIZE_1MB),

+  EFI_ACPI_6_2_GIC_REDISTRIBUTOR_INIT(FixedPcdGet32 (PcdGicRedistributorsBase) + 0x40000000000ULL,

+                                      SIZE_1MB),

 

 #if 0

   // GIC Redistributor

diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Srat.aslc b/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Srat.aslc
new file mode 100644
index 00000000..1a51ea3d
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Srat.aslc
@@ -0,0 +1,142 @@
+/** @file

+*  Secondary System Description Table (SSDT)

+*

+*  Copyright (c) 2018-2019, ARM Limited. All rights reserved.

+*

+*  SPDX-License-Identifier: BSD-2-Clause-Patent

+*

+**/

+

+#include <IndustryStandard/Acpi.h>

+#include <Library/AcpiLib.h>

+#include <Library/ArmLib.h>

+

+//

+// ACPI table information used to initialize tables.

+//

+#define EFI_ACPI_ARM_OEM_ID           'A','R','M','L','T','D'   // OEMID 6 bytes long

+#define EFI_ACPI_ARM_OEM_TABLE_ID     SIGNATURE_64('A','R','M','N','1','S','D','P') // OEM table id 8 bytes long

+#define EFI_ACPI_ARM_OEM_REVISION     0x20181101

+#define EFI_ACPI_ARM_CREATOR_ID       SIGNATURE_32('A','R','M',' ')

+#define EFI_ACPI_ARM_CREATOR_REVISION 0x00000099

+

+// A macro to initialise the common header part of EFI ACPI tables as defined by

+// EFI_ACPI_DESCRIPTION_HEADER structure.

+#define ARM_ACPI_HEADER(Signature, Type, Revision) {              \

+    Signature,                      /* UINT32  Signature */       \

+    sizeof (Type),                  /* UINT32  Length */          \

+    Revision,                       /* UINT8   Revision */        \

+    0,                              /* UINT8   Checksum */        \

+    { EFI_ACPI_ARM_OEM_ID },        /* UINT8   OemId[6] */        \

+    EFI_ACPI_ARM_OEM_TABLE_ID,      /* UINT64  OemTableId */      \

+    EFI_ACPI_ARM_OEM_REVISION,      /* UINT32  OemRevision */     \

+    EFI_ACPI_ARM_CREATOR_ID,        /* UINT32  CreatorId */       \

+    EFI_ACPI_ARM_CREATOR_REVISION   /* UINT32  CreatorRevision */ \

+  }

+

+

+#define EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE_INIT(                                              \

+    ProximityDomain, AddressBaseLow, AddressBaseHigh, LengthLow, LengthHigh, Flags)               \

+  {                                                                                               \

+    1, sizeof (EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE),ProximityDomain , EFI_ACPI_RESERVED_WORD,  \

+    AddressBaseLow, AddressBaseHigh, LengthLow, LengthHigh, EFI_ACPI_RESERVED_DWORD, Flags,       \

+    EFI_ACPI_RESERVED_QWORD                                                                       \

+  }

+

+#define EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT(                                              \

+    ProximityDomain, ACPIProcessorUID, Flags, ClockDomain)                                      \

+  {                                                                                             \

+    3, sizeof (EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE),ProximityDomain ,                          \

+     ACPIProcessorUID,  Flags,  ClockDomain                                                     \

+  }

+

+#if 0

+#define EFI_ACPI_6_3_GIC_ITS_AFFINITY_STRUCTURE_INIT(                                           \

+    ProximityDomain, ITSID)                                                                     \

+  {                                                                                             \

+    4, sizeof (EFI_ACPI_6_3_GIC_ITS_AFFINITY_STRUCTURE), ProximityDomain,                       \

+     {0x00, 0x00},  ITSID                                                                       \

+  }

+#endif

+

+//

+// Static Resource Affinity Table

+//

+#pragma pack (1)

+

+typedef struct {

+  EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER Header;

+  EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE             Memory[4];

+  EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE               Gicc[16];

+  //EFI_ACPI_6_3_GIC_ITS_AFFINITY_STRUCTURE            Its[4];

+} EFI_ACPI_STATIC_RESOURCE_AFFINITY_TABLE;

+

+#pragma pack ()

+

+EFI_ACPI_STATIC_RESOURCE_AFFINITY_TABLE Srat = {

+  // Header

+  {

+    ARM_ACPI_HEADER (

+      EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE,

+      EFI_ACPI_STATIC_RESOURCE_AFFINITY_TABLE,

+      EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION

+    ),

+    0x00000001,

+    EFI_ACPI_RESERVED_QWORD

+  },

+

+  // Memory Affinity

+  {

+    // ProximityDomain, AddressBaseLow, AddressBaseHigh, LengthLow, LengthHigh, Flags)

+    EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE_INIT(0x0,0x80000000,0x00000000,0x7F000000,0x00000000,0x00000001),

+

+    // Chip 0 - 6GB

+    EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE_INIT(0x0,0x80000000,0x00000080,0x80000000,0x00000001,0x00000001),

+

+    // Chip 1 - 2GB

+    EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE_INIT(0x1,0x80000000,0x00000400,0x7F000000,0x00000000,0x00000001),

+

+    // Chip 1 - 6GB

+    // EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE_INIT(0x1,0x80000000,0x00000480,0x80000000,0x00000000,0x00000001),

+    // EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE_INIT(0x1,0x00000000,0x00000481,0x80000000,0x00000000,0x00000001),

+    // EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE_INIT(0x1,0x80000000,0x00000481,0x7A000000,0x00000000,0x00000001),

+

+    EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE_INIT(0x1,0x80000000,0x00000480,0x70000000,0x00000001,0x00000001),

+

+  },

+

+    //EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE_INIT(0x0,0xFF600000,0x00000000,0x00010000,0x00000000,0x00000000),

+

+  // Processor Affinity

+  {

+    // ProximityDomain, ACPIProcessorUID, Flags, ClockDomain

+    EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT(0x0,0x00000000,0x00000001,0x00000000),

+    EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT(0x0,0x00000001,0x00000001,0x00000000),

+    EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT(0x0,0x00000002,0x00000001,0x00000000),

+    EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT(0x0,0x00000003,0x00000001,0x00000000),

+    EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT(0x0,0x00000004,0x00000001,0x00000000),

+    EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT(0x0,0x00000005,0x00000001,0x00000000),

+    EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT(0x0,0x00000006,0x00000001,0x00000000),

+    EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT(0x0,0x00000007,0x00000001,0x00000000),

+    EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT(0x1,0x00000008,0x00000001,0x00000000),

+    EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT(0x1,0x00000009,0x00000001,0x00000000),

+    EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT(0x1,0x0000000A,0x00000001,0x00000000),

+    EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT(0x1,0x0000000B,0x00000001,0x00000000),

+    EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT(0x1,0x0000000C,0x00000001,0x00000000),

+    EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT(0x1,0x0000000D,0x00000001,0x00000000),

+    EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT(0x1,0x0000000E,0x00000001,0x00000000),

+    EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT(0x1,0x0000000F,0x00000001,0x00000000),

+  },

+

+#if 0

+  // ITS Affinity

+  {

+    EFI_ACPI_6_3_GIC_ITS_AFFINITY_STRUCTURE_INIT(0x0, 0x00000000),

+    EFI_ACPI_6_3_GIC_ITS_AFFINITY_STRUCTURE_INIT(0x0, 0x00000001),

+    EFI_ACPI_6_3_GIC_ITS_AFFINITY_STRUCTURE_INIT(0x0, 0x00000002),

+    EFI_ACPI_6_3_GIC_ITS_AFFINITY_STRUCTURE_INIT(0x0, 0x00000003),

+  },

+#endif

+};

+

+VOID* CONST ReferenceAcpiTable = &Srat;

diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf
index 1ed1a0a2..fc72d616 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf
@@ -23,6 +23,7 @@
   Mcfg.aslc

   RdN1Edge/Dsdt.asl

   RdN1Edge/Madt.aslc

+  RdN1Edge/Srat.aslc

   Sdei.asl

   Spcr.aslc

   Ssdt.asl

diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
index 9f5d1db0..adc7a281 100644
--- a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
+++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
@@ -32,7 +32,6 @@ ArmSgiPkgEntryPoint (
   SGI_PLATFORM_DESCRIPTOR *HobData;

   UINT32                  ConfigId;

   UINT32                  PartNum;

-  EFI_APEI_PROTOCOL       *ApeiProtocol;

 

   SystemIdHob = GetFirstGuidHob (&gArmSgiPlatformIdDescriptorGuid);

   if (SystemIdHob == NULL) {

@@ -54,7 +53,7 @@ ArmSgiPkgEntryPoint (
              (ConfigId == RD_E1_EDGE_CONF_ID)) {

     Status = LocateAndInstallAcpiFromFv (&gRdE1EdgeAcpiTablesFileGuid);

   } else if (PartNum == RD_DANIEL_PART_NUM) {

-    Status = LocateAndInstallAcpiFromFv (&gRdDanielAcpiTablesFileGuid); 

+    Status = LocateAndInstallAcpiFromFv (&gRdDanielAcpiTablesFileGuid);

   } else {

     Status = EFI_UNSUPPORTED;

   }

diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf
index 82ea14c4..10a5df69 100644
--- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf
+++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf
@@ -42,9 +42,13 @@
 

   gArmSgiTokenSpaceGuid.PcdDramBlock2Base

   gArmSgiTokenSpaceGuid.PcdDramBlock2Size

+  gArmSgiTokenSpaceGuid.PcdDramBlock2BaseRemote

+  gArmSgiTokenSpaceGuid.PcdDramBlock2SizeRemote

 

   gArmTokenSpaceGuid.PcdSystemMemoryBase

   gArmTokenSpaceGuid.PcdSystemMemorySize

+  gArmSgiTokenSpaceGuid.PcdSystemMemoryBaseRemote

+

   gArmTokenSpaceGuid.PcdGicDistributorBase

   gArmTokenSpaceGuid.PcdGicRedistributorsBase

   gArmTokenSpaceGuid.PcdFvBaseAddress

diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
index d5cbb21f..a57ed679 100644
--- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
+++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
@@ -16,7 +16,7 @@
 #include <SgiPlatform.h>

 

 // Total number of descriptors, including the final "end-of-table" descriptor.

-#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS  14

+#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS  16

 

 /**

   Returns the Virtual Memory Map of the platform.

@@ -52,6 +52,25 @@ ArmPlatformGetVirtualMemoryMap (
     FixedPcdGet64 (PcdDramBlock2Base),

     FixedPcdGet64 (PcdDramBlock2Size));

 

+  BuildResourceDescriptorHob (

+    EFI_RESOURCE_SYSTEM_MEMORY,

+    ResourceAttributes,

+    FixedPcdGet64 (PcdSystemMemoryBaseRemote),

+    FixedPcdGet64 (PcdSystemMemorySize));

+

+#if 1

+#define REMOTE_TOP_MEM_SIZE 0x170000000ULL

+#define REMOTE_TOP_MEM_BASE 0x48090000000ULL

+

+  BuildResourceDescriptorHob (

+    EFI_RESOURCE_SYSTEM_MEMORY,

+    ResourceAttributes,

+    FixedPcdGet64 (PcdDramBlock2BaseRemote),

+    FixedPcdGet64 (PcdDramBlock2SizeRemote));

+    //REMOTE_TOP_MEM_BASE,

+    //REMOTE_TOP_MEM_SIZE);

+#endif

+

   ASSERT (VirtualMemoryMap != NULL);

   Index = 0;

 

@@ -119,7 +138,22 @@ ArmPlatformGetVirtualMemoryMap (
   // DDR - Second Block

   VirtualMemoryTable[++Index].PhysicalBase  = PcdGet64 (PcdDramBlock2Base);

   VirtualMemoryTable[Index].VirtualBase     = PcdGet64 (PcdDramBlock2Base);

-  VirtualMemoryTable[Index].Length          = PcdGet64 (PcdDramBlock2Size);

+  VirtualMemoryTable[Index].Length          = PcdGet64 (PcdDramBlock2Size); 

+  VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;

+

+  // Remote DDR - (2GB - 16MB)

+  VirtualMemoryTable[++Index].PhysicalBase  = PcdGet64 (PcdSystemMemoryBaseRemote);

+  VirtualMemoryTable[Index].VirtualBase     = PcdGet64 (PcdSystemMemoryBaseRemote);

+  VirtualMemoryTable[Index].Length          = PcdGet64 (PcdSystemMemorySize);

+  VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;

+

+  // Remote DDR - Second Block

+  VirtualMemoryTable[++Index].PhysicalBase  = PcdGet64 (PcdDramBlock2BaseRemote);

+  VirtualMemoryTable[Index].VirtualBase     = PcdGet64 (PcdDramBlock2BaseRemote);

+  // VirtualMemoryTable[++Index].PhysicalBase  = REMOTE_TOP_MEM_BASE;

+  // VirtualMemoryTable[Index].VirtualBase     = REMOTE_TOP_MEM_BASE;

+  VirtualMemoryTable[Index].Length          = PcdGet64 (PcdDramBlock2SizeRemote);

+  //VirtualMemoryTable[Index].Length          = REMOTE_TOP_MEM_SIZE;

   VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;

 

   // PCI Configuration Space

diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dec b/Platform/ARM/SgiPkg/SgiPlatform.dec
index 8fc97aea..a1a4fba4 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dec
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dec
@@ -50,5 +50,9 @@
   gArmSgiTokenSpaceGuid.PcdVirtioNetSize|0x00000000|UINT32|0x00000008

   gArmSgiTokenSpaceGuid.PcdVirtioNetInterrupt|0x00000000|UINT32|0x00000009

 

+  gArmSgiTokenSpaceGuid.PcdSystemMemoryBaseRemote|0|UINT64|0x00000011

+  gArmSgiTokenSpaceGuid.PcdDramBlock2BaseRemote|0|UINT64|0x00000012

+  gArmSgiTokenSpaceGuid.PcdDramBlock2SizeRemote|0|UINT64|0x00000013

+

 [Ppis]

   gNtFwConfigDtInfoPpiGuid     = { 0x6f606eb3, 0x9123, 0x4e15, { 0xa8, 0x9b, 0x0f, 0xac, 0x66, 0xef, 0xd0, 0x17 } }

diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc b/Platform/ARM/SgiPkg/SgiPlatform.dsc
index 588c32fb..5e1c14b8 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dsc
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc
@@ -107,9 +107,6 @@
   gArmSgiTokenSpaceGuid.PcdVirtioBlkSupported|TRUE

   gArmSgiTokenSpaceGuid.PcdVirtioNetSupported|TRUE

 

-  # Required by APEI DXE driver

-  gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE

-

 [PcdsFixedAtBuild.common]

   gArmTokenSpaceGuid.PcdVFPEnabled|1

   gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x2000

@@ -117,6 +114,8 @@
   # DRAM Block2 Base and Size

   gArmSgiTokenSpaceGuid.PcdDramBlock2Base|0x8080000000

   gArmSgiTokenSpaceGuid.PcdDramBlock2Size|0x180000000

+  gArmSgiTokenSpaceGuid.PcdDramBlock2BaseRemote|0x48080000000

+  gArmSgiTokenSpaceGuid.PcdDramBlock2SizeRemote|0x170000000

 

   # NV Storage PCDs. Use base of 0x08000000 for NOR0, 0xC0000000 for NOR 1

   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|0x0C000000

@@ -134,6 +133,7 @@
   # System Memory (1GB - 16MB of Trusted DRAM at the top of the 32bit address space)

   gArmTokenSpaceGuid.PcdSystemMemoryBase|0x80000000

   gArmTokenSpaceGuid.PcdSystemMemorySize|0x7F000000

+  gArmSgiTokenSpaceGuid.PcdSystemMemoryBaseRemote|0x40080000000

 

   # GIC Base Addresses

   gArmTokenSpaceGuid.PcdGicDistributorBase|0x30000000

@@ -375,8 +375,3 @@
   #

   MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf

 

-  ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.inf {

-    <LibraryClasses>

-      NULL|StandaloneMmPkg/Library/VariableMmDependency/VariableMmDependency.inf

-  }

-  ArmPkg/Drivers/ApeiDxe/Apei.inf

diff --git a/Platform/ARM/SgiPkg/SgiPlatform.fdf b/Platform/ARM/SgiPkg/SgiPlatform.fdf
index e22f397e..11fd6b53 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.fdf
+++ b/Platform/ARM/SgiPkg/SgiPlatform.fdf
@@ -171,11 +171,6 @@ READ_LOCK_STATUS   = TRUE
   #

   INF  ShellPkg/Application/Shell/Shell.inf

 

-  # MM Communicate

-  INF ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.inf

-

-  INF ArmPkg/Drivers/ApeiDxe/Apei.inf

-

   #

   # Platform driver

   #